Commit graph

570072 commits

Author SHA1 Message Date
Jack Pham
8bb118e8c5 ARM: dts: msm: Add PD PHY peripheral to pmicobalt
Add device node for the USB PD PHY peripheral found in PMICOBALT.
Reference this from the USB3 node as its extcon device as it
provides notifications of cable insertion/removal.

Change-Id: I42916b13e5d28dd3f3b0ed40c53767cbd7ae32b1
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-05-10 13:20:29 -07:00
Jack Pham
a53bda8e37 defconfig: msmcortex: Enable USB PD drivers
Enable USB_PD_POLICY and QPNP_USB_PDPHY drivers which
support USB Power Delivery.

Change-Id: I44a385af5c68b0bf656fc705a07251850fb38fde
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-05-10 13:20:28 -07:00
Jack Pham
0aa4fa62e3 usb: pd: Add sysfs entries
Add sysfs attributes that will live under /sys/class/usbpd/usbpd0
which will give state information such as:

   - received PDOs from the peer source
   - whether an explicit contract is established
   - selecting a new PDO (thereby sending a Request message)
   - current and supported power, data roles

Change-Id: I5c3cf9a0239c0274709a1771e4fda8c6f5baaa77
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-05-10 13:20:28 -07:00
Jack Pham
c1bb4294e9 usb: pd: Add Protocol layer and Policy Engine
This change adds protocol layer handling as well as the
policy engine state machine.

Change-Id: I5323f82192960d1fd7d3a20baf040d6d80c06be5
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-05-10 13:20:27 -07:00
Hemant Kumar
e6b3a48a1e usb: pd: Add QPNP Power Delivery PHY driver
The QPNP PD PHY resides in the PMIC and handles USB Power Delivery
data transmission and reception over the CC lines. This driver
communicates to this device over SPMI or I2C buses. Introduce APIs
that upper layers will use to implement the protocol layer and
policy engine.

Change-Id: I75dec23c297fd5e07d14741e6627b473012b7a01
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-05-10 13:20:26 -07:00
Jack Pham
82a0ca0e2d usb: pd: Add initial support for USB Power Delivery
Add PD policy engine driver. This driver will interact
with the charger/Type-C module via power_supply framework,
and in turn notify the USB controller on when to begin/end
data operation using extcon. For this initial patch this
driver is simply acting as a pass-through between Type-C
connection states and relaying them as USB/USB_HOST
notifications.

Change-Id: Ieba8e68761beef83a572b75b6b5f3b7ab7802e9e
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-05-10 13:20:25 -07:00
Nicholas Troast
e4fd13f74c defconfig: arm64: msmcortex: enable QPNP_SMB2 support for msmcobalt
Enable QPNP_SMB2 device support for the msmcobalt platform.

CRs-Fixed: 1005389
Change-Id: I0ecabc0febd38ad55cee69bb415a0856a3e83a73
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-05-10 13:20:25 -07:00
Harry Yang
b4a8e163e5 ARM: dts: msm: add VBUS and VCONN regulators for msmcobalt
QPNP SMB2 charger controls enabling VBUS and VCONN regulators.

- VBUS is used to support OTG connected devices
- VCONN is used to support Type-C powered cables

Add regulator devices for VBUS and VCONN.

CRs-Fixed: 1005389
Change-Id: Ia8dd2d6c8d51765dc49bdfa15565aed09c6a3893
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-05-10 13:20:24 -07:00
Nicholas Troast
9eb9399317 ARM: dts: msm: add QPNP SMB2 charger device to PMICOBALT
Add the QPNP SMB2 charger device that is present in PMICOBALT.

CRs-Fixed: 1005389
Change-Id: I03be96c229095b666d8e1a84c718989d84ec506e
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-05-10 13:20:23 -07:00
Nicholas Troast
23578eb519 qcom-charger: introduce QPNP SMB2 charger driver
The QPNP SMB2 charger driver supports the charger peripheral present in
the PMICOBALT chip.

This charger peripheral is common among other chips, therefore the
driver uses the smb library to support all common functionality.

Register access is provided by the parent device via regmap. Interrupts
are controlled by the parent device, and handlers are registered by the
QPNP SMB2 charger driver.

The power supply framework is used to communicate battery and usb
properties to userspace and other driver consumers such as fuel gauge,
USB, and USB-PD.

VBUS and VCONN regulators are registered for supporting OTG, and powered
Type-C cables respectively.

CRs-Fixed: 1005389
Change-Id: I160ce3c8caae6999f52590099cf6d1de957dbbaf
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Harry Yang <harryy@codeaurora.org>
2016-05-10 13:20:23 -07:00
Nicholas Troast
c91526d68c qcom-charger: introduce SMB charger library
A library of common structures and functions that should be used by all
charger drivers that support an SMB charger peripheral.

The library includes high level register read/write access, interrupt
handlers, voter callbacks, and power supply property getters. It should be
extended with any functionality that can be leveraged by an SMB charger
peripheral.

All drivers that support an SMB charger peripheral should define their own
struct smb_charger to interface with the library.

CRs-Fixed: 1005389
Change-Id: I36796332af667874c1246ec35984122d45de6938
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Harry Yang <harryy@codeaurora.org>
2016-05-10 13:20:22 -07:00
Nicholas Troast
53bfe74232 qcom-charger: pmic-voter: allow NULL callbacks
Consumers may not want to specify a callback, especially for boolean
votables which only care about the state of the client votes rather than
reacting to a change in the effective result.

CRs-Fixed: 1005389
Change-Id: I72274126a382ef8e32d89e1e8aa98348aaaac420
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-05-10 13:20:21 -07:00
Riley Andrews
e3ba00c712 android: binder: Don't use sched_preempt_enable_no_resched.
The correct function is prempt_enable_no_resched(). The other
function is reserved for the scheduler core.

Change-Id: Ib36697de003f6a59a608a0024d5351dc15ff8715
Signed-off-by: Todd Kjos <tkjos@google.com>
Git-commit: 776e5bca6446b3aac03b4685b4f4f72446ddcba0
Git-repo: https://android.googlesource.com/kernel/msm
[odhyade@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Omprakash Dhyade <odhyade@codeaurora.org>
2016-05-10 13:20:20 -07:00
Riley Andrews
3956eabb34 android: binder: Use wake up hint for synchronous transactions.
Use wake_up_interruptible_sync() to hint to the scheduler binder
transactions are synchronous wakeups. Disable premption while waking
to avoid ping-ponging on the binder lock.

Change-Id: Ic406a232d0873662f80148e37acefe5243d912a0
Signed-off-by: Todd Kjos <tkjos@google.com>
Git-commit: 443c026e90820170aa3db2c21d2933ae5922f900
Git-repo: https://android.googlesource.com/kernel/msm
Signed-off-by: Omprakash Dhyade <odhyade@codeaurora.org>
2016-05-10 13:20:20 -07:00
Chris Lew
d7e810a2ce soc: qcom: glink: Fix ssr race condition in glink_close
Add else statement in glink_close for a race condition where the
xprt state is set to GLINK_XPRT_DOWN and glink_close runs before
the channel is migrated.

CRs-Fixed: 988266
Change-Id: I4de6530f1fbffd9f3acd1fa539cf756364ea32ac
Signed-off-by: Chris Lew <clew@codeaurora.org>
2016-05-10 13:20:19 -07:00
Yuanyuan Liu
f91d7a5a2b icnss: Update icnss logs
Enable important kernel logs which are essential for cold boot debug.
Remove unnecessary log for normal behavior.

CRs-Fixed: 1013082
Change-Id: I5234f0511fa1c81072e740386e90e07f5e813dd0
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
2016-05-10 13:20:18 -07:00
Subbaraman Narayanamurthy
5bad48c1b8 regulator: labibb: fix standalone mode configuration
Currently, standalone mode is treated as a mode along with other
modes, LCD and AMOLED. Rather than keeping it like that, LCD and
AMOLED mode configurations should be allowed along with the way
LAB and IBB modules are controlled, i.e. standalone or dual.

Remove the standalone mode from the list of modes and keep it as
a configurable parameter via device tree. This way, LCD and
AMOLED modes can be configured along with the way LAB/IBB needs
to be controlled (dual or standalone).

Add support for parent supply to LABIBB device so that LAB and
IBB regulators can vote for MBG when operating in standalone
mode.

CRs-Fixed: 996961
Change-Id: I56882e3a5a01b017e1ba9cd63ab36933a3d469e7
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-05-10 13:20:18 -07:00
Subbaraman Narayanamurthy
b2a7905fb6 Revert "regulator: labibb: avail of simpler regulator registration api"
This reverts commit 0324b74b39 ("regulator: labibb: avail of
simpler regulator registration api").

LABIBB regulator driver still needs to obtain init_data from
the device tree not just for the regulator name but it is for
a subsequent change which will pass the parent supply name via
init_data to register with the regulator framework. Hence bring
it back.

Since of_get_regulator_init_data() is brought back, we need to
pass rdesc to that function as the number of arguments got
changed.

CRs-Fixed: 1008400
Change-Id: I027a9ddbbbf6ff0ba7886151e5336d190ac3ce25
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-05-10 13:20:17 -07:00
Anirudh Ghayal
93aea9eb5c regulator: qpnp-labibb: Add logic to skip second SWIRE command
On newer AMOLED panels the second SWIRE command is expected to
control the AVDD voltage. However, the PMI8950/PMI8994 IBB module
interprets this command for VDISN and incorrectly reduces its voltage.

Add DT properties 'qcom,skip-2nd-swire-cmd' to skip the second
SWIRE command and 'qcom,swire-2nd-cmd-delay' to explicitly specify
the delay between the first and second SWIRE command.

CRs-Fixed: 938038
Change-Id: I617a8490784efd760651b3ec8780cc4fd4b17bae
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-05-10 13:20:16 -07:00
Ghanim Fodi
72ba8906bc msm: ipa3: Send limited chained descriptors to IPA
As part of SSR IPA driver code, Filtering and Routing Q6 tables
are being cleaned by pointing to empty tables.
This is done via DMA_SHARED_MEM IPA immediate command to change
SRAM tables pointers. Today code send one command per tables, but
all are chained in single transaction. This will hit the chain
size limitation defined by GSI IPA_IF TLV size.
Change the code to send the commands in smaller chains.

CRs-Fixed: 1012322
Change-Id: I03e9e92c2e01d1fece7e13dd412ea6128210f1fb
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
2016-05-10 13:20:15 -07:00
Siddartha Mohanadoss
6bf348858b ARM: dts: msm: Add VADC_HC and BTM channels for msmcobalt
Clients of VADC_HC and BTM include reading voltage phone
power, system thermistors for thermal mitigation such as
msm_therm, case_therm, XO therm. Add the supported VADC
and BTM channels for the msmcobalt platforms.

Change-Id: I87d0b7c8280a57b88a9b9e7c6a2710e4694a2c0b
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
2016-05-10 13:20:15 -07:00
Abhijit Kulkarni
6bb9c619f7 msm: mdss: enable additonal clocks
Need to enable clk_mmss_mnoc_ahb_clk before turning on the ahb_clk,
as there is a core fsm dependency between these clocks.

CRs-Fixed: 1008505
Change-Id: I9c87fee27c6a6ef875100c9fc1b9d0cb7c14a2b5
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2016-05-10 13:20:14 -07:00
Siddartha Mohanadoss
81a5895080 thermal: qpnp-adc-tm: Support refreshed BTM driver
The BTM (Battery temperature module) peripheral driver
on the PMIC (Power management IC) supports threshold
monitoring and notifies clients when thresholds are crossed.
PMCOBALT supports refreshed BTM peripheral register interface
and the driver uses compatible property qpnp-adc-tm-hc to
distinguish using the refreshed peripheral. The external
client interface with the driver remains the same. Updates
include handling the interrupt when the thresholds are
crossed,programming the threholds and configuring
the hardware based on the refreshed design.

BTM peripheral needs the VADC_HC peripheral to compute the
gain/offset that are used to reverse compute the threhold
values to ADC code. Some of the reverse computation API's
such as calculating thermistor thresholds require the
gain and offset values before computing the ADC code to
be programmed. This requires modification to the existing
calibration API in the VADC_HC driver to calculate
the reference calibration points and store these values
for clients to use in the reverse computation

Change-Id: I989cfa4f40e7f1671f04dfa9d4c3fe2ccbbc44ab
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
2016-05-10 13:20:13 -07:00
Abhijit Kulkarni
be6417fef9 ARM: dts: msm: Add clocks MNOC AHB/AXI for smmu
Add additional required clocks mdss device tree to enable
mmss smmu functionality.

Change-Id: I09a7268861663761df716dd18f07069f6b1152ce
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2016-05-10 13:20:12 -07:00
Abhijit Kulkarni
c6b926f493 ARM: dts: msm: Add VBIF/Hysteresis support for mdss
VBIF/Hysteresis registers have to be setup for mdss module
of msmcobalt. Add default values in the device tree.

Change-Id: I4f106a39529f5e77591431bc3b4883a16d7b37f1
Signed-off-by: Sushil Chauhan <sushilchauhan@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2016-05-10 13:20:12 -07:00
Abhijeet Dharmapurikar
e8656817ca spmi-pmic-arb: check apid enabled before calling the handler
The driver currently invokes the apid handler (periph_handler()) once it
sees that the summary status bit for that apid is set.

However the hardware is designed to set that bit even if the apid
interrupts are disabled. The driver should check whether the apid is
indeed enabled before calling the apid handler.

CRs-Fixed: 1001770
Change-Id: I1415c41ec99ca4b767392ea3443691760f967953
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-05-10 13:20:11 -07:00
Abhijeet Dharmapurikar
a071656691 spmi: pmic_arb: add a print in cleanup_irq
The cleanup_irq() was meant to clear and mask interrupts that were
left enabled in the hardware but there was no interrupt handler
registered for it. Add an error print when it gets invoked.

CRs-Fixed: 1001770
Change-Id: Iccf0daadeb82b0fca29829424439ac225e2b3b88
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-05-10 13:20:10 -07:00
Abhijeet Dharmapurikar
673688e863 spmi: pmic_arb: use appropriate flow handler
The current code uses handle_level_irq flow handler even if the trigger
type of the interrupt is edge. This can lead to missing of an edge
transition that happens when the interrupt is being handled. The level
flow handler masks the interrupt while it is being handled, so if an edge
transition happens at that time, that edge is lost.

Use an edge flow handler for edge type interrupts which ensures that the
interrupt stays enabled while being handled - at least until it triggers
at which point the flow handler sets the IRQF_PENDING flag and only then
masks the interrupt. That IRQF_PENDING state indicates an edge transition
happened while the interrupt was being handled and the handler is called
again.

CRs-Fixed: 1001770
Change-Id: Id2554c9e6ed79188fa1b64728be464bda45f07ec
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-05-10 13:20:10 -07:00
Azam Sadiq Pasha Kapatrala Syed
d02e7d9235 msm: camera: Avoid exposing kernel addresses
Usage of %p exposes the kernel addresses, an easy target to
kernel write vulnerabilities. With this patch currently
%pK prints only Zeros as address. If you need actual address
echo 0 > /proc/sys/kernel/kptr_restrict

CRs-Fixed: 987011
Change-Id: I6c79f82376936fc646b723872a96a6694fe47cd9
Signed-off-by: Azam Sadiq Pasha Kapatrala Syed <akapatra@codeaurora.org>
2016-05-10 13:20:09 -07:00
Deepak Katragadda
c42d0bb4ff clk: msm: clock-gcc-cobalt: Add new hw_ctl_clk type UFS clocks
Add new UFS clocks to support enabling/disabling the hardware
dynamic gating for their corresponding branch clocks.

CRs-Fixed: 1012355
Change-Id: I4836ad8a775b0ec0375e37d27fcbe380e661a7b2
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-05-10 13:20:08 -07:00
Deepak Katragadda
8516d6c280 clk: msm: clock-local2: Add support for enabling clock HW_CTL
Add a new hw_ctl_clk type to allow clock clients to enable
hardware dynamic gating of the clock branch.
Clients should use the clk_enable API on a separate hw_ctl_clk
clock structure to set this bit. Vice-versa for clearing it.
It is mandatory that the clients call clk_enable on the actual
branch clock before enabling the hw_ctl_clk clock.

CRs-Fixed: 1012355
Change-Id: I24e78353fa07f537bafc322dba6b1ffac913cd1d
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-05-10 13:20:07 -07:00
Runmin Wang
c34967828a soc: qcom: Vote ATB clock before clear registers
Gladiator error driver depends on the ATB clocks to be voted.
Previously, clock voting is done after writing to gladiator
registers.

CRs-Fixed: 1011314
Change-Id: I4d18273c6fc63baf58db1a778a1aaf3cb55e4824
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
2016-05-10 13:20:07 -07:00
Puja Gupta
a396fe6cc2 soc: qcom: Add more details to error log for PIL debugging
Add more detailed log to help debug when the ELF segments relocatable bit
is not set and pil_init_segment bails out.

Change-Id: Id8d941e69b70f1bcf709cedc969aa0500be92039
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
2016-05-10 13:20:06 -07:00
Abhimanyu Kapur
7b1a1d2263 defconfig: enable msm serial console on msmcortex perf config
Enable serial uart console on the msmcortex perf config.

CRs-Fixed: 1008594
Change-Id: I928ddfb44dfd52e8ba70d637219e3b5fbcdf8fa7
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
2016-05-10 13:20:05 -07:00
Se Wang (Patrick) Oh
6e8e5dca25 soc: qcom: add support for the socinfo v0.12 format
The v0.12 format adds three new fields:
	uint32_t chip_family;
	uint32_t raw_device_family;
	uint32_t raw_device_number;

CRs-Fixed: 1013110
Change-Id: I1699ee96c65809a46331f94938c12fc1dd4d5384
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
2016-05-10 13:20:04 -07:00
Ram Chandrasekar
0891df2685 ARM: dts: msm: Update the emergency hotplug threshold for MSMcobalt
As per recommendation update the emergency hotplug threshold
for MSMcobalt to 105C from 70C.

CRs-Fixed: 1010111
Change-Id: I69a5583e4e15499c54ce5b2ab0fe0538de303391
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-10 13:20:04 -07:00
Ram Chandrasekar
bcda1b34e0 ARM: dts: msm: Configure low voltage restricion for msmcobalt
Configure thermal driver to do low voltage restriction for CX,
APSS and graphics rails, when temperature goes below 5 degree C.
This restriction will be cleared if the tsens temperature goes
above 10 degree C.

CRs-Fixed: 1010111
Change-Id: I36a1ba6adb9ce847ae552d904dff1bbd0ce3cb77
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-10 13:20:03 -07:00
Ram Chandrasekar
0783f5922c ARM: dts: msm: Configure lmh hardware for msmcobalt
Configure the limits hardware with the interrupt to listen for.
limits hardware driver will interact with the trustzone to get
throttling information from the hardware.

CRs-Fixed: 1010120
Change-Id: I56a8396a12e9b96cbed554bb1aed5d6243e6240a
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-10 13:20:02 -07:00
Ram Chandrasekar
893d871ec5 ARM: dts: msm: Remove boot frequency mitigation for msmcobalt
With the LMH-DCVSh hardware the frequency mitigation in
the HLOS is not needed. Remove the boot-up frequency mitigation
in KTM for msmcobalt.

CRs-Fixed: 1010111
Change-Id: I105e98968b911f08b67c4e686e74ae6f7555d7be
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-10 13:20:01 -07:00
Ram Chandrasekar
2fdf8e8f4b ARM: dts: msm: Remove wrong pop_mem sensor alias for msmcobalt
temperature sensor 1 maps to cpu1 and not pop_mem. Remove
the pop_mem alias name defined for temperature sensor 1
in msmcobalt.

CRs-Fixed: 1010111
Change-Id: I69803580c9f747a0e2e5effa43d33f7a9a0d4e73
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-10 13:20:01 -07:00
Ram Chandrasekar
a2ad344857 defconfig: msmcortex: Enable LMH hardware and interface driver
Enable the LMH hardware and the LMH interface driver.
LMH hardware driver interacts with the LMH hardware and
uses the interface driver to register with thermal core.

CRs-Fixed: 1010120
Change-Id: I2e6f6a181902bee7e3bcb0f366e6ee21f8a4c442
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-10 13:20:00 -07:00
Ram Chandrasekar
a6d2ab49b1 defconfig: msmcortex: Enable thermal drivers for msmcobalt
Enable kernel thermal driver.
kernel thermal driver can monitor, mitigate and provide interface
to thermal-engine to mitigate.

CRs-Fixed: 1010111
Change-Id: I02b4bc9cf66b2734be99c986d4a200f604145e0a
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-10 13:19:59 -07:00
Osvaldo Banuelos
2fd5b34c85 ARM: dts: msm: define LMh SW override values for OSM device for msmcobalt
Define the three LMh SW override values per cluster to be used
by the OSM device.

Change-Id: I6279cdbc92d4e0d5786854722474e1dfb14e7198
CRs-Fixed: 1009097
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
2016-05-09 18:35:32 -07:00
Osvaldo Banuelos
cf381d203a clk: msm: osm: support programming LMh SW override values in set_rate()
To ensure stable operation, it is necessary to place LMh SW override
votes when setting the new rate of the power and performance
CPU clocks. Add support for parsing these values from Device Tree
and programming them in clk_set_rate().

Change-Id: I60d90d546f155edb6c13c46e6c59c75e95848d6c
CRs-Fixed: 1009097
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
2016-05-09 18:35:31 -07:00
Ramkumar Radhakrishnan
75f9319b67 msm: mdss: update CSC 10 bit matrix table with appropriate values
Update CSC 10 bit YUV2RGB matrix table with appropriate values to
avoid any color conversion issues.

Change-Id: Iaf740873a6814cd9211acf4de4042c7cefecd64d
CRs-Fixed: 997593
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
2016-05-09 18:35:31 -07:00
Ramkumar Radhakrishnan
e5617d8758 msm: mdss: align yuv bitstream plane size and stride appropriately.
Add align function to align the values to non power of 2 and align
yuv bitstream plane size and stride appropriately.

Change-Id: I40695e9e7a99fe7c814d26fa7b5205370b7f9f64
CRs-Fixed: 997601
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
2016-05-09 18:35:30 -07:00
Ram Chandrasekar
3f6bd88967 msm: lmh_lite: Use dynamic memory for getting sensor list
LMH lite driver allocates DMA memory for getting the
sensor list from trustzone. DMA memory is not needed for
this operation, so use dynamic memory.

CRs-Fixed: 1010120
Change-Id: Ia7ef920a0f34334e49d76efc5ba233aa58aeb273
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-09 18:35:29 -07:00
Ram Chandrasekar
6c28948e60 msm: lmh_interface: Support new thermal core framework APIs
Thermal core framework allows reading negative temperature and to
support that, thermal core APIs will read temperature in integer.

Inline with thermal core changes, modify the parameters to read
temperature to integer from signed long.

CRs-Fixed: 1010120
Change-Id: I975c11aa4e63e01ee3274a577b51b37c1c0f78cd
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-09 18:35:29 -07:00
Biswajit Paul
60c6b65403 kernel: Restrict permissions of /proc/iomem.
The permissions of /proc/iomem currently are -r--r--r--. Everyone can
see its content. As iomem contains information about the physical memory
content of the device, restrict the information only to root.

Change-Id: If0be35c3fac5274151bea87b738a48e6ec0ae891
CRs-Fixed: 786116
Signed-off-by: Biswajit Paul <biswajitpaul@codeaurora.org>
Signed-off-by: Avijit Kanti Das <avijitnsec@codeaurora.org>
2016-05-09 18:35:28 -07:00
Skylar Chang
7367915c0b msm: ipa3: drain UL data for ECM/RNDIS tethering
In some cases modem will delay USB uplink pipe
for flow control. This will happen regardless of
tethering protocol. This change sends a QMI message
to modem to remove the delay on USB pipe in case
of USB cable disconnect.

CRs-Fixed: 1009199
Change-Id: I42cd716dcb87b814256a81418fecdff020f37d9d
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-05-09 18:35:27 -07:00