Common Clock Framework(CCF) already has a clock ops hook `debug_init` which
could be used for the debugfs clock measure functionality. Remove the APIs
from the CCF and update the 'debug_init' clock ops to the clock types which
require the measure functionality.
Change-Id: I0c01f72a9d1d1caa1b1ab73a800401c2cbc3216c
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The 'measure' functionality is a debug feature which allows the user of
clocks to allow measuring the frequency of a given clock using the ring
oscillator.
Move 'measure' code to a new clk-debug file to support the functionality.
Change-Id: I229721f17d232a4ff69b5cf416b43d22fee5b72e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
In case of PLL lock errors or the RCGR fails to update the new
configuration, add support to capture all the PLL and RCGR
configuration registers as part of kernel logs.
Change-Id: Ifb0cefafc30f8796ba17f2d388fb65ed41aae485
Signed-off-by: Taniya Das <tdas@codeaurora.org>
When debug_suspend is set to true and the low power code invokes the
function to print the enabled clocks during suspend the function fails to
execute the do while loop in clock_debug_print_enabled_clocks, so separate
out the function to handle the same.
Change-Id: I014750637bc17c1107c7f0745d2d44caf6c96e62
Signed-off-by: Taniya Das <tdas@codeaurora.org>
For commit 44aa223a3e ("clk: move check for CLK_ENABLE_HAND_OFF at
unused tree") at unused tree level, prepare and enable counts are
only decrementing for handoff enabled clock(having CLK_ENABLE_HAND_OFF
flag) and counts are not decrementing for their parent clock.
So fixing the same by adding clk_core_unprepare/disable at unused tree
level for handoff enabled clocks so that parent handoff counts also
gets decrement.
Change-Id: Ib238540b2addbe8c9ff7f2e34428169c76e3f44b
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
The commit 04a0136aeea5 ("clk: introduce CLK_ENABLE_HAND_OFF flag")
assumes that the first time clock client calls a clk_prepare &
clk_enable, the clocks from that point of time could be on their own.
But there could be use cases which could have impacts due to this
handling. Moving the handoff counts for prepare and enable at unused
tree level.
Change-Id: I7d527571c2eb4d53d58d82126989bd673de12e2d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Some clocks are critical to system operation (e.g. cpu, memory, etc) and
should not be gated until a driver that knows best claims such a clock
and expressly gates that clock through the normal clk.h api.
The typical way to handle this is for the clk driver or some other early
code to call clk_prepare_enable on this important clock as soon as it is
registered and before the clk_disable_unused garbage collector kicks in.
This patch introduces a formal way to handle this scenario that is
provided by the clk framework. Clk driver authors can set the
CLK_ENABLE_HAND_OFF flag in their clk data, which will cause the clk to
be enabled in clk_register(). Then when the first clk consumer driver
comes along and calls clk_get() & clk_prepare_enable(), the reference
counts taken during clk registration are transfered (or handed off) to
the clk consumer.
At this point handling the clk is the same as any other clock which as
not set the new CLK_ENABLE_HAND_OFF flag. In fact no changes to any
clock consumer driver are needed for this to work.
Change-Id: Ib5247f6bceb1f555c03103f061af089755b2de62
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Patch-mainline: patchwork.kernel.org @ 02/11/16, 9:19
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Introduce clk_debug_mux which would support clocks to be allowed to measure
clock frequency from debugfs.
Change-Id: I81c32a876b33f5a7773485a76897ff9cbed45a76
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Some dedicated power rails do not require a max voltage vote during bootup.
Allow clock drivers to skip handoff for the corresponding VDD classes.
Multiple vdd_class structures might share same set of regulators. If the
FMAXes for these different vdd_class structures do not have the same level
vote, there could be a conflict when setting voltage on the regulator.
Add a flag use_max_uV to vote for INT_MAX as max_uV when calling
regulator_set_voltage(). Constraints in the regulator driver make sure that
the final voltage meets the requirement of that regulator's operational
range.
Change-Id: I15c9dc3ecf907723a136cbe90597ccafeba91af0
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The critical clock handling in __clk_core_init isn't taking the enable lock
before calling clk_core_enable, which in turns triggers the warning in the
lockdep_assert_held call in that function when lockep is enabled.
Add the calls to clk_enable_lock/unlock to make sure it doesn't happen.
Fixes: 32b9b1096186 ("clk: Allow clocks to be marked as CRITICAL")
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit ef56b79b66faeeb0dc14213d3cc9e0534a960dee)
Git-commit: ef56b79b66faeeb0dc14213d3cc9e0534a960dee
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Change-Id: Ifefcbe4741ddd046755ecc24c3f2d619566c2823
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This call matches clocks which have been marked as critical in DT
and sets the appropriate flag. These flags can then be used to
mark the clock core flags appropriately prior to registration.
Legacy bindings requiring this feature must add the clock-critical
property to their binding descriptions, as it is not a part of
common-clock binding.
Cc: devicetree@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1455225554-13267-4-git-send-email-mturquette@baylibre.com
(cherry picked from commit d56f8994b6fb928f59481fabc25bcd1c2f9bd06d)
[tdas@codeaurora.org: resolve trivial conflict]
Git-commit: d56f8994b6fb928f59481fabc25bcd1c2f9bd06d
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Change-Id: I2bf824bd2446ca87baabd31c166119d6c5c90643
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1455225554-13267-3-git-send-email-mturquette@baylibre.com
(cherry picked from commit 2e20fbf592621b2c2aeddd82e0fa3dad053cce03)
Git-commit: 2e20fbf592621b2c2aeddd82e0fa3dad053cce03
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Change-Id: I88418dd25f356402219d7ff36ce791370c69114a
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Critical clocks are those which must not be gated, else undefined
or catastrophic failure would occur. Here we have chosen to
ensure the prepare/enable counts are correctly incremented, so as
not to confuse users with enabled clocks with no visible users.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/1455225554-13267-2-git-send-email-mturquette@baylibre.com
(cherry picked from commit 32b9b10961860860268961d9aad0c56a73018c37)
[tdas@codeaurora.org: resolve trivial merge conflict]
Git-commit: 32b9b10961860860268961d9aad0c56a73018c37
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Change-Id: I003abf22da8600dd90ef397d293544b4bc9e0160
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The clock api clock_debug_print_enabled would allow any client like low
power driver to print all the enabled clocks which include the
prepare_count/enable_count/rate/rate max vote.
Change-Id: I936496e553bc958c10e743fd8a225ffc7fbc0f79
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add support for clocks debugfs to be able to display
- rates_max which indicates the frequency to voltage mapping of a clock.
- list_rates, the list of clock frequencies supported by root clocks.
- Also display the rate_max associated with enabled clocks list.
Change-Id: I0a202af6f46c7cf164036d65487db5c40aab4063
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Update clock debugfs to support the below functionalities.
- Allow enable/disable a clock.
- Allow set_rate on a clock.
- Display the list of enabled_clocks along with prepare_count,
enable_count and rate.
- Display the register contents of all the clocks which support
this clock operation.
Change-Id: Ib67b3a3409c9e7d8adb710bb524f54f543abf712
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add vdd_class support which would help vote/unvote for any voltage rail
for the clock frequency to the regulator framework. A clock client request
for a clock frequency would look for the corresponding voltage vote and
would be send the request to regulator framework.
Change-Id: I5b1229091fcb7b3887b54735b9663fd31a35db21
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The clock rate set could fail, thus check for failure and abort clock rate
change in case the clk_set_rate fails.
Change-Id: I3a3a03f8c0c261b1f89c33e1247e3dbf889a8d26
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Voter clocks nodes would require aggregation of all child node rates.
Certain clocks that are not rate-settable can still take
advantage of voter clock functionality.
Change-Id: Ibab7a5aa6aa89236974fcd0d65ffe0bd1a7acb12
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The new API clk_set_flags could be used by hardware specific clock drivers
or clients for specific hardware requirements. These flags could be custom
defined as per hardware needs.
Change-Id: Ia67373ee2b8934c898052c68338fa86cb16070dd
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Support added for MSM clock and modifications in the clk framework to use
the MSM clock framework.
Change-Id: Ibbcf0ffbf9d30dde2dcb0e943225ad95dd4e857d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add clk_hw_is_enabled() to the provider APIs so clk providers can
use a struct clk_hw instead of a struct clk to check if a clk is
enabled or not.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
for_each_matching_node_and_match performs an of_node_get on each iteration,
so a break out of the loop requires an of_node_put.
A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression e1,e2,e;
local idexpression np;
@@
for_each_matching_node_and_match(np, e1, e2) {
... when != of_node_put(np)
when != e = np
(
return np;
|
+ of_node_put(np);
? return ...;
)
...
}
// </smpl>
Besides the problem identified by the semantic patch, this patch adds an
of_node_get in front of saving np in a field of parent, to account for the
fact that this value will be put on going on to the next element in the
iteration, and then adds of_node_puts in the two loops where the parent
pointer can be freed.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
When calling __clk_get_name() on a const clock:
warning: passing argument 1 of '__clk_get_name' discards 'const' qualifier from pointer target type
include/linux/clk-provider.h:613:13: note: expected 'struct clk *' but argument is of type 'const struct clk *'
__clk_get_name() does not modify the passed clock, hence make it const.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
If a clock provider has #clock-cells = 1 and we call
of_clk_get_parent_name() on it we may end up returning the name
of the provider node if the provider doesn't have a
clock-output-names property. This doesn't make sense, especially
when you consider that calling of_clk_get_parent_name() on such a
node with different indices will return the same name each time.
Let's try getting the clock from the framework via of_clk_get()
instead, and only fallback to the node name if we have a provider
with #clock-cells = 0. This way, we can't hand out the same name
for different clocks when we don't actually know their names.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
There are cleary typo errors so can be removed.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
If a mux clock is initialised (by hardware or firmware) with an
invalid parent, its ->get_parent() can return an out of range
index. For example, the generic mux clock attempts to return
-EINVAL, which due to the u8 return type ends up a rather large
number. Using this index with the parent_names[] array results
in an invalid pointer and (usually) a crash in the following
strcmp().
This patch adds a check for the parent index being in range,
ignoring clocks reporting invalid values.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Tested-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
__clk_set_parent_after() actually used the second argument then we
could put this duplicate logic in there and call it with a different
order of arguments in the success vs. error paths in this function.
Cc: Mike Turquette <mturquette@linaro.org>
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Remove these APIs now that we've converted all users to the
replacement struct clk_hw based versions.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk providers shouldn't need to use the consumer APIs (clk.h).
Add provider APIs to replace the __clk_*() APIs that take a
struct clk_hw as their first argument instead of a struct clk.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
While children of orphan clocks are not carried in the orphan-list itself,
they're nevertheless orphans in their own right as they also don't have an
input-rate available. To ease tracking if a clock is an orphan or has an
orphan in its parent path introduce an orphan field into struct clk and
update it and the fields in child-clocks when a clock gets added or removed
from the orphan-list.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Alex Elder <elder@linaro.org>
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: kernel@pengutronix.de
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Cc: Chao Xie <chao.xie@marvell.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Georgi Djakov <georgi.djakov@linaro.org>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Barry Song <baohua@kernel.org>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Gabriel FERNANDEZ <gabriel.fernandez@st.com>
Cc: emilio@elopez.com.ar
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Michal Simek <michal.simek@xilinx.com>
[sboyd@codeaurora.org: s/clk/core/ in new function]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The recursive spinlock implementation trips up sparse and it
complains that these functions have lock imbalances. That isn't
really true though, so add some __acquires() and __releases()
information so that sparse is quiet.
drivers/clk/clk.c:116:22: warning: context imbalance in 'clk_enable_lock' - wrong count at exit
drivers/clk/clk.c:141:9: warning: context imbalance in 'clk_enable_unlock' - unexpected unlock
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* cleanup-clk-h-includes: (62 commits)
clk: Remove clk.h from clk-provider.h
clk: h8300: Remove clk.h and clkdev.h includes
clk: at91: Include clk.h and slab.h
clk: ti: Switch clk-provider.h include to clk.h
clk: pistachio: Include clk.h
clk: ingenic: Include clk.h
clk: si570: Include clk.h
clk: moxart: Include clk.h
clk: cdce925: Include clk.h
clk: Include clk.h in clk.c
clk: zynq: Include clk.h
clk: ti: Include clk.h
clk: sunxi: Include clk.h and remove unused clkdev.h includes
clk: st: Include clk.h
clk: qcom: Include clk.h
clk: highbank: Include clk.h
clk: bcm: Include clk.h
clk: versatile: Remove clk.h and clkdev.h includes
clk: ux500: Remove clk.h and clkdev.h includes
clk: tegra: Properly include clk.h
...
clk providers are using the consumer APIs to set min/max rates on
the clock they're providing. To encourage clk providers to move
away from the consumer APIs, add a provider API to set the
min/max rate of a clock. The assumption is that this is done
before the clock can be requested via clk_get() and that the
clock rate is already within the boundaries of the min/max that's
configured.
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Some determine_rate implementations are not returning an error
when they failed to adapt the rate according to the rate request.
Fix them so that they return an error instead of silently
returning 0.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Clock rates are stored in an unsigned long field, but ->determine_rate()
(which returns a rounded rate from a requested one) returns a long
value (errors are reported using negative error codes), which can lead
to long overflow if the clock rate exceed 2Ghz.
Change ->determine_rate() prototype to return 0 or an error code, and pass
a pointer to a clk_rate_request structure containing the expected target
rate and the rate constraints imposed by clk users.
The clk_rate_request structure might be extended in the future to contain
other kind of constraints like the rounding policy, the maximum clock
inaccuracy or other things that are not yet supported by the CCF
(power consumption constraints ?).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
CC: Jonathan Corbet <corbet@lwn.net>
CC: Tony Lindgren <tony@atomide.com>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: "Emilio López" <emilio@elopez.com.ar>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
CC: Peter De Schrijver <pdeschrijver@nvidia.com>
CC: Prashant Gaikwad <pgaikwad@nvidia.com>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Thierry Reding <thierry.reding@gmail.com>
CC: Alexandre Courbot <gnurou@gmail.com>
CC: linux-doc@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
CC: linux-omap@vger.kernel.org
CC: linux-mips@linux-mips.org
CC: linux-tegra@vger.kernel.org
[sboyd@codeaurora.org: Fix parent dereference problem in
__clk_determine_rate()]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[sboyd@codeaurora.org: Folded in fix from Heiko for fixed-rate
clocks without parents or a rate determining op]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This file implements the clk API and so it should include clk.h
directly instead of indirectly including it through
clk-provider.h.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The list isn't used after of_clk_init() is called, so we don't
need to keep an empty list around after init. Put the list on the
stack.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Dan Carpenter reports that we don't check the allocation here for
failure. Add a failure check and free any previously allocated
providers from the clk_provider_list.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This contains the EMC clock driver that's been exhaustively reviewed and
tested. It also includes a change to the clock core that allows a clock
provider to perform low-level reparenting of clocks. This is required by
the EMC clock driver because the reparenting needs to be done at a very
specific point in time during the EMC frequency switch.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVU1EDAAoJEN0jrNd/PrOhYO8QAKDSJXdoVqtQITU3lUDfTB7i
g7EJfL8PjT5i1KTjJHT7/2FFuQlb7eeJexyNV539sIJtUrcDOl6qNVbq/FYNouia
bF7XqOxbR8QpWsYbQ46bzbwBaDd+CPLDwjSounNf6G4kJQy7/9SVr6BBPbLa2LIS
xzxMzr2+/CCmH9P1p2I5ey5f1fQ75DKaz8RGgv3FcltdkKNZQCTa+hthCOdicNJu
BoVHqXgJZvz0tgZk0zdCrKyUi31Gu8CNmFad7jtIS01EHGjBpgSE9m7ViYYRCFl5
GIjVh5IryCg2LJt8JP2mPCFNyiAvjxzMt/hJquzj2x2QMKrK8wgC3BwlrMUPuhkM
xkldCMXY1ImVgTbwFdAEFR08+/VybzfLu4FDZSdG4IeNKfMj0n3EirAX9gE1VHDl
bofkPZsE2Vr4N3jYekjbql3m9ZO8WsnIRz7D/Rd1OIqNyMA3xZQz79zgqQ5EQsB1
+GJztoyIdDikefCAww/z7I+vTTQ8InV/FnuzKN/SyqqLe5Ni9TFg6sCN50cnW2Ps
/wHE0KAEV6Oem0dNOISCd3cx231FAiCKQBSm0sUl0cAQ+x1E/NKs6H7vC0wrvWOo
f7072+BesVG9FPpWUg/lAD95YlPcoFdTDUep9J6mX2RB5ZfVEr9gNN04dY3tt4g2
kl37UB2qRXX0aEdkTWm2
=I0gO
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.2-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
clk: tegra: Changes for v4.2-rc1
This contains the EMC clock driver that's been exhaustively reviewed and
tested. It also includes a change to the clock core that allows a clock
provider to perform low-level reparenting of clocks. This is required by
the EMC clock driver because the reparenting needs to be done at a very
specific point in time during the EMC frequency switch.
This flag is needed to fix the issue with wrong dividers being setup
by Common Clock Framework when using the new Exynos cpu clock support.
The issue happens because clk_core_set_rate_nolock() calls
clk_calc_new_rates(clk, rate) before both pre/post clock notifiers have
a chance to run. In case of Exynos cpu clock support pre/post clock
notifiers are registered for mout_apll clock which is a parent of armclk
cpu clock and dividers are modified in both pre and post clock notifier.
This results in wrong dividers values being later programmed by
clk_change_rate(top). To workaround the problem CLK_RECALC_NEW_RATES
flag is added and it is set for mout_apll clock later so the correct
divider values are re-calculated after both pre and post clock notifiers
had run.
For example when using "performance" governor on Exynos4210 Origen board
the cpufreq-dt driver requests to change the frequency from 1000MHz to
1200MHz and after the change state of the relevant clocks is following:
Without use of CLK_GET_RATE_NOCACHE flag:
fout_apll rate: 1200000000
fout_apll_div_2 rate: 600000000
mout_clkout_cpu rate: 600000000
div_clkout_cpu rate: 600000000
clkout_cpu rate: 600000000
mout_apll rate: 1200000000
armclk rate: 1200000000
mout_hpm rate: 1200000000
div_copy rate: 300000000
div_hpm rate: 300000000
mout_core rate: 1200000000
div_core rate: 1200000000
div_core2 rate: 1200000000
arm_clk_div_2 rate: 600000000
div_corem0 rate: 300000000
div_corem1 rate: 150000000
div_periph rate: 300000000
div_atb rate: 300000000
div_pclk_dbg rate: 150000000
sclk_apll rate: 1200000000
sclk_apll_div_2 rate: 600000000
With use of CLK_GET_RATE_NOCACHE flag:
fout_apll rate: 1200000000
fout_apll_div_2 rate: 600000000
mout_clkout_cpu rate: 600000000
div_clkout_cpu rate: 600000000
clkout_cpu rate: 600000000
mout_apll rate: 1200000000
armclk rate: 1200000000
mout_hpm rate: 1200000000
div_copy rate: 200000000
div_hpm rate: 200000000
mout_core rate: 1200000000
div_core rate: 1200000000
div_core2 rate: 1200000000
arm_clk_div_2 rate: 600000000
div_corem0 rate: 300000000
div_corem1 rate: 150000000
div_periph rate: 300000000
div_atb rate: 240000000
div_pclk_dbg rate: 120000000
sclk_apll rate: 150000000
sclk_apll_div_2 rate: 75000000
Without this change cpufreq-dt driver showed ~10 mA larger energy
consumption when compared to cpufreq-exynos one when "performance"
cpufreq governor was used on Exynos4210 SoC based Origen board.
This issue was probably meant to be workarounded by use of
CLK_GET_RATE_NOCACHE and CLK_DIVIDER_READ_ONLY clock flags in
the original Exynos cpu clock patchset (in "[PATCH v12 6/6] clk:
samsung: remove unused clock aliases and update clock flags" patch)
but usage of these flags is not sufficient to fix the issue observed.
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
The debug_node field is only used when DEBUG_FS config is selected,
so declare it only if DEBUG_FS is selected.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Sprinkled all through the platform clock drivers are code like this to
fill the clock parent array:
for (i = 0; i < num_parents; ++i)
parent_names[i] = of_clk_get_parent_name(np, i);
The of_clk_parent_fill() will do the same as the code above, and while
at it, return the number of parents as well since the logic of the
function is to the walk the clock node to look for the parent.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
[sboyd@codeaurora.org: Fixed kernel-doc]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/clk.c:2700:5: warning: symbol '__clk_get' was not declared. Should it be static?
drivers/clk/clk.c:2713:6: warning: symbol '__clk_put' was not declared. Should it be static?
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
