Currently if there is a spike in system load or a thermal event which
causes the battery current to change dramatically then the TTF can jump.
While a battery is charging the TTF should be monotonically decreasing.
Track the TTF starting with the first estimate and set hard bounds of -2
and -0.1 on the slope. The negative slope ensures the TTF is
monotonically decreasing and the hard bounds on the slope smooth out
significant changes in the TTF.
Change-Id: I68a934599ff25bc5a9eb67b372b28a723532a540
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
QNOVO provides a table of expected charge current settings across the
charge cycle. Use this table to calculate the time it will take to
charge in each step. The sum of these steps is the total time it will
take to fully charge a battery.
Change-Id: I0ed48a2a63886531e761e7ce1d175a600060eaf8
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Micro resolution and 64-bit division is unnecessary; use milli
resolution instead. Measuring the IBATT and VBATT periodically during
sleep is necessary for accuracy. Don't clear the IBATT and VBATT buffers
on suspend to account for the higher charge current during suspend.
Prime the IBATT and VBATT buffers with 10 samples to get a more accurate
first estimate. Introduce a ttf mode to separate the differences in the
QNOVO version of TTF.
Change-Id: Ibc591dd5d38d4bbb712d8906755040d59181f008
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
A median filter is useful for filtering out outliers. Add it.
Change-Id: I21f97a870c262e5fb3d33b8250a2bf074f519b58
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Add support for the CC_STEP and CC_STEP_SEL properties in the BMS power
supply. These properties will be used to communicate the future charge
currents for time to full calculations.
Change-Id: I44087b42b31800d1885bdaf1f38815c8756bc9a8
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
There are several algorithms which modify the charge current in steps
across the charge cycle. CC_STEP is used to notify of all the upcoming
charge currents.
The CC_STEP_SEL property is used to select the index of the CC_STEP to
read or modify using the CC_STEP property.
Change-Id: Ieeb533b758035c1c408cdfd68f001374bf0987a5
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
status7 register will indicate all the charger bits are cleared during
the rest or discharge phase of a Qnovo pulse. Moreover those bits remain
cleared after a pulse train is done and before a new pulse train is
issued.
Hence when Qnovo is active ignore status 7 register bits.
Change-Id: Ice61f8a49625081ffbf1aacaac844b929715e818
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
There are a couple of cases where qnovo charging fails,
1. pulse train enable command register fails to write through, or
2. pulse engine fails to start and pulse train timer PTTIME does
not start counting.
In either case, qnovo charging will stop. Here is the fix,
Write register twice when enabling pulse train, and
restart pulse train if PTTIME does not increase.
Change-Id: Ic235f8f2bc67fe577e42848ef623870c25b68256
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The request is to delay ok_to_qnovo for 15 seconds after a charger is
inserted.
To achive that:
Make ok_to_qnovo variable as a votable that can be voted on by
A. HW error conditions
B. Charger is ready after debounce
Moreover since there could be two chargers -usb and dc, create another
votable to track their individual debounce states. The result of this
votable will feed in to ok_to_qnovo votable as branch B above.
Also since we need to stay awake for the debounce time, create an
awake_votable and vote on it while debounce on either usb or dc is in
progress.
Change-Id: I32dc07ba16ef0515a9683f2702d317c39baa2eba
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
At the end of pulse train ESR measurement is forced. It is expected
that when ESR is being measured, which takes about 1.5 seconds, the
next pulse train does not start.
However we see that a uevent is sent to userspace and it enables pulse
train within 100mS.
To prevent that put the pulse train enabling bit under a votable
control. And make QNI_VOTER (the userspace voter) and ESR_VOTER vote
on it.
Moreover, the current pulse train enabling path checks if qnovo was
enabled, make a QNOVO_OVERALL_ENABLE voter to this new voter to reflect
it.
Change-Id: I6d2177250cc47f5aeb6591c532ee18d37e3b02c6
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When FG IADC measurement period coincides with qnovo discharge pulses
it reads incorrect IADC values. That causes issues with SOC accuracy
and capacity learning amongst others.
The fix to IADC inaccuracy is to set a bit in the FG
peripheral while Qnovo is active.
A side effect of IADC inaccuracy fix is that the ESR
measurement goes haywire. To overcome that, disable ESR when
Qnovo is active and force an esr measurement when its between pulses.
Realize this by disabling ESR and enabling the bit when
Qnovo becomes active. The qnovo driver will set CHARGE_QNOVO_ENABLE
property on the bms psy when its active. Also provide code to
force an ESR measurement via a write to RESISTANCE property in
bms psy.
Change-Id: I7160ad6288362c17d28d67b38ec09332d9a6cbd2
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When FG IADC measurement period coincides with qnovo discharge pulses
it reads incorrect IADC values. That causes issues with SOC accuracy
and capacity learning amongst others.
The fix to IADC inaccuracy is to set a bit in the FG peripheral while
Qnovo is active.
A side effect of IADC inaccuracy fix is that the ESR measurement goes
haywire. To overcome that, disable ESR when Qnovo is active and force
an esr measurement when its between pulses.
Realize this by setting CHARGE_QNOVO_ENABLE and RESISTANCE property on
the bms psy at appropriate times in the driver.
Change-Id: I5b37083c843ec6bc052c4d344347b9a80554e226
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When transfer buffer is larger than available space, uci driver will
split the transfer into multiple transactions. Driver incorrectly
calculated the transfer length and caused infinite transfer.
Simplify uci write method to avoid such bugs.
CRs-Fixed: 2083693
Change-Id: Ic7169cefda6a4637511ecfa3ce5ddde6f3d55f8c
Signed-off-by: Sujeev Dias <sdias@codeaurora.org>
If a spinner is present, there is a chance that the load of
rwsem_has_spinner() in rwsem_wake() can be reordered with
respect to decrement of rwsem count in __up_write() leading
to wakeup being missed.
spinning writer up_write caller
--------------- -----------------------
[S] osq_unlock() [L] osq
spin_lock(wait_lock)
sem->count=0xFFFFFFFF00000001
+0xFFFFFFFF00000000
count=sem->count
MB
sem->count=0xFFFFFFFE00000001
-0xFFFFFFFF00000001
RMB
spin_trylock(wait_lock)
return
rwsem_try_write_lock(count)
spin_unlock(wait_lock)
schedule()
Reordering of atomic_long_sub_return_release() in __up_write()
and rwsem_has_spinner() in rwsem_wake() can cause missing of
wakeup in up_write() context. In spinning writer, sem->count
and local variable count is 0XFFFFFFFE00000001. It would result
in rwsem_try_write_lock() failing to acquire rwsem and spinning
writer going to sleep in rwsem_down_write_failed().
The smp_rmb() will make sure that the spinner state is
consulted after sem->count is updated in up_write context.
Change-Id: I96de9a65adedb35d1ee2c6c36dc7759c9b8f5d4d
Signed-off-by: Prateek Sood <prsood@codeaurora.org>
The patch frees the read workqueue structure after
scheduled workqueue processes the glink buffers and notifies
glink to avoid possible memory leak.
CRs-Fixed: 2083447
Change-Id: I4e562f9d1cbf02d8306e0a127835af85dfa5db23
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
Currently, flushing of control workqueue is happening
under protection which is causing a deadlock. The patch
fixes the issue by flushing the control workqueue on
immediate closure of channel.
CRs-Fixed: 2081948
Change-Id: I6a7b1ee7cbabf2974700e28fc62c6d8fa3d464ed
Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
Currently, memshare allocates 5MB memory to diag client on
receiving requests from modem. With the patch diag client
will be considered guaranteed on sdm630 to avoid memory
allocation failure on modem SSRs. Also being guaranteed
client allocated memory will never be freed.
CRs-Fixed: 2054448
Change-Id: I7b0780d064a27e8ebca9d31747ce1f9c18d84fdb
Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
In offline charging mode, modem is not loaded so the proxy
IPA clock vote added by IPA driver on behalf of modem is
never released and this prolongs the charge time. Move the
proxy vote to IPA3_POST_INIT before rmnet_ipa driver init
completes.
Change-Id: I271c8e6916d0c3068f720ae81b67f0fc5c198b6f
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
This can clearly show the firmware mode sent through QMI message
in the logs to help debugging.
Signed-off-by: Yue Ma <yuem@codeaurora.org>
CRs-fixed: 2059087
Change-Id: I0b11808f00229ed557141226bc2510673a7a1ede
An SDP may get detected as a FLOAT charger by PMIC APSD.
To handle this case do the following steps when a FLOAT
charger is detected -
1. Limit the ICL to 100mA and start USB enumeration
2. If enumeration succeeds, USB notifies a valid
ICL and the charger updates ICL and charger-type to SDP.
3. If enumeration fails, USB notifies -ETIMEDOUT and
charger applies ICL based on the Rp value.
CRs-Fixed: 2081457
Change-Id: I2747a42ed9f9531e83c53d781a8ae9baa9aa74d0
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
