Commit graph

576396 commits

Author SHA1 Message Date
David Collins
999bdeef19 ARM: dts: msm: update VDD_GFX CPR aging and loop parameters for msmcobalt
Hardware characterization has shown that a new CPR aging RO
scaling factor is required on MSMCOBALT v2.  Change this value
to match characterization results.  Also specify a CPR count
repeat value of 1 to override the implicit 0 default in order
to improve CPR closed-loop voltage settling stability.

Change-Id: Idb1aa513ca2a0265c9aab9c2529499e59da97167
CRs-Fixed: 1080409
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-10-28 14:17:37 -07:00
Linux Build Service Account
bcd8ec9210 Merge "Merge remote-tracking branch 'msm-4.4/tmp-510d0a3f' into msm-4.4" 2016-10-26 13:13:24 -07:00
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b12304a536 Merge "clk: osm: msm: allow WDOG status register to be enabled via debugfs" 2016-10-26 13:13:23 -07:00
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6d89479bd3 Merge "msm: mdss: fix crash when wrong params are passed on the esd config" 2016-10-26 13:13:21 -07:00
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604c0ceedb Merge "icnss: Do top level reset when timeout to pull register state" 2016-10-26 13:13:20 -07:00
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5b7da25887 Merge "mdss: display-port: add support for hdcp 2.2" 2016-10-26 01:10:43 -07:00
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c3b776a3ae Merge "icnss: Stay awake during recovery" 2016-10-26 01:10:40 -07:00
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3319e8c1d7 Merge "ASoC: wcd934X: Update TX gain correctly after decimator enable" 2016-10-26 01:10:39 -07:00
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49cc9d17a4 Merge "ASoC: wcd9335: Update TX gain correctly after decimator enable" 2016-10-26 01:10:38 -07:00
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84072dbeee Merge "ARM: dts: msm: configure the WLED sink correctly for msmcobalt platforms" 2016-10-26 01:10:36 -07:00
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22d4148b42 Merge "clk: qcom: Remove non-op BRANCH_HALT_NO_CHECK_ON_DISABLE flag" 2016-10-26 01:10:35 -07:00
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9b87ed2468 Merge "lpm-levels: Change _WARN_printf to pr_err when residency < 0" 2016-10-26 01:10:34 -07:00
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2d51941989 Merge "clk: Check for failure at clk_change_rate" 2016-10-26 01:10:33 -07:00
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0ff93a3e06 Merge "ARM: dts: msm: update VDD_GFX CPR RO scaling factors for msmcobalt v2" 2016-10-26 01:10:32 -07:00
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cf4ce23d22 Merge "msm: vidc: Update log level for power collpase" 2016-10-26 01:10:31 -07:00
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d40c1c45da Merge "msm: vidc: Check ion_handle for errors" 2016-10-26 01:10:31 -07:00
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ade6f4501d Merge "iommu/arm-smmu: on domain destroy invlidate domain cfg" 2016-10-26 01:10:29 -07:00
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8a6107696c Merge "msm: camera: sensor: Update CSI PHY setting for msmcobalt" 2016-10-26 01:10:28 -07:00
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7729df580a Merge "msm: camera: Restructure data handling to be more robust" 2016-10-26 01:10:27 -07:00
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221e6dc71a Merge "msm: camera: AV timer support for HAL3" 2016-10-26 01:10:25 -07:00
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3127c29d05 Merge "msm: sensor: Adding mutex for actuator power down operations" 2016-10-26 01:10:24 -07:00
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7269d7991e Merge "msm_serial_hs: Add defensive checks due to sudden port close" 2016-10-26 01:10:23 -07:00
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e76e6c8d93 Merge "coresight: tmc: skip tmc read if mem allocaiton failed" 2016-10-25 18:31:06 -07:00
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4fc7d493eb Merge "sched: Set curr/prev_window_cpu pointers to NULL in sched_exit()" 2016-10-25 18:31:05 -07:00
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9f8e4e930a Merge "soc: qcom: use interruptible wait_for_completion API" 2016-10-25 18:31:04 -07:00
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cdb01bf466 Merge "ARM: dts: msm: enable VDD_GFX CPR aging adjustments for msmcobalt v2" 2016-10-25 18:31:03 -07:00
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8114dc9b37 Merge "ASoC: msmcobalt: Add independent clock support on codec" 2016-10-25 18:31:03 -07:00
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6c6aeff205 Merge "ASoC: wcd934x: Update CPR register defaults" 2016-10-25 18:31:02 -07:00
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a1989e62bc Merge "drivers: soc: Initialize return var to default value" 2016-10-25 18:31:01 -07:00
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0861ec02cc Merge "soc: qcom: Use a deferrable timer base for the msm watchdog" 2016-10-25 18:30:59 -07:00
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349ce03687 Merge "qpnp-fg-gen3: Fix storing nominal capacity to actual capacity" 2016-10-25 18:30:58 -07:00
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6cc1473d14 Merge "USB: pd: Fix compilation issues for 32 bit support" 2016-10-25 18:30:57 -07:00
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df72265f5a Merge "ASoC: wcd9335: Fix register sequence for CPE configuration" 2016-10-25 18:30:55 -07:00
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e4fab74617 Merge "ASoC: msmcobalt: Add CPE ECPP DAI instance for ECPP path" 2016-10-25 18:30:55 -07:00
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82f8a0f9ac Merge "ARM: msm: dts: add second CPE session for msmcobalt" 2016-10-25 18:30:54 -07:00
Syed Rameez Mustafa
5c647926d0 sched: Set curr/prev_window_cpu pointers to NULL in sched_exit()
trace_sched_update_task_ravg relies on NULL pointers to ensure that
it doesn't access them. Make sure that when a task exits, these
pointers are set to NULL. Otherwise any call to update_task_ravg()
between sched_exit() and releasing the task structure will access
bogus pointers. In some cases those memory locations are unmapped
and cause a kernel panic.

Change-Id: I9eebb4fb35aca2c8424bfb29ae9d833650dc5ad4
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
2016-10-24 18:44:02 -07:00
Osvaldo Banuelos
3dabb862f0 clk: osm: msm: allow WDOG status register to be enabled via debugfs
Enabling WDOG status register by default has power penalty.
Add support to allow the register to be configured via debugfs
instead.

CRs-Fixed: 1081757
Change-Id: I13156d82f544cd28a1579c23b18182c879c85767
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
2016-10-24 17:39:33 -07:00
Vidyakumar Athota
b51f826e9f soc: qcom: use interruptible wait_for_completion API
Device suspend fails because of un-interruptible blocking read
function. Use wait_for_completion_interruptible API instead of
wait_for_completion to allow device suspend.

Change-Id: Ia537e776d0b322d56cd6003f95cdded5e695ceeb
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
2016-10-24 17:03:40 -07:00
Yuanyuan Liu
0b2474a9bf icnss: Do top level reset when timeout to pull register state
When system timeouts to pull register state, we do wsi error
recovery, which causes an AHB bus hang. Fix this by doing top
level reset instead of wsi error recovery.

CRs-Fixed: 1080014
Change-Id: Ic5dbac9c2cd31f3193ede7cdc64249f7514e3e98
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
2016-10-24 16:42:57 -07:00
David Collins
bb57d8b8e1 ARM: dts: msm: enable VDD_GFX CPR aging adjustments for msmcobalt v2
Enable VDD_GFX CPR aging adjustments for MSMCOBALTv2 parts with
CPR fusing revision greater than or equal to 2.  At most 15 mV
can be added onto the open-loop and closed-loop voltage as a
result of an aging measurement at runtime.  This maximum 15 mV
adjustment was previously accounted for in the fixed open-loop
and closed-loop voltage adjustments.  Therefore, remove 15 mV
from both the open-loop and closed-loop voltage adjustments for
all corners.

Change-Id: I44487bfcb4e21d76948cd836ad2dae18bc3d22f4
CRs-Fixed: 1081084
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-10-24 15:21:45 -07:00
Sudheer Papothi
80e0e34f04 ASoC: msmcobalt: Add independent clock support on codec
WCD9335 codec has single master clock supply widget for both
playback and recording paths. Adding separate clock supply
for playback and recording paths will help handle low power
audio recording usecases without affecting playback usecases.
Change is to enable separate clock supply widgets for playback
and recording paths.

CRs-Fixed: 1022917
Change-Id: Ia02a1ffed911498dd6eb5df246e6da68a7802a92
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2016-10-24 15:21:19 -07:00
Phani Kumar Uppalapati
66d2648b11 ASoC: wcd934x: Update CPR register defaults
Update wcd934x codec register defaults to enable
CPR hardware block for reducing the power consumption
in rock bottom sleep mode.

CRs-Fixed: 1081673
Change-Id: Ib75655d52e5d85d649ebfcb971caf3f5b0b6dc80
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-10-24 14:59:38 -07:00
Phani Kumar Uppalapati
9d9b34eb90 drivers: mfd: Mark CPR bank registers as volatile
Mark CPR bank registers as volatile so that
writes to these registers get updated correctly
in hardware.

CRs-Fixed: 1081673
Change-Id: I92d0511b4e9912dfa346378784d811f6606df205
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-10-24 14:54:06 -07:00
Subbaraman Narayanamurthy
01109ac391 qpnp-fg-gen3: Fix storing nominal capacity to actual capacity
Currently, nominal capacity is stored back to the actual capacity
only when the actual capacity is non-zero. However, that can be
true when the battery is inserted for the first time. This makes
the actual capacity to be stored only when a capacity learning
cycle completes. Other algorithms like to use actual capacity
before that. Fix it.

Change-Id: I346085ec722f491f96181ef1beb383710b441f4b
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-10-24 14:05:44 -07:00
Vikram Mulukutla
1d60d26f96 soc: qcom: Use a deferrable timer base for the msm watchdog
It is possible that normal CFS latencies in the presence of
very heavy task load causes timer migration to be delayed
in hotplug paths. This may in turn prevent the watchdog kthread
from waking up, resulting in a bark.

Technically the watchdog is supposed to be a last-resort
failure recovery; even in this stressful hotplug scenario
the device is *usable*, just incredibly slow. It is arguable
that the watchdog should not have fired in this case, and
the petting mechanism should handle this scenario.

Move the timer to a deferrable timer base. We are really not
using the "deferrable" aspect of the timer, but the fact that
we (msm) also changed deferrable timers to run on any CPU.
This underlying change will allow the watchdog timer to be
handled on any CPU.

This completely depends on the fact that we don't have to
pet the watchdog when *all* CPUs go idle, which would
make sense from a power perspective anyway.

Change-Id: Ie389e28ff890a805854f921e4cd491a296a32925
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-10-24 12:33:46 -07:00
Satyajit Desai
2b5e9d5cb6 coresight: tmc: skip tmc read if mem allocaiton failed
Add NULL pointer check to ensure that we do copy to user only
when we were able to allocate memory for ETR.

Change-Id: I09b4bc37617811fd4acd86a7e4f5ef91630675df
Signed-off-by: Satyajit Desai <sadesai@codeaurora.org>
2016-10-24 10:57:41 -07:00
Subbaraman Narayanamurthy
f410c92004 smb-lib: update displaying battery overvoltage in health property
Currently, smb2 charger is configured to not end the charging
cycle when battery overvoltage occurs. However, when the battery
overvoltage status is read, it will be displayed through health
property. Improve this by reading the battery voltage and check
whether it is within 40mV headroom above float voltage. If it is
above that threshold then continue with displaying overvoltage
status.

CRs-Fixed: 1079363
Change-Id: I45847f446c91c80a5110d80b59a0ae4b8e2c40e5
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-10-24 10:35:08 -07:00
Vijayavardhan Vennapusa
99d25c7fcd USB: pd: Fix compilation issues for 32 bit support
Compilation errors are seen from qpnp-pdphy.c and policy_engine.c
drivers, when try to compile for 32 bit support. Hence fix those
errors for 32 bit support getting compiled successfully.

Change-Id: I0c496a73feb83c640f9a135f98ec393d1096b205
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
2016-10-24 17:15:29 +05:30
Praneeth Paladugu
9bdfb919ed msm: vidc: Update log level for power collpase
Update Power collapse log messages to VIDC_PROF to be in
sync with other clock related logs. Today these logs are
at VIDC_DBG and VIDC_INFO which also has lot of other logs.

Change-Id: Id69802df24c4eaf4d8e9bc0c438d250090f9a38f
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
2016-10-23 22:00:47 -07:00
Raju P.L.S.S.S.N
46112a9d4a lpm-levels: Change _WARN_printf to pr_err when residency < 0
Change _WARN_printf to pr_err as former prints stack and
register dump in logs which is not necessary.

Change-Id: Ib0323014017818668a4a634e463f751fd5e9d24a
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
2016-10-22 22:40:42 -07:00