Display port pixel clock source is required to propagate the set rate to
parent, so update the flags for the same. The lowsvs frequency has got
updated to 154MHz, update the same.
Change-Id: I67a5ff3b5fb18c2ce986c5f431f4e41a78fe13a5
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The display port PLL generates only limited set of frequency combinations.
As fractional dividers are not required to be used, update the RCG ops to
take care of the same.
Change-Id: I601273fee044ef128dbc7c2e23bc2d8ce10e31dc
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add a property to the PD PHY peripheral to specify the default
sink capabilities for USB PD as 5V @ 3A, 9V @ 3A and 12V @ 2.25A.
These are common values that should be supported on most boards,
but can be overridden as necessary.
Change-Id: I5ea95d2f0532c59f7d83cb608d939ad28a8bb28e
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Add a device tree property to allow specifying the supported
set of sink capabilities. If not specified, fall back to a
single capability of 5V @ 3A.
Change-Id: I394061d9f3070099e35b651ce4b63a7993343bf1
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Factory QNOVO IADC OFFSET trim values are wrong polarity. To fix it,
update both (reg QNOVO_IADC_OFFSET_0 and QNOVO_IADC_OFFSET_1) with
their two's compliment, respectively.
Factory setting of QNOVO_STRM_CTRL is also wrong. It controls
polarity of the raw IADC bitstream. To get the correct IADC bitstream
polarity, set 0 to register QNOVO_STRM_CTRL.
Set range [1,255] for QNOVO PPCNT parameter, so the right value can
be written.
Change-Id: I7be948b09c96aae4077a8f010c951c6ebd22a0fa
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Current driver read if any nrt vbif is present
and if it is not, the number of qos priority
levels gets wiped out, causing the driver
not to program the vbif qos priority levels for
the rt client. Fix this problem by making sure
that if a vbif nrt does not exist in the platform,
driver only ignore the nrt settings, but keeps
programming the vbif rt.
Change-Id: I2fe5eea5a2ff852b22a59cdb0139b17f3dd7c494
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Enable panel orientation property in QRD device to flip
the panel by 180 degrees for msm8998 target.
Change-Id: I3e91ed69de150b970d2e1678833d0d4cca659eef
Signed-off-by: Harsh Sahu <hsahu@codeaurora.org>
Adapt to latest changes to IPA micro-controller (IPA uC).
For pipe SUSPEND, IPA uC will fail in case the pipe is not empty.
IPA driver needs to insure pipe is empty and then issue a SUSPEND command.
For pipe DISABLE, pipe is already empty on SUSPEND,
IPA driver does not need to do ensure anything before
issuing a DISABLE command.
Change-Id: Icfc4745c666997c63be6e9444bf611fb4cbd1934
CRs-Fixed: 2002190
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
The QNOVO discharge FET gate is driven by PMI8998 GPIO pin. Configure
GPIO6 to route the internal QNOVO discharge FET control signal to the
pin.
Change-Id: I4dea54c1952d0da21f2bdb8a41b421cab558cafa
Signed-off-by: Harry Yang <harryy@codeaurora.org>
In case there is pending data submitted to IPA, IPA RM resource should
not be released. The resource release happens only when all packets were
processed by IPA.
CRs-Fixed: 1116262
Change-Id: I19756cbe4f84a5d09853d6066362e4a2c9ae1f73
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Data pointer has been reused after freed it. So,
it has been moved to after using the data pointer
to clean up resource and freed it.
Change-Id: Ibc94e092134ff1f36e896c679ade7f639254a24d
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
Reset the freeze vote after modem SSR to allow IPA clock gating.
Change-Id: Ice78831abc52aed44d640109e1453da7e2af9702
CRs-Fixed: 2002197
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Update sensor id flag for sdm630 such that thermal
client can obtain the HW ID for the available
temperature sensors (TSENS) with sensor ID details.
Change-Id: I70a1c7e4a420dc41591f021da499efe10b7fd6ae
Signed-off-by: Rama Krishna Phani A <rphani@codeaurora.org>
Changing the clock source frequencies to lower
working frequencies so that the camera runs in
SVS_L1 mode, which reduces the power consumption.
Change-Id: I92344fcd0f4492badd6a50c011b0aa8b4231a373
Signed-off-by: Samyukta Mogily <smogily@codeaurora.org>
in kgsl_pwrscale_init(), add missing NULL check for kgsl_midframe
to avoid further accessing, in case if memory is not available.
Change-Id: If6a4e59d4675fe67aefc63d7f8251f4d28ddeec5
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Enable NAP state for A512 GPU to save power.
Change-Id: I3c643c90d39ab33c11146b5864b20c14bc9a339a
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Enable retention of memory and periphery logics for
GPU core clock. If the setting is not done then GPU
might get stale data while switching from NAP to
ACTIVE and which leads to page faults or hangs.
Clock settings need to be handled by client drivers only
and hence do it in KGSL driver.
Change-Id: Iea3fd720e2a0eda9f6ee719177a8898bc2bd75e4
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
On sdm660, VDDIO needs 1.8V and LDO11 is voted for 1.88V
which is causing higher power numbers. Update the vote
correctly for LDO11.
Change-Id: Id6178d312394a4c4bebb77659f6eb7e21574137b
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
Add msm-core device to run power and temperature
calculation on the cores.
Change-Id: I35045e2dd96d9bf498cf8889eadf0959b345884a
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
The LDO300 regulator supplies power to GPU subsystem of sdm630.
Update GFX LDO regulator driver to support LDO300 regulation on
sdm630.
CRs-Fixed: 2000929
Change-Id: I7ae9834f47763e06e110c03c4cf4220fe044659e
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
