Report status that indicates individual charger errors,
including JEITA, battery, charing disabled, etc.
Change-Id: I5a02d9f86237ae1a05b71e78f17db8c39f35594f
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Add property qnovo_enable to enable qnovo charging. Also add
property pt_enable to enable pulse train.
Extend QNOVO algorithm's control of voltage and current after
pulse train stops and as long as qnovo_enable = 1.
The interrupt ptrain_done is configured wakeup capable.
CRs-Fixed: 2013069
Change-Id: Icb61e0e0169283f5f52a4994431489dde0af1c73
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Disable handling of single bit errors for SDM660, as they are
correctable.
Change-Id: I14618e5f2685c08c57a6375e7a80d1090bbf0eaa
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
(cherry pick from commit 179448bfe4cd201e98e728391c6b01b25c849fe8)
This patch adds a max block check for get_data_block_bmap.
Trinity test program will send a block number as parameter into
ioctl_fibmap, which will be used in get_node_path(), when the block
number large than f2fs max blocks, it will trigger kernel bug.
Signed-off-by: Yunlei He <heyunlei@huawei.com>
Signed-off-by: Xue Liu <liuxueliu.liu@huawei.com>
[Jaegeuk Kim: fix missing condition, pointed by Chao Yu]
Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>
Bug: 28271368
Git-repo: https://android.googlesource.com/kernel/tegra.git
Git-commit: 3c714201e02ec08652be4b9544a5267e79bde3a9
Change-Id: Ia5acae04522993d5b60a0bcb5ccc184c66532be8
[d-cagle@codeaurora.org Resolve trivial merge conflicts]
Signed-off-by: Dennis Cagle <d-cagle@codeaurora.org>
Add vbus regulator in USBIN-USBIN parallel mode.
Change-Id: I57d5cc54aa789a942d5b1a5bc33677ba263d3284
Signed-off-by: Harry Yang <harryy@codeaurora.org>
More than one parallel configurations between PMI8998 and SMB138x are
supported. Update the parallel mode from DT.
Change-Id: I07c30e8d4d860acaf24dd5d0608dca6ba3e65559
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Some of the device configurations support multiple external SOCs.
To differentiate physical links, add support for additonal info
about the physical link.
CRs-Fixed: 2024578
Change-Id: If71bf23d798f8bf0b6594a686415fe9b806e4226
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>