The step version is different between msm8996 and msm8937 even
though the major/minor versions are the same. Update the DSI PHY
and clamp register programming for msm8937 by checking for the
step version to avoid incorrect DSI register programming.
Change-Id: Ia9582b2779f40429586e8709bb73c9a5c79bd6c5
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Simultaneous buffer maps with read and write permissions are
possible due to the asynchronous nature of MDSS driver.
Client stages the same buffer on MDP & ROTATOR. It calls the map
API for both at the same time. Due to concurrency, the source buffer
is mapped by MDP before and is ref-counted. ROTATOR API called later never
updates the permission which is required for dst buffer.
This leads to permission fault. Requesting the map with DMA_BIDIRECTIONAL
flag to fix the issue.
Change-Id: Ieb819820b19d163fee541dd571c5a58dc78be7d3
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Fix compilation issues with unsigned division. Also build
errors are seen for 32bit compilation as local variable of
mdp_overlay in function mdss_mdp_overlay_get_fb_pipe has
huge size which crossing the 1024 limit. Use heap instead
of stack in this case to fix the issue.
Change-Id: I67e8498421d2e116e77076637716708cfc289c96
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
unify smmu probes for qsmmu and arm smmu since most of
the functionality is common.
Change-Id: I2a3ef5c95bf0008d9e1869decb25d7e3043a0786
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Display Steam Compression (DSC) use-cases requires parameter calculations
that affect MDP and DSI separately. Current implementation is not modular
and calculates all the parameters in one big subroutine. Due to this, an
issue has occurred where parameters that affect DSI relies on picture
width where as DSI parameters should be calculated only based on
uncompressed width to a particular DSI controller.
Also current MDP driver tries to service DSC setup for all different
topologies in a single subroutine and has become very error prone.
Modularize MDP DSC setup so that it is easy to maintain and also add
support for partial update for 4K DSC split-panel.
Change-Id: I7057e6a5a22a72a9a216e5bc9f7f946675bfbbb8
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
MDSS software should trigger frame timeout when command mode
interface recovery is in progress. After this new place for
event, there is a small window where wait4pingpong and recovery
path both can trigger this event. Use atomic_add_unless api
instead of read and dec so that it would add protection and
avoids timeline update multiple times for same frame update.
Change-Id: I412c6341ac4d547acde914409481e9b57b2b88f2
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Adding initialization of appropriate flags related to QoS
and UBWC settings in MDSS capabilities for msm8937.
Change-Id: I16aaf0dd39ce6150183f9b71d4573fdbad62a1da
Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
During kernel boot up, the splash memory is unmapped and released
at the beginning of first display commit during overlay start. By this
time, MDP will not start fetching the new buffers that are queued as part
of first commit. This can cause IOMMU page faults on the splash memory
since the buffer is unmapped but IOMMU is attached as part of overlay
kickoff. Hence, perform splash cleanup after waiting for a vsync
during kickoff cycle.
Change-Id: I0b6656f1cc2be9d96fd29e92b99b5aaed94eeb54
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Modify the Rotator and WFD OT setting as per recomendations
from systems team.
Change-Id: Ic523230ff0343bbac6c001080cce88acda4b3c7e
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Add support to configure pluggable feature through device tree,
but not hardcode inside driver.
Change-Id: I1aaf8a65c1910e22bdaf678d0d02d7fe791937bf
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
For PHY v2, the phy timing structure is different than PHY v1.
This change updates the phy timing structure with the latest
calculated PHY timing parameters for the given panel and refresh
rate.
Change-Id: Ibed32af5578a6dea5eb0f77d3bd0f102db6161dd
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
The doze_suspend and stop state resets the
recovery handler. It is required to register it
again in doze mode because there can be frame
update in this power state.
Change-Id: I1bef7cdd63f21698aca18d326074ac3a0e4e5de4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Use busy wait while waiting for DDC read and write to complete.
Using completion APIs to wait can result in thread to schedule
and waking up the thread back can cause a delay of 30 - 40 ms
or more. HDCP 2.2 authentication protocol uses some strict
timeouts and can be as low as 20 ms. Avoid any possible
scheduling and use busy wait to complete the DDC transactions
within allowed time.
Change-Id: I1c12d594a6e1e671fbaa4d197e375070deedc78d
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add pluggable information into panel info to let other modules
know that this interface supports HPD (Hot Plug Detect) and can
be dynamically connected or disconnected.
Change-Id: I8322b60c337cd2f46a4a500ad1a6083875f6206b
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
The programming of the DSI Phy timing registers are dependent on
link frequency. In the current implementation, these values are
pre-computed statically based on the link rate required for a particular
panel. This approach does not scale very well, especially for use cases
when dynamically changing the refresh rate or resolution for a panel.
To address this, add support to dynamically compute the value for dsi
phy timing registers based on a particular link rate.
Change-Id: If1ff545318a540baee66f5357c519d7f428510c1
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
[cip@codeaurora.org: Moved new file location]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Notify user space with only backlight changes that pass the backlight
threshold check.
Change-Id: Id2fef0a2d9c883d0e68a5ad6be699858be6898ae
Signed-off-by: Ping Li <pingli@codeaurora.org>
Commit be5fd56b0dbcb6a80b0e0322e77a1d368a840746 ("msm:
mdss: use usleep_range instead of msleep in mdss util")
replaces the msleep with usleep_range but does not fix
the sleep duration. That leads to invalid wait time
after vreg pre/post on/off operation.
Change-Id: I47ae12eda393fd6367e7045a9bd91add3bb4a942
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflicts]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
During mode switch, split_mode was set to pp split by checking
if the panel is in split_mode and MDP supports pp split. This
leads to faulty configuration as pp split should be set only
when the panel setting has pp split and MDP support it. Add
proper checks to set the split mode correctly.
Change-Id: I2f2c10bebcb3ce7d38c37ff09a25d864a89e646a
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Secure display works with default orientation. Fail
rotator request during secure session to avoid non-secure
or invalid buffer fetching from rotator smmu.
Change-Id: If99481c8a31a466166edb2b393fef19bc2a983b9
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Apart from authentications start, if any other work is already
queued, do not return any error in that case as the work is
going to run eventually. This doesn't apply for authentication
start as last session should have been closed before new one
is started.
Change-Id: If5f61f05758135d303974f8bd824ffcc9387259d
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add support to let the user select and switch to a particular
resolution over HDMI.
Change-Id: I8cd056fe120c9a459e9df22d3121203278973f4c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add necessary buffer size checks for deinterlace layers during
validate. Invalid src rect configuration on mdp hardware was
leading to unmapped memory access. A valid bound check fixes the
input validataion and avoids such memory access.
Change-Id: Ic83ef5ea008e8d8043ab2bcf9278ec72e0269fa1
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Border offsets are taken from the ctl during pipe configuration
and if mixers are not associated with ctl, it might lead to NULL
pointer dereference. NULL check was missing while logging the
border offsets. Add proper checks to avoid it.
Change-Id: Ieefab77dac21e1eb1cffcfb71979c240a490041d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Update the DSI controller version and DSI PHY regulator
enable sequence for msm8937 platform.
Change-Id: I42a79a93322d5e58c1b01d8ee575063257f492cf
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Initial set of changes to support msm8937. This includes
adding MDP HW version for msm8937, and some makefile
changes.
Change-Id: I0646ea76060696d4fe35e3f6f5f2a949474c0b8b
Signed-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict.
Remove makefile changes, always build mdss_mdp_pp_v1_7.c]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Gamut may not be present in all targets. The device tree
offset for gamut can indicate presence of block on target.
Program gamut if gamut offset is present in mdss device
tree. Also allow parsing of further PP block offsets in
device tree even when gamut entry is absent.
Change-Id: I87d057190dcfdb3cb57d88ea3b6d68f02deac5fa
Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
The HDMI transmitter core can be used to program the sample
present value of the audio sample packet. The sample present
value is determined in the audio driver and sent as part of
the parameters to the audio setup interface.
Change-Id: I8d580f95467343328ec0d24efc48dabf8a41ad49
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
[cip@codeaurora.org: Removed sound/soc/codecs/msm_hdmi_codec_rx.c changes]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Set the dmap to correct translated physical address during
dsi_alloc_buf and also include GPF_DMA flag during kzalloc
to ensure the address allocated is 32-bit.
Change-Id: I5b0445eda6c4a93ca321ca9469626ecce4a167e9
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
The previous AD backlight calculation formulas assume that the
BL_LIN, BL_LIN_INV and BL_ATT LUTs are monotonically increasing,
which can cause miscalculation when non monotonic LUTs are used.
This patch fixes the problem by removing the above assumption.
Change-Id: Ifee9dc067de8c6dbd24aac407ba702a13241f782
Signed-off-by: Ping Li <pingli@codeaurora.org>
The backlight update between unblank and kickoff
call may result in garbage/snow screen on panel
based on panel ram initialized status.
For ex:
-> Unblank the panel - black frame transfer start,
panel is on but ram is still
uninitialized.
-> backlight update - turn on the backlight. It will show
data from uninitialized ram because
frame transfer is not complete yet.
This can be avoided by blocking the backlight update
request between unblank and first frame kickoff. This
gives guarantee that panel has valid data to display
when backlight was turned on.
Change-Id: I09c707cd10acd53bd6aa0935885269ffc5aec649
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Use proper timeout values for polling scrambling status from sink.
Clear the interrupts and stop polling after timeout if scrambling
status is not updated by sink indicating it has not detected
scrambling signal.
Change-Id: I3cac01ef261ee958fd0bbecf88edde5305b20ee7
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Change initial line buffering calculations for DSC as per updated
recommendations. Without enough buffering, in certain conditions DSI
underflow can be observed.
CRs-fixed: 932124
Change-Id: Ia1b04558104061020981ade9a9c86777902360c2
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Implement timers as per HDCP 2.2 standard for every message exchanged
with sink. The standard provides round trip timeout values for each
transaction. Use these timeout values and consider it as authentication
failure if timer expires.
Change-Id: I1fb647b70b8c3aafaeb6e91fd3f636d387247133
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
The pipe_mapped and pipe_next_map are used to keep track of the
pipes staged in the mixer. The former is used to keep track of the
pipes which are currently used by the hw while the latter keeps track
of the pipes staged for the next frame. During overlay off, this seems
to be off track as only the pipe_next_map would have the updated status
and both would be in sync only after the next commit cycle. This would
cause the mixer to check for invalid pipes during the ctl_stop. Fix the
pipe_mapped state to have the current staged pipes during overlay_off.
Change-Id: I554f753441c54ceedb9dec809effc1119063e59d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
MDSS driver uses file pointer to track the client
and associates the resources based on it. There can
be a race condition between to clients ioctl call
and it can lead to track resources with wrong
caller. This can leads to release/reallocate
resources prematurely to other client which may
show blank screen on display.
One good example client call flow is:
<-step:1-> fb_open by client-X
<-step:2-> fb_open by client-Y
<-step:3-> fb_ioctl by client-X
<-step:4-> fb_ioctl by client-Y
<-step:5-> fb_ioctl by client-X
<-step:6-> fb_close by client-Y
If step-5 and step-6 both are running on two different
CPUs at same time then it may overwrite the file node
unintentionally.
This change tries to pass the file pointer as one of
the argument to IOCTL call. It avoids usage of mutex
lock to support the concurrent calls.
Change-Id: I0bfd76358c80892c8e4f56298bce6c33b4132550
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Register debugfs node to read from and write to the panel command
data type. The default data type is DCS_LONG_WRITE 0x39.
Give following command in adb shell to read panel register:
cat /sys/kernel/debug/mdp/panel_cmd_data_type
To write panel command data type:
echo "command_data_type" >
/sys/kernel/debug/mdp/panel_cmd_data_type
Change-Id: I6dbe5bccb3142e93400825eddf7f05180acfc710
Signed-off-by: Yang Xu <yangxu@codeaurora.org>
By reusing pipes from cleanup pool, there is no need to
block user client while commit with cleanup is in progress.
This allows async calls from user space during prepare
cycle.
Change-Id: I688196320ed5ffad36b9f09b89fd512035887d6d
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Current driver has an optimization where if pipe parameters are not
changed between consecutive updates then it will skip pipe's HW register
programming. However when partial update is enabled and ROI is changed
compared to previous update, pipe's HW programming should not be skipped
because HW is programmed with stale ROI for that given pipe. Fix this by
forcing pipe HW programming update if ROI is changed.
Change-Id: Iebff043ecbb35b22ffbe344bdffa830602437252
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
When 2 soft slices per DSC encoder without merge is used, HW expects
certain DSI pixel clock to MDP clock ratio. If not maintained, DSI can
underflow. This happens if full-frame is split into 4 slices, thus
requiring 2 DSC encoders, 2 soft slices per encoder. Now if partial update
frame is left-only or right-only with 2 slices then normal topology would
dictate using 1 DSC encoder with 2 soft slices. However during partial
update, we don't change the pixel clock, but mdp clock is reduced because
less number of pixels needs to be processed. This changes the ratio
mentioned earlier and DSI underflows. To fix this, either we increase the
MDP clock rate or change the topology such a way that we use 2 DSC
encoders with 1 slice each. Implement later option to avoid increasing
MDP clock.
Change-Id: Ia37d8045baefcd1e680902446b4725d279db6a89
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Any smart panel with DUAL_LM_SINGLE_DISPLAY split mode with support for
partial update requires runtime topology changes when update is using
only one layer mixer. Specifically, when right-only partial update is
needed, MDP topology needs to switch to ping-pong associated with right
layer mixer and disable left layer mixer path. Add changes to support
these use-cases dynamically.
Now when Display Stream Compression (DSC) is used with this split mode,
there are certain restriction from HW when switching from left+right
update to right-only update. During such scenarios we cannot use right
layer mixer based data path and have to use left layer mixer based
data path. Add quirk based logic to use this mode.
Change-Id: Ic450cab4762337c94a5b1cb14b1d979a83fceee6
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
ich_reset override should be used only when partial update is enabled
where full frame and partial frame have different number of slices.
Since it is not dependent on panel, remove its configuration from
panel device tree and dynamically configure based on current frame
information.
Change-Id: Ia7d66e4a3e1b8bb1bab71e6a2d24eb58e00c238c
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi updates]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
When Display Stream Compression (DSC) based smart panel is used, MDSS
can drive data to panel in various different data path topologies.
Now when partial update is enabled, along with change in data path
topologies, DSC configuration also changes, i.e. number of slices
per line, number of encoders used, picture size etc. Enable left+right
or left-only partial update for DSC based smart panels.
Change-Id: I03b5eb6c7f0b010078ccc0112d8ce3aca2da6b7b
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Fix FPS calculation when a new resolution is found in DTD
of EDID of the sink.
Change-Id: I5bb168f269a7328331884591a7d882496a6f6ece
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update audio routing based on minimum encryption level requirements.
In case current HDCP status is different than what is required, do not
switch audio to sink and set avmute. If required level is minimum,
route audio to sink and unset avmute.
Change-Id: Icef9d4901682d774c3ace95c6dbe6b8fe67eac0f
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Make DDC hardware to poll for rxstatus during link integrity
check and acknowledge corresponding interrupts. Stop polling and
wait for timeout on getting new message, re-authentication required
or message ready interrupts based on rxstatus.
Change-Id: Ie8b1bc1b700589196f41b00ceb759458102f4064
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Validate current hdcp lib state before starting new hdcp session.
Double buffer the sink message and protect its access with mutex
to handle fast re-authentication requests.
Change-Id: I039b1a0c818a2e66eef583afb15420ce8587a75c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Enable both software and hardware interrupts for DDC to
properly check for DDC engine being idle before any new
DDC transaction.
Change-Id: Iaab95483954e76397620a9f708982de060318d8a
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Calculate timeout values in terms of hsync with respect to resolution
timing. For a given timeout value, calculate number of lines that will
take that much of time to be transmitted to sink. Use that value to
program the hardware for timeout.
Change-Id: I9606180d4c9b2d666dbac3d807f5bb61b84af68e
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
