In the cases that have FPC cable between main board and sub-board, USB
connector located on sub-board, add re-drive chipset on sub-board to
make sure the signal of rx/tx for super-speed is good enough.
Change-Id: I4a778b0eb6ba43a35a88425f2279041ba038da95
Signed-off-by: Liangliang Lu <luliang@codeaurora.org>
There is a leakage path in the TADC block while the device is shutdown
or is in deep sleep mode. To fix this hw problem, the driver needs to
disable hw conversions and enable direct test mode while charger is
plugged out, kernel goes to suspend or device shuts down. The driver
needs to undo those changes when charger is plugged in, kernel resumes
or device powers up.
Moreover while disabling hw conversions it is advisable to wait until
the current conversion is complete.
To realize this
* create a tadc_disable_votable, where the three usecases viz. charger
presence, suspend/resume and shutdown will vote. Enabling it will
disable hw conversions and enable direct test mode and vice versa for
disabling case.
* update complete to complete all since the disable path may be waiting
for conversion to complete.
* create a power supply notifier hook to get the usb presence/absence
notifications.
* add suspend,resume and shutdown driver callbacks that vote for
enabling/disabling tadc.
* prevent more requests coming in when the tadc is disabled.
* skip printing an error reading a channel for requests coming after
tadc is disabled. Return -ENODATA error for these situations.
* since we are introducing a secure write well beyond 0x3652, update the
code to treat everything beyond 0x3652 as locked.
CRs-Fixed: 2021456
Change-Id: Ifa92764d11f0b717558f3b7169313f5bcb1f507e
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The system runs into a "undefined instruction" error when first core waking
out of power collapse tries to wakeup a core by writing to a GIC register.
When waking out of reset, the GIC SRE bit is reset, and any accesses to the
GIC ICC registers would result in a "undefined instructions". When a first
waking out of reset writes to a console, the console task is now marked as
unnable by the scheduler. If the console task is running on a different
CPU, this would trigger a IRQ_WORK IPI to the target CPU. Since the core is
waking out of reset, its SRE bit is cleared and any access to the GIC ICC
registers results in an undefined instruction abort.
Fix by removing logging from the idle path.
Change-Id: I476d4a4d082bb115128e1f54c931558e79fec567
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Variable "load_img_req.img_len" and "load_img_req.mdt_len" are
from user land, so check their values against ion buf length
to avoid buffer overread on QSEE side.
Change-Id: I9e8bfe32d3b0cd5b441ad724543c56467fa5e4da
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
