A few clocks like gpu_ahb_clk may be available late on some platforms
like on boards that use an I2C-controlled off-SoC power regulator.
Defer SMMU probe if clock-tree is not ready.
CRs-fixed: 971957
Change-Id: I3f13b36affa0a904bda7175d0dacff298794a906
Signed-off-by: Mathew Joseph Karimpanal <mkarim@codeaurora.org>
Update the VDD_APC0 and VDD_APC1 CPR supported corners along
with their ceiling and floor voltages. In addition, increase
the APM threshold voltage to 852 mV in agreement with the
latest hardware guidelines.
Change-Id: I62cb18f79ecfd6b3270eabeebb5eedddf59e6174
CRs-Fixed: 988269
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Stream based lock needed in all vb2 ops to avoid any
invalid access in vb2 queue when hal triggers ioctl in
multiple thread context.
CRs-Fixed: 986029
Change-Id: Idcbef3db5c2bd04005b0832049b5dee00c4cf96b
Signed-off-by: Hariram Purushothaman <hariramp@codeaurora.org>
Stream based locks used in qbuf, dqbuf, reqbus.
Old session based locks are removed.
CRs-Fixed: 986029
Change-Id: I30788f9248bea67e560d1a602e8feadfde6c2691
Signed-off-by: Ramesh V <ramev@codeaurora.org>
Signed-off-by: Hariram Purushothaman <hariramp@codeaurora.org>
Add new fields to MHI channel scratch according to MHI spec.
CRs-Fixed: 990237
Change-Id: I36476b8a24b2a1b3bc55fa5832404bb106d810ec
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Remove the usage of ul_dl_sync field in IPA MHI driver as this
is no longer in use.
CRs-Fixed: 990233
Change-Id: I7295da05664e72aa1b9120f7bc475f92addc095b
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Patch to check the parameters before usage.
CRs-Fixed: 981826
Change-Id: Ib27076507477f3949063963db503f734c49ab591
Signed-off-by: Azam Sadiq Pasha Kapatrala Syed <akapatra@codeaurora.org>
For MSMs, the IPA FWs (GSI FW/MCS, HPS and DPS) will be
loaded via a secure PIL process.
Change-Id: Ie3c3c46d52921e558e926ec2be57a885e04c924d
CRs-Fixed: 970340
Acked-by: David Arinzon <darinzon@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
Define the OSM and XO clock rates necessary for performance
estimation using the OSM cycle counter. These parameters vary
based upon the platform.
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
CRs-Fixed: 987865
Change-Id: I721dc3488484b66e3f88cbebf626e88176f08a44
Remove 1.4976 GHz and 1.0944 GHz as supported DCVS set points
for the power and performance clusters, respectively.
Change-Id: I4c59825521a6f3f8738623363eec6c4bc8b5d8cc
CRs-Fixed: 990552
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add common api support of subsystem restart and bus
bandwidth for dual wifi. This feature redirect the cnss
export api according to the bus type SDIO/PCI.
CRs-Fixed: 986275
Change-Id: Iaf13d6c6d68ef62b7e4f6581899ec8325c5e9696
Signed-off-by: Sarada Prasanna Garnayak <sgarna@codeaurora.org>
vmstat events currently count pgpgout, but that includes
only the writebacks, and not the reclaim of clean
pages. Add an event to count clean page evictions. This is
helpful to evaluate page thrashing cases.
Change-Id: Icfb797877a544a58c289074bdc290dfbc1384514
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
When vfe is halted, an overflow signal could be generated that
has side effects. Turn off this signal when halting vfe. Also,
disable interrupts when halting the vfe due prevent other side
effects.
CRs-Fixed: 953865
Change-Id: I706d796c500db4a201149196d7ed15965c0b1bb7
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
This patch rate limit few of the error logs to avoid flooding
of kernel logs.
Change-Id: I11843becf1d3ae97d5e433198ae27afd0237ed82
Signed-off-by: Katish Paran <kparan@codeaurora.org>
Allocate guard page when the first buffer is
mapped into the IOMMU. This also ensures that
the guard page gets allocated if the guard page
mmu feature is enabled.
CRs-Fixed: 988093
Change-Id: Id97492707463a1f15a4bf1c67b9c0f03214e6283
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Earlier video driver maintains list of fds and compare
each ETB fd with these values. If the fd is found then
mapping is retained. But in some usecases, buffer address
and fd association may not be unique. This resuts in
usage of stale buffers. This is also not the true dynamic
buffer mode. With this change, driver treats every buffer
as new buffer and map and unmap each time.
CRs-Fixed: 989007
Change-Id: Ice90c745d4920b64c48c3f4dafca789f2551b327
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
Current fbdev rotator interface lacks support for mult-context
use cases. This new interface adopts V4L2 M2M framework to
support multiple concurrent sessions/contexts efficiently.
CRs-Fixed: 972831
Change-Id: I89593a57ba44e91c95d73154a7830539e5aab6e3
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
It's sometimes useful to know the physical address which
has beencorrupted, especially in systems with multiple
bus masters and DMA engines the capability of writing
to memory. It's may also be useful for identifying the
location of failures of memory cells in cases of
device-specific corruption. So print the physical
start address of the page to help in these scenarios.
Change-Id: I081edd8b1c06913c0057a6cb9dda18077cfbdc30
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
To support new v4l2 rotator driver, rotator smmu domains in
MDSS driver will be enabled based on device tree boolean setting.
This allows smmu to be associated with MDSS driver or external
rotator driver for MDS block, such as 3.0.0 onward, with a
separate rotator block, or for MDSS block, pre 2.0.0, with
built-in writeback rotator.
CRs-Fixed: 973961
Change-Id: I68ac7b1b89485d1ce46bdb1c1739c3306a7d7d89
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
[dkeitel@codeaurora.org: fixed minor whitspace conflict.]
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
When dynamic refresh operation is under progress, it is sometimes
expected that the DSI h/w throws DSI FIFO underflow errors. Avoid
throwing DSI FIFO errors on console for this case. Just clear the
DSI error interrupt and do not trigger the DSI underflow recovery
process.
Change-Id: I03b8764397378104981c1a5a6e627e90f53222ee
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Dump boot remap address register for having more
debug information about boot remap address for pronto.
CRs-Fixed: 989321
Change-Id: I072718da718cc2553d0234af327662958e1758b9
Signed-off-by: Sunkad, Anand Ningappa <asunka@codeaurora.org>
Reserved field is used for VFE-CDS-TNR usecases and is deprecated.
Remove usage of reserved field in cpp driver.
CRs-Fixed: 981024
Change-Id: I587e6ac7b813d8ac0865dcd18431417f8ca67a94
Signed-off-by: Krishnankutty Kolathappilly <kkolatha@codeaurora.org>
Add the cpubw device node with the list of supported DDR frequencies
for msm cobalt.
Change-Id: I726c1fe45e0a8a622c1ca9645a0b481cb70ca215
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
Adapting sensor driver to SOC layer by replacing msm specific
routines with SOC API which eases the portability of sensor driver
on to non-msm platforms.
Change-Id: I147dbf714d913b4aa55adc313c354f85cf4b23dd
Signed-off-by: Sureshnaidu Laveti <lsuresh@codeaurora.org>
Scratch buffer size is not sufficient for 14 bit raw.
This leads to page fault. This change increases the size of
scratch buffer to accommodate 14 bit MIPI raw format.
CRs-Fixed: 970413
Change-Id: I866640158c11c0f69505e4fb6b12a9204e2a6ad4
Signed-off-by: Senthil Kumar Rajagopal <skrajago@codeaurora.org>
There can be a scenario where the DSI hardware finished the
dynamic fps operation and updated the DSI interrupt status
bit but the isr is not triggered. This is possible under
heavy system load where the interrupts are disabled by some
other thread on the CPU where MDSS IRQ is affined. Double
check the status of dynamic fps operation by reading back
the DSI interrupt status bit once the wait for interrupt times
out.
Change-Id: Iebe5ab3f6b43b4b3e61666a600488e8ce50f6995
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
During stability test, gpio_direction_output is
invoked with msm gpio 0 which is leading to PC NOC error
as audio is not expected to access this gpio.
Hence initialise gpio to -1 and check if gpio
is valid before using.
CRs-Fixed: 973438
Change-Id: I32d779974f4eb497c62035f7f46c10739ebcfe5f
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
IPA resource allocation was updated in order to prevent HOLB (Head Of Line
Blocking) in rare scenarios. This change updates the resource allocation as
required.
Change-Id: Ifb08b2991dc3540b038e6cf79c5531661570ab23
CRs-Fixed: 978301
Signed-off-by: Gidon Studinski <gidons@codeaurora.org>
When a system reboot or shutdown is already underway, ignore SSR errors
so that the system reboot/shutdown process is uninterrupted. However, log
the SSR request so that we know that the subsystem behaved unexpectedly.
Change-Id: Ibfac397bf38749b095dacab4cadf7b77bd003e88
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Enable SPS_BAM_CACHED_WP option. The BAM register access is very slow.
The write descriptor offset information in the BAM_P_EVENT_REG is only
set by the host if BAM is runnig in system mode, such as NDP-BAM of crypto.
On each BAM transfter, driver reads the register to figure if
there is enough space to put in new descriptor. Reading the register can be
from driver cache copy, instead of going out to read the register if
SPS_BAM_CACHED_WP option is enabled.
Change-Id: I4c25f81ea79c9a8675d92b799844d906a42bcbb0
Acked-by: Che-Min Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Sivanesan Rajapupathi <srajap@codeaurora.org>
Read platform version through efuse register for clients
to know the underlying platform version.
CRs-Fixed: 987512
Change-Id: I16cdb8655e4a79d6f05e3185cac4014d3c0f0f77
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
If cable is disconnected early during composition switch
android_disable calls the gadget pullup op which on clearing
run/stop bit does a pm_runtime_put_noidle on the dwc3 device.
This decrements the power usage count on the dwc3 device, but the
child count of the parent mdwc3 device is not decremented.
Upon disconnect handling in the DWC3 state machine,
pm_runtime_put_sync on mdwc3 parent returns EBUSY due to child count
not being 0. As a result runtime idle does not kick in and
prevents low power mode handler being invoked.
Fix this by changing the pm_runtime_put_noidle call to
pm_runtime_put_autosuspend on dwc3 device so that the child
count for the mdwc3 parent is decremented to 0.
CRs-Fixed: 980113
Change-Id: Ibb19188c4230a08bbdef72af7de066735e8c2d67
Signed-off-by: Devdutt Patnaik <dpatnaik@codeaurora.org>
As part of open AHB clocks are currently enabled
based on CSID version check. But CSID version is
updated as part of INIT IOCTL call. Due to this
AHB clocks are not enabled and this is causing
unclocked register access. Now every target have
AHB clocks for ISPIF which needs to be enabled
always.
Change-Id: I576ac20650ac081175942b7d94b6f2b9711b14c8
Signed-off-by: Shilpa Mamidi <shilpam@codeaurora.org>
Update the cpufreq device with the boost frequency for the CPU
power cluster as well as the characterized Turbo Fmax frequency
and new intermediate Turbo frequency for the performance cluster
on speed bin 0 parts. Lastly, update the cpufreq to devfreq
device frequency mapping so that it includes all of the new CPU
cluster frequencies.
Change-Id: I33cbef64add66f63025e854f2991abda4f8e8dbf
CRs-Fixed: 981475
Signed-off-by: David Collins <collinsd@codeaurora.org>
Update the frequency plan for the MSM8996-Pro CPU clocks in order
to include the new boost frequency.
Also add the characterized Turbo Fmax frequency and the new
intermediate Turbo frequency for the performance cluster on speed
bin 0 parts.
Change-Id: I711bf4abd17e8743d459598d03d0f41f6ed1ca14
CRs-Fixed: 981475
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add VDD_APCC CPR boost corner which corresponds to the following
for speed bin 0 parts:
Power cluster = 2188.8 MHz
Also add the characterized Turbo Fmax frequency (2342.4 MHz) and
the new intermediate Turbo frequency (2246.4 MHz) for the
performance cluster on speed bin 0 parts.
Change-Id: If4c1f8b4e06bbd41b8152cdab5b6945b4dfc64bc
CRs-Fixed: 981475
Signed-off-by: David Collins <collinsd@codeaurora.org>
The register offsets for the CPU PLLs might vary with
the standard offsets used for other PLLs. Remove having
the print capability for these clocks.
CRs-Fixed: 941434
Change-Id: Id67a70117b0621d98ac010f712552ecaaf92641f
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
WLAN Functional Drivers Queries cnss platform driver to get the
MAC Address. If the OEM doesn't provide the valid MAC address, the
WLAN Driver fallbacks to use other approaches to get MAC address.
This works under CONFIG_CNSS_MAC feature flag, which will be enabled
only on the OEM platforms. For internal platforms, CNSS driver doesn't
hold any valid mac addresses.
CRs-Fixed: 985585
Change-Id: I1e8a030a32a640cec84cadd6b36b37938d5fe6be
Signed-off-by: Komal Kumar <kseelam@codeaurora.org>
Userspace supplies the actual number of used VFEs in session to ISPIF.
Validate the userspace input value and if found to be invalid, return
error.
CRs-Fixed: 898074
Change-Id: I3288ddb6404e817a705a92281b4c54666f372c56
Signed-off-by: Venu Yeshala <vyeshala@codeaurora.org>
The default settings of the gcc_hmss_gpll0_clk_src make it
run at 600 MHz. Call set rate on the clock so that its
divider settings can be programmed.
CRs-Fixed: 989118
Change-Id: I49aee860dd3f0f4f7ecb024228f182d126424906
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Changes to support larger queues Q0, Q1 for camera CCI 1.6
onwards.
CRs-Fixed: 974739
Change-Id: Iffdd78b6bf27f0f34d7e72a030264b428acf3f60
Signed-off-by: Viswanadha Raju Thotakura <viswanad@codeaurora.org>
The gcc_mmss_qm_ahb_ahb_clk is controlled by XBL on MSMCOBALT.
There is no need to control it separately from the linux clock
driver. Remove support for it.
CRs-Fixed: 988972
Change-Id: I23b4114096758342403e07058ef4df9b18f6622c
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Add 300 MHz and 320 MHz as supportable frequencies for the VFE
clock sources on MSMCOBALT.
Change-Id: Id5eac307313bbf2a32d0ae8e4f3ae34e73d376a1
CRs-Fixed: 987721
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Modifies the behavior of the command engine
to mask out certain commands/notifications sent to the
external mdm, for the purposes of debugging the external
mdm.
Change-Id: Iff35fd87f6d66849f6ec7d2924e1547400967c4e
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
Signed-off-by: Bruce Levy <blevy@codeaurora.org>
The gcc_dcc_ahb_clk needs to be controlled by the HLOS clock
driver on MSMCOBALT since its use is restricted to the HLOS
debug driver.
CRs-Fixed: 988930
Change-Id: I1abef9f1268080dbe5dba1e91f4b84fab03ce66c
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
