Create sysfs entry to control GPU clock throttling. When 0 is
written - all sources of clock throlling - ie LM, BCL, IDLE
are disabled.
CRs-Fixed: 973565
Change-Id: Iad588eb94861bd6b223715cc05354e3c39db9b24
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
If we add the mem entry pointer in the process mem_idr too early
other threads can do operations on the entry by guessing the ID
or GPU address before the object gets returned by the creating
operation.
Allocate an ID for the object but don't assign the pointer until
right before the creating function returns ensuring that another
operation can't access it until it is ready.
CRs-Fixed: 1002974
Change-Id: Ic0dedbadc0dd2125bd2a7bcc152972c0555e07f8
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
If the ioctl syncsource_destroy is accessed by parallel
threads, where the spinlock is acquired by threads after
getting syncsource, then the simultaneous processes try
to remove the already destroyed syncsource->refcount by
the first thread that acquires this spinlock. This leads
to race condition while removing syncsource->idr.
Avoid separate lock inside getting syncsource, instead
acquire spinlock before we get the syncsource in
destroy ioctl so that the threads access the spinlock
and operate on syncsource without use-after-free issue.
Change-Id: I6add3800c40cd09f6e6e0cf2720e69059bd83cbc
Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
The debug bus information for VBIF block was not dumped
correctly for A5XX GPU during the snapshot dump.
Change-Id: I75089e210a6fc72683dcf98cdd4da9d6ab3e6fcf
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
Create sysfs entry to have option to disable software clockgating
NAP state.
CRs-Fixed: 973565
Change-Id: I2376f10161040dbf426887ce146ac597f401153f
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
Add the property to determine GPU bitness which
is used by the clients via KGSL ioctl.
Certain clients of KGSL such as Open-CL driver
need to know explicitly about the GPU mode.
Change-Id: I77523d7816edb9776014aaf3aa85321af0d20aaf
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
The host AHB aperture for reading the HSLQ/SP/TP and shader memory
blocks might be blocked on A5XX targets so use the CP crash dump
utility to read them instead. Downside if the crashdumper goes boom
we'll have to skip those registers in the fallback.
Change-Id: Ic0dedbad3c7b485c696198bdfcb78d45e929ec22
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
A505 GPU is having two different frequency plans, for
loading a specific frequency plan add speed bin read
information capability to A505.
Change-Id: I259020d7e4613d043e213ab2cb41e80ceb11f46a
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Do not allocate memory for IB descriptors for commands
of types profiling buffers, sync and markers.
This fixes the memory leak due to allocation of
memory for such commands and these were never freed.
CRs-Fixed: 996651
Change-Id: Ib168d60ad89e0fd55cd1f10b773b7cdaa7400ace
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
This change includes the below:
- Add 1M and 8k pools and structure the allocator to use all pools
from the largest page to the smallest
- Reserve a set number of pages for each of these pools at init time
- When allocating, use the reserved pools and then fall back to
allocating from system memory using only 8k and 4k pages
- Remove maximums on the pool sizes
- Zero the memory when we create the pool initially and add pages
back to the pool on free
CRs-Fixed: 995735
Change-Id: I9440bad62d3e13b434902f167c9d23467b1c4235
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
This message is logged when we receive a preemption
interrupt after we have already detected that preemption
has been finished in hardware by reading the preemption
status register. This is a harmless condition so remove
it.
CRs-Fixed: 993480
Change-Id: I61a48353428b3faa042fbc85e259b33c7f23bdb0
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
There could be possibility of integer overflow on adding
sizeof(uint32_t) with uint64_t maximum offset bytes and result
in a value smaller than uint64_t maximum memdesc size.
CRs-Fixed: 988861
Change-Id: Ifc3ec45297c2a29ad6f7d70dd0bd59238ac8cc3d
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
Allow MMU mappings to take offsets rather than only allowing
full range mappings.
CRs-Fixed: 971174
Change-Id: Iaa113c8414a2d2d8f92b3cb21eaf2e422f273454
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Dumping only the ctxt_record structure in a snapshot
is not enough. For a more meaningful snapshot, dump 64KB
of preempt record. Also, move the code to device specific
snapshot function.
Change-Id: I43e08ccefbf2d3911191b2aad5168979956e1626
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Give trace code for IRQs a simpler format that moves
around where some logic lives.
CRs-Fixed: 971172
Change-Id: If426fb7599be0a79b6f37b8008a2310b1c006e93
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
When the IOCTL is called with invalid data, don't log to kmsg. The
returned error code should be enough to tell the UMD what they did wrong.
CRs-Fixed: 987074
Change-Id: Iae380e0f44dd53bee8ff4cec347a6b9a632b1f84
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
There is no way for the UMD to pass in NULL pointers for reading
timestamps. The KGSL driver also always has valid pointers
for storing the readpointer. Remove the checks that are not needed.
Change-Id: Id5f244a57a2b991a10b603ef7236193d4282fd0f
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Remove unused #defines, structs and members that are no longer used.
CRs-Fixed: 971156
Change-Id: Ibdf6fef6f3f700f3c5315c228c0473e47fb62163
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Use a mempool to reduce the allocation time. When memory allocated
from pages is freed, put it in a page pool. At allocation time, try
to allocate from the page pool before getting pages from the system.
Make sure that the pool does not grow too big by enforcing a
maximum limit.
Change-Id: Icac7fb4355ee1fd07e7127ea5c2721665e279272
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
We need to check for both NULL pointer and error condition
in coresight initialization and return with proper error.
CR's-Fixed: 971398
Change-Id: Id1e3e0f756ac1c9a0ff4f4e6ce073e80e31473b8
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
Update ucode workarounds for A5xx GPUs based on new
microcode and hardware changes.
CRs-Fixed: 1000396
Change-Id: I87a1ba9bfc441cad2ed6a6959d07af1cc1e2c7bc
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
As long as GPMU is enabled, DCVS has to handshake with firmware.
It is a new requirement of A540 power management.
CRs-Fixed: 973565
Change-Id: Ie6480fc3ba0e1b95aab40e31b09ff2bd798ff30f
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
A3XX doesn't have support for command batch profiling. Return
EOPNOTSUPP for a command batch profiling request on A3XX, so that
userspace code knows that this feature is not supported.
CRs-Fixed: 986169
Change-Id: I6dfcab462a933ef31e3bba6bef07f17016ae50b9
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Current code incorrectly specifies buffer size as 0 for mapping
gpuobj user memory. This causes the map to fail because buffer
size is expected to be a non zero value. Fix this by passing the
correct size of the buffer to be mapped.
CRs-Fixed: 995378
Change-Id: I1a9aeb3f1dd67f014847322e5b14cba8775a82a4
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
In adreno_remove() there is possibility of dereference of gpudev
without NULL check. Fix this by getting gpudev after adreno_dev
NULL check.
CRs-Fixed: 993267
Change-Id: I17d8b4ba2c74a787a065dbdb0ac88d065605fcb1
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
For user memory of type KGSL_USER_MEM_TYPE_ADDR mapped to GPU driver
verify permissions and map GPU permissions same as CPU permissions.
If elevated permissions are requested return an error to prevent
privilege escalation. Without this check user could map readonly
memory into GPU driver as readwrite and gain elevated privilege.
Write permissions check is currently inverted causing readonly
user pages to be mapped as readwrite in GPU driver. Fix this
check to map readonly pages as readonly.
CRs-Fixed: 988993
Change-Id: I0e097d7e4e4c414c0849e33bcc61a26fb94291ad
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
The kernel command buffer is not zeroed in the adreno ioctls,
and may contain garbage. The garbage value can lead to
unexpected results.
CRs-Fixed: 993518
Change-Id: I75033cdf4637881ecd6fa4dd31aea083b134e6d2
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Current order:
IB1 batch, timestamp writes, SRM=NULL, CP_YIELD_ENABLE,
CP_CONTEXT_SWITCH_YIELD
Correct order:
IB1 batch, SRM=NULL, CP_YIELD_ENABLE, timestamp writes,
CP_CONTEXT_SWITCH_YIELD
Reason:
if preemption is initiated after the last checkpoint but
before SET_RENDER_MODE == NULL is executed, all of the PM4s
starting at the preamble of the check point will be replayed
up to the SRM == NULL, including an attempt to re-timestamp/
re-retire the last batch of IBs.
If what was intended here was to make sure that the IB batch
would be retired once then the SET_RENDER_MODE == NULL and
CP_YIELD_ENABLE should be placed immediately after IB_PFE packets
and before the time stamping PM4 packets in the ring buffer.
CRs-Fixed: 990078
Change-Id: I04a1a44f12dd3a09c50b4fe39e14a2bd636b24de
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
kgsl_mem_entry_attach_process() adds new entry to the mem_idr list
without really having a valid GPU address.
This new entry can be used by other thread with GPUADDR_IN_MEMDESC()
and destroy it.
Get GPU address first and then add it to the mem_idr list.
Change-Id: I4d66cec754ca5315df3c9fe09644f55596c3c33c
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Track number of active context and pass it to governor along
with busy stats. This allows GPU DCVS to make decision based
on context count and busy stats, which helps in handling sudden
workloads.
Change-Id: I9b40e4917b30ee3f15f2c8e99669e090578f1289
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
Allocate guard page when the first buffer is
mapped into the IOMMU. This also ensures that
the guard page gets allocated if the guard page
mmu feature is enabled.
CRs-Fixed: 988093
Change-Id: Id97492707463a1f15a4bf1c67b9c0f03214e6283
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
kgsl_mem_entry_detach_process() makes gpuaddr to NULL and then
removes the entry from mem_idr list.
Sometimes this can cause kgsl_sharedmem_find() to return the
same entry for a different gpuaddr/thread if it satisfies
GPUADDR_IN_MEMDESC().
To avoid this, first remove the entry from mem_idr list and
proceed with unmap/untrack calls.
Change-Id: Ib9f2bc0fdaecd394735dd61b18fdc7de57aa3748
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
While releasing contexts take a reference to context inside read rcu
lock to avoid racing against context deletion. This will avoid using
dangling context pointer in device_release_contexts.
Change-Id: I76e787f6dde5a324fec23e81829174bd28134c6c
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
This is done to avoid a race condition between a context getting
detached and destroyed before the GPU has executed the pt switch
commands.
CRs-Fixed: 987587
Change-Id: I5c485e41a23b288f27e607b3e3ed5bf66cbad98a
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
'start' and 'stop' in the snapshot ringbuffer header are supposed to
be the dword offset that the data starts and stops at respectively.
For the current ringbuffer which is parsed 'start' and 'stop' are
equal to the CP wptr but all other ringbuffers are just dumped from
start to finish so 'start' and stop' should be 0 and KGSL_RB_DWORDS.
And having said that, why are we bothering to make the current
ringbuffer special anyway? In every case we are dumping the entire
ringbuffer so we might as well dump it in order. While messing about
in this code go a few more steps to make sure that we don't dump the
same ringbuffer more than once.
Change-Id: Ic0dedbada33adda660b7f0bf5eb165b0aa159004
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Add a l2pc-cpu-mask-latency in device tree. This latency
is used in kgsl_pwrctrl_update_l2pc() API to avoid L2PC
on masked CPUs by giving reduced latency value.
Change-Id: I0447977bce5ed5c09a863b03bb42b9428686a9f5
Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
Recommended value for A306a VBIF out registers is 0x10.
Change-Id: I5ea3f4203b7649007fa62bdfe70a41c8d86432ef
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Secure memory will have 's' flag set in its flag fields.
This is needed to track secure memory of a process.
CRs-Fixed: 985767
Change-Id: I011dcc951b1db8adf763f85701aa869f6d4744d3
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Allow the kgsl-event workqueue to run on any available
core. The other workqueues in KGSL were already unbound.
CRs-Fixed: 985082
Change-Id: I7e843b57541b7ddcb53848078f73b05c88238711
Signed-off-by: Jonathan Wicks <jwicks@codeaurora.org>
Force ISENSE calibration to stop before starting new calibration.
CRs-Fixed: 973565
Change-Id: I86dcbaa7feaecd630a027c5aca41d62a5855efda
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
Invoke AGC handshake on A540 even when LM is disabled, pass
0 for LM and pass HW patchid.
CRs-Fixed: 973565
Change-Id: I62c32b55bf2e3a1ec498b1ec0a8bebf34ac803a9
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
Move device specific features to the device rather than trying
to do them in the common initialization code.
Change-Id: I812db29a2eae90ca532755c265aaa2e52db972d7
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Disable the guardpage workaround for A5x and instead
selectively suppress pagefaults. Suppress read pagefaults
that are likely caused due to UCHE overfetches. For this,
the fault address must be within the first 64 bytes of a
page and the fault page must be preceded by a valid allocation.
CRs-Fixed: 975293
Change-Id: I6a0995af3ab4129c6923726043c5f34c747641f9
Signed-off-by: Sushmita Susheelendra <ssusheel@codeaurora.org>
The active context tracker that we bolted on the side of the
dispatcher was designed mainly to see if there was 1 OR more than 1
active context, not much more than that. Since it is apparent that
we'll need to track up to 4 contexts and possibly more later the
algorithm needs to change.
The new algorithm puts all active contexts on a linked list - every
time a context is used it is popped from the list and put on the
tip with an updated time. To count the number of active contexts
walk the list until you get a context with an active time older than
you are looking for. You also can do other magic on the context,
like see if it matches up with a given command queue.
Change-Id: Ic0dedbad6be9fd1925121ee54e0000c42b089f44
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
Add the oneshot_sync driver as of msm-3.18 commit
7892968f (sync: oneshot_sync: Update oneshot_sync for new sync APIs).
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
