Using memory barriers does not guarantee that the writes will
be completed before moving further unless the memory is marked
as strongly ordered. Use a read instead to make sure that the
previous writes take effect before the read can be processed
and we continue further.
CRs-Fixed: 1074277
Change-Id: Id1ec59664fb457c37dd63df008fbd6c540dffd67
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
The clock driver does not currently use the secure API to write the
APM threshold value. This leads to the value being always left as 0.
Fix the write.
CRs-Fixed: 1074198
Change-Id: I61d8f930f7fe8c3539803a1e9b942095df0b0f86
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
On MSMCOBALT v2, the qcom,llm-sw-overr flag is no longer needed.
This causes an issue where the corresponding array in code is not
filled up but the check to make the writes to the llm register
still succeeds. This leads to us writing 0 to the register
erroneously multiple times. Fix this check.
CRs-Fixed: 1074141
Change-Id: I2dd529a78d06ac08a34546df39cb01ad4c6cb3d5
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
AAC encode is failing in ADSP due to mismatch
in channel config datatype.
Update channel config data type for aac encoder.
Change-Id: I844d6e1ac1b2b171cd74a2601ae09280a22589c9
Signed-off-by: Naresh Tanniru <ntanniru@codeaurora.org>
Add device tree changes to enable mi2s and aux pcm so audio
can be playback and capture via mi2s and aux pcm interfaces.
CRs-Fixed: 1047362 1047365
Change-Id: I6d8f31cf841cb977bd1d7af3441b9d2c1da9b85c
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
Add a stub function for init_cluster() and remove a ifdefry
for SCHED_HMP in sched_init()
Change-Id: I6745485152d735436d8398818f7fb5e70ce5ee65
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
The current policy has a preference to select an idle CPU in the waker
cluster compared to the waker CPU running only 1 task. By selecting
an idle CPU, it eliminates the chance of waker migrating to a
different CPU after the wakee preempts it. This policy is also not
susceptible to the incorrect "sync" usage i.e the waker does not
goto sleep after waking up the wakee.
However LPM exit latency associated with an idle CPU outweigh the
above benefits on some targets. So add a knob to prefer the waker
CPU having only 1 runnable task over idle CPUs in the waker cluster.
Change-Id: Id974748c07625c1b19112235f426a5d204dfdb33
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
