Add support for enabling scrambler on hosts that support scrambling.
Scrambling is a new freature added in HDMI 2.0 specification to reduce
EMI interference at higher clock frequencies. Scrambling is enabled for
HDMI modes that have pixel clock greater than 340MHz. For lower pixel
clock frequencies, scrambling is enabled if sink supports scrambling at
lower frequencies.
Change-Id: I3aa224a32e768e2754a9e056a58ca90808a26ec6
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Post processing structures have been upgraded for thulium. Changes have
to be made on the compat ioctl path to ensure that 32 bit userspace
driver clients are able to configure the PP features when kernel is in
64 bit mode. This change updates the compat ioctl path for post
processing features.
Change-Id: Id3e1d4f2055638bc553082a1f477b5ef3ef41c80
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
From thulium chipset onwards post processing driver has moved to
new framework and config payload based interface. To maintain backward
compatibility existing members of the pp structures have been left
untouched. For IGC feature driver was checking legacy fields for
thulium chipset. This change fixes the issue of incorrect field check.
Change-Id: If27d702d9fa189192ad32e2d8b081dc9e99e577d
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
config payload in pgc(programmable gamma correction) was assigned
to wrong structure type. When driver client requests for reading
pgc lut(look up table) driver sanity checks fail due to incorrect
type assignment. This change fixes the pgc lut read failure.
Change-Id: Ie3dd5bb52f2eceae4ab86a8da723afbc9a29f042
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Histogram LUT (PA LUTV) is supported on source side VIG pipes in MDP.
Clients of MDP driver can enable the feature using overlay ioctl
interface. This change adds support for clients of the driver to
enable the feature.
Change-Id: I888af7d83b3de459353d7865122c40f39e937eac
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Histogram support is added back on source surface processing pipes
on thulium. This change adds the support for driver side support
to enable histogram on VIG pipes.
Change-Id: I7d480a22de3bbbc11ebcd85b7e725f0404077350
Signed-off-by: Ping Li <pingli@codeaurora.org>
Some of the PP(post processing) features in MDP might be upgraded when
new revision hardware is released. Clients of driver were relying on
MDP revision to decide which version of the PP feature is supported.
With MDP revision approach the client of driver needs to maintain a
mapping between MDP revision and PP feature version. This change
exposes ioctl to driver clients to query PP driver version of feature
instead of maintaining mapping.
Change-Id: I73f465400112445070c75f65f6ffd87c03eef2fb
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
MDP v(1.7) supports fixed SMP. mdss_mdp_smp_calc_num_blocks API
should not calculate any SMP blocks for this MDP version. Fix the
API call to avoid smp block calculation when fixed SMP is enabled.
Change-Id: I017ba2d2097471c98d6c4f9a0ec306309bcd7af6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
The histogram collection on SSPP side are not correctly
implemented, this patch help fix the existing issues with
histogram collection.
Change-Id: Ie7c9846b744371575ff7485d831ef05364dc5509
Signed-off-by: Ping Li <pingli@codeaurora.org>
Thulium target uses smmu v2 in which few apis have been deprecated
from smmu v1 and few have been added. Now each smmu context bank has
its own device, which are added as sub-devices to mdp device node.
Handles for these context banks are maintained to access the respective
smmu region. Additionally, clks voting has to be done before using the
smmu region. This change addresses the new changes required for smmu v2
and also maintains compatibility with smmu v1.
Change-Id: Iba113b9b05c23e3d6d0a588efbca4cd6583dc158
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
[cip@codeaurora.org: Moved new file locations]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Due to overlay struct size increase, the stack size requirement
for function is increasing when it is used as local variable.
This causes the compilation failure due to fix stack size on
APQ8084. This change fixes the issue by using overlay structure
from heap instead of stack.
Change-Id: I9ca116a8db9c01f488a7cbc85c659827ba3693b3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add new node to print current state of buffers mapped in mdss driver.
This helps to debug buffers flow and potential leaks.
Change-Id: I9a2aaee501a8a975615008f1a75590c9031dc77d
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
DSi tx buffer is mapped to iommu memory if iommu
attached. Therefore it needs to be iommu un mapped
at end of transmission.
CRs-Fixed: 752164
Change-Id: I2d3edad78c0cd859b5c31b5e2c6d66e5148ccf5f
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Refactor handling of buffers to maintain a queue instead of allowing
only a single copy to be updated. This allows multiple buffers to be
queued and thus can unblock back to back display updates earlier.
Change-Id: I695c0f37ce209f4728fca5ebcb70b6c67430ea83
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
FrameBuffer device clients assume that first FB device (fb0)
is primary and rest are secondary/external. This binds the
fb devices to fix probe order. For Example: Assumption breaks
when DSI probes first but selected as secondary interface and
HDMI probes later but selected as primary interface. Ideally,
MDSS driver should share each device's primary vs secondary
interface selection with client. This change fixes it.
Change-Id: I17ae8fef9604edf60ddbe22f8413d6764a5a1be4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Hardware cursor within mdss from mdss v1.5 onwards is
programmed within the SSPP interface. And also, cursors
were expected to be programmed through the overlay interface
by the user. This change adds backward compatibility to cursor
programming and allows it to be programmed through the CURSOR
IOCTL.
Change-Id: Ib4c8401fb2a241f7af3d277efe9b0db364fca70a
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add support for parsing new resolutions available in DTD (Detailed
Timing Descriptor) and Established Timing II/III.
Change-Id: If96b105d33d57e732f9cddf4d141df915d0235da
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add get panel configuration and get iommu domain functions to
common utility interface. This will make sure that DSI 6G gets
the right information on ferrum which has mdp3.
Change-Id: Ib5a9d70b8202eaa9e3003475398ecef88dfb573d
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
When caching the SSPP(source surface post processing) pipes parameters
pipe type should be checked for all PP features. SSPP config
function was checking the pipe type for multiple features which results
in code duplication. This change removes the code duplication by moving
the checks to top of the function.
Change-Id: I5f817ba881ab3763132360a2870830e0c40c887b
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Caching parameters passed by driver client for source surface IGC
(inverse gamma correction) shouldn't be tied to a version of IGC
feature. Based on version passed by driver client driver will allocate
the payload and cache the parameters. This change adds support for
caching based on the IGC version.
Change-Id: I0d120716d71ef378a7314d06823621e069f58b71
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
PCC(polynomial color correction) feature is supported in SSPP(source
surface post processing) MDP block of thulium. This change enables the
caching of PCC params passed by driver client and programming the SSPP
pcc hardware block.
Change-Id: I3798becf7ed675c32a90bc7cefa415c055516d72
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Picture Adjustment (PA) global and memory color adjustments are supported
on source side VIG pipes in MDP. Clients of MDP driver can enable the
feature using overlay ioctl interface. This change adds support for
clients of the driver to enable the feature.
Change-Id: If961bb20167a7d08bf77dc4807acb46f38094f63
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The PP features in SSPP, specifically VIG pipe, use config ops
to specify which features to configure. However, these ops are
also used as the dirty flag for writing the registers. Therefore,
if there is an error while caching the parameters, the dirty flags
for all PP pipe features should be removed.
Change-Id: I0ac04308c1644332932e90c3661158348f60eb37
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The PP setup in SSPP VIG pipes is not modular. It currently configures
all the registers and opmode bits in sequential, arbitrary order. This
change moves the VIG opmode config to a separate function from the VIG
pipe setup, for pp_sts based features only. This change also cleans up
the VIG pipe setup in order to make thulium upgrade easier.
Change-Id: I3c6bfc1d8a337c7f1756492a35c401a97e20d810
Signed-off-by: Benet Clark <benetc@codeaurora.org>
In case of CEA extension block is not correct or corrupted, fall
back to block 0 to read the resolutions supported.
Change-Id: I2b63ff1f918b3ece89ab35eb4a64d4ac96aaeabe
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Every time the SMP requirement of a pipe changes, release current
SMP's and re-allocate only as much needed.
Change-Id: I620278a0480c14724965cc2dad0a255177891ac3
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
It's not necessary for SSPP and Layer mixer to support same width.
Add a new property for maximum width supported by SSPP and
use it for validating the pipe configurations. Expose the same property
to the user space client to make the decision on using one or
two pipes for composing a layer.
Change-Id: I8a550c25078036158fcf330eb9083fc50e24c714
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[imaund@codeaurora.org: Resolved context conflicts]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
Current driver checks if some video interface is connected
in order to apply a fudge factor.
This is expected for real time interfaces, but non real
time interfaces should not account for this extra bandwidth.
This fix adds a check to make sure that for non real time
interfaces the fudge factor does not get applied.
Change-Id: Ib01d12f4e7749f4e083fa09f6392896313978d72
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Currently LAB/IBB is controlled through WLED which
only support LCD type. In order to support Amoled
panel, LAB/IBB need to be controlled independently
from WLED.
Change-Id: I4eca47f60d1333d2a928109c3ae4cbeb454b49dc
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Current idle detection logic starts timer at beginning of the frame, but
if producer (GPU or others) takes some time to release fences we may be
signaling idle timeout before we even posted contents on the screen.
Revisit logic to wait until after fences have been signaled before
signaling idle timeout.
Change-Id: Id5ec0e334212484b257149727af0325b7acc3e86
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
BUG will panic without giving the state of the display hardware at
the point where it happens. Instead use XLOG which will provide more
details about the hardware and can be disabled to allow recovery
sequence to kick in.
Change-Id: Id4602394f1096d5f40321c14c4d5af48675468e8
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
DSi-1 is responsible for triggering both controllers to send
dcs command to both panels at same time when sync-wait-broadcast
enabled. Therefore 2A/2B dcs command need to be sent to panels
through dsi-1 when both roi-merge and sync-wait-broadcast enabled.
CRs-Fixed: 769487
Change-Id: I2ad02e8c63c1f214513583060103901e28b92e61
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Underruns are observed on 8974 with HDMI connected since the
combined BW of primary and HDMI interface exceeds the
threshold BW. Fail the prepare call under such conditions so
that fallback happens.
Change-Id: I1217c862c344871868e1fabbb7ba51f6814c1e04
Signed-off-by: Vineet Bajaj <vbajaj@codeaurora.org>
Rotator destination format can be different depending
in the source format. Previously we were only checking
the destination format for bwc or rot90, but this is
wrong since there are other scenarios like rotator
downscaling, where we need to get the destination
pixel format, otherwise we get some misconfiguration
and corruption is observed. This change makes sure
that always we get the expected destination format
for the rotator.
Change-Id: I9e3e331e011fcf8301183560ac41fd94cae833c5
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Release kick off and unlock ov_lock before waiting for wb
done so that next prepare can start.
Change-Id: If4d53d81a5d77ffc9bcb1e0582f9741b258aedcd
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
If the cont_splash_enabled added with "&&" for backlight update
check then the unset_bl_level will be set 0 in all cases. Fix this
to add "||" as condition check instead of "&&".
Change-Id: I9365bd9b9beaada78b49e9e79046715f05ea5b72
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Previously, gamma correction dirty bit is not properly set for
all the use cases, which is causing the disable ioctl for gamma
correction to fail. This change fixes the issue in disable ioctl.
Change-Id: I4901c05d305577857862f6b5316fa59ececcc842
Signed-off-by: Ping Li <pingli@codeaurora.org>
Initialize maximum number of zorder's programmable by the client
to 4 for msm8992 target.
Change-Id: I090ddf709322c91fd40e9403ad7471d87c5e82af
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Use target specific ping pong buffer register offsets instead
of hard coded ones to program control and config parameters.
Change-Id: Id446452d6ff42e886b8e3232a1143c1b0a742489
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[imaund@codeaurora.org: Resolved context conflicts]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
This change adds support to autorefresh the command mode panels
without having to manually issue a kickoff. We need to enable
sys/class/graphics/fb0/msm_cmd_autorefresh_en to configure after
how many idle ticks(read ptr/vsync) should we trigger a frame.
e.g. If we want to send an update at 60fps
we need to echo 1 > sys/class/graphics/fb0/msm_cmd_autorefresh_en
to disable we need to echo 0 >
sys/class/graphics/fb0/msm_cmd_autorefresh_en
Change-Id: Ib0cda1142f8fadfa6cad5e61e0c7fb36fe43aca1
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
[imaund@codeaurora.org: Updated INIT_COMPLETION call to
reinit_completion]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
The new sequence is intended to improve pll locking time. This patch
is part of new sequence for phy ctrl in DSI driver side.
Change-Id: I9c38d98f1e32cfa1e5f4d12156a6fa9cb15e3049
[veeras@codeaurora.org: Done as part of 3.18 upgrade
Removed msm8994-mdss.dtsi changes from this commit]
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Both in dual dsi and single dsi case, only dsi0's phy regulators
need to be programmed. Reduce the dependency between the two
dsi's for enabling and disabling the dsi0's phy regulators.
Add dsi0's phy regulator base to both dsi's as it can
independently program it, if the panel is boot with dsi1 or dsi0.
Change-Id: I04bfa4025fb5e20e3624577275d01b37a9f723bf
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
[imaund@codeaurora.org: Removed changes to files that do not exist
in msm-3.14]
[veeras@codeaurora.org: Done as part of 3.18 upgrade
Removed apq8084-mdss.dtsi, msm8226-mdss.dtsi, msm8916-mdss.dtsi,
msm8939-mdss.dtsi, msm8992-mdss.dtsi, msm8994-mdss.dtsi
changes from this commit]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
Function mdss_mdp_ctl_perf_get_transaction_status tracks mdp
status whether a commit is currently in progress. If it is
then we don't schedule the work queue, otherwise schedule it.
Cases where work queue is not scheduled, waitforpp takes care
of notify frame done. In case of last frame update, work
queue takes care of notify frame done.
Change-Id: I98c9af4ec412f06d48e0ae57e5973bf34be9110d
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Add debugfs nodes to enable and configure fbc
for simulation panels.
Change-Id: Ie469f10ff6285fa4778357505d0b973ba677e38e
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
[cip@codeaurora.org: Use debugfs_create_u32 for u32 variables]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
When there are any issues halting pipes during free, we go into recovery
sequence where pipes that cannot be cleaned up are forcefully staged to
get recovered. After this we need to remove them to complete recovery
sequence, otherwise it will remain active which is not the intention.
Also add check to ensure we catch such cases for all dual mixer cases.
Change-Id: If9fb04130de286eb1bf9a8171461df693dc2493d
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
There is possibility that the time of mdp flush bit set
and the time of dsi flush bit are cross vsync boundary.
Therefore wait4vsync is needed to guarantee both flush
bits are set within same vsync period regardless of mdp
revision.
CRs-Fixed: 766349
Change-Id: I5fd1b7c94f119d8e5f1fdd2ceb5476ed27a730fc
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Add maximum bandwidth per pipe, maximum mdp clock rate
and mdp clock fudge factor to the capabilities exposed
to the display driver user space.
Change-Id: I3266bcaf7df8caa127cbeebc8430e7b3a6e3ecf7
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Horizontal scalar support on VIG pipe was only intended for 8092. Since
there is no need to support this chipset, this change will revert all
HSCL functionality to remove any confusion.
This reverts commit 13f08126290f40aae7476bfe8c374459f0fcd041.
Change-Id: Ia14b89faed2a3285b5ef5af6d16ebf225ffa4cda
Signed-off-by: Benet Clark <benetc@codeaurora.org>
IGC(Inverse gamma correction) feature is supported on source side pipes
in MDP. Clients of MDP driver can enable the feature using overlay ioctl
interface. Change adds support for clients of driver to enable the
feature.
Change-Id: I5243b001acffff869f9369211fd724d7dd75e8a1
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
For source pipes post processing feature params are cached in the pipe
structure. Post processing(pp) feature versions can change across
different versions of mdp and might require changes to caching code.
Post processing driver can handle caching the params based on version.
This change moves the caching into post processing driver
Change-Id: Ic02fec43dbbff5d4404b618d6d82b2c8b8eef07a
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
