Update the diag header with latest log, message
and event information to match the list maintained
by the peripherals.
CRs-Fixed: 2020864
Change-Id: Icbed01bb4f90fb7d72fe7517ee6964d799f1d48e
Signed-off-by: Chris Lew <clew@codeaurora.org>
Change the initcall level of qpnp-misc driver from module_init()
to subsys_initcall() so that the misc devices can be available
earlier. This helps the clients to access the registers under
misc peripheral sooner without a probe deferral.
Change-Id: Ie5df2cb9cf6842c59ec6f00ac9123994111f207b
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
While in DRP the legacy cable detection may fail. When a legacy cable is
detected the legacy input current limits are enforced by hardware.
Always assume a legacy cable since the legacy cable detection will
fail in some cases. Manually enforce the legacy input current limits to
ensure USB stability and compliance. As a side effect, non-legacy 22k
ohm and 10k ohm Rp adapters will be current limited to legacy standards.
To realize this:
- Set a limit of 100mA as soon as type-c is connected and remove that
limit once PD is confirmed.
- If PD is not confirmed:
- SDP: Use 100mA vote until USB PHY updates it to 500/900mA
- CDP: Use 1.5A vote
- DCP: Use 1.5A vote
- HVDCP: Use 3A vote
Change-Id: I049a7ee2099acd9e58df1b9417847daec4854af5
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
While in DRP the legacy cable detection may fail. Legacy cable
detection is essential to preventing CC OV damage.
Always assume a legacy cable since the legacy cable detection will fail
in some cases. As a side effect, non-legacy HVDCP adapters will stay at
5V if they have a 10k ohm Rp.
To realize this:
- Remove disallowing PD based on the legacy bit being set. That bit set
or unset is not reliable and it is safe to try PD.
- Remove the workaround which tries to fix legacy cable being set
incorrectly at boot. That bit set or unset is not reliable.
Change-Id: I37879866592f63906a7c688f51c309b4e2fee48d
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Currently to override the ICL the self-clearing ICL override bit is
used. The problem with this bit is that it is self-clearing and a
separate register needs to be read to get the override status.
Furthermore, the hardware will automatically clear this bit on USB
removal.
A new ICL override bit was added in PMI hardware revision 2.0. This bit
is not self-clearing, and can be set prior to USB insertion. Use this
new bit.
Change-Id: I30a601b6aacba3c404ebdfb82e529504a694a048
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Currently AICL will be rerun whenever PD requests a voltage increase.
While this works in most cases it can become problematic if PD requests
the same voltage twice, and the ICL may fall to ICL_MIN.
Since the voltage requests originate in the userspace it would be less
error prone to allow the userspace to rerun AICL instead. Do it.
Change-Id: Id190564e28bcffd72a1de70fa1327fce3e40299e
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
When APSD_START_ON_CC_BIT is set both VBUS and CC must be attached
before APSD runs. This eliminates all issues related to slow plugin.
Unfortunately this means that if CC is re-asserted anytime after APSD
finishes, then it will rerun again.
Fix this by disabling APSD_START_ON_CC_BIT right after CC is asserted,
and enable it after USB removal.
Change-Id: I27d3727647635b78392b925f0881dc3a4ef41623
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
A client vote can be enabled or disabled. Add an API which allows
consumers to check the enable/disable status of a client vote.
Change-Id: Ic4e9224c19e63fb88216da0cb775994e3e87c1f7
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Update mdp caps to enable concurrent write back feature
along with the QoS settings required.
Change-Id: Ie8368fb327e908a549877b06da0fed5917fc3788
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Some panels have low escape clock requirements based on which the
host escape clock should be configured. Add support to configure
host escape clock based on the panel escape clock. By default, the
host would be configured for an escape clock of 19.2MHz.
Change-Id: If791ffb4d49dd97424366042ee35bd4ecda5c185
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
Enable the laser sensor on the msm8998.
CRs-fixed: 1051771
Change-Id: Ie929092504ceb40bff283817e98b6cb0c4c05714
Signed-off-by: Wei Ding <weiding@codeaurora.org>
Laser sensor is connected using CCI interface.
Add support to configure and enable laser
sensor driver.
CRs-fixed: 1051771
Change-Id: Ia9eab96862b1c2a657d40272867f015a0a91e0ed
Signed-off-by: Bikas Gurung <bgurung@codeaurora.org>
In the current implementation before triggering BTA,
DSI SW waits for extra time to skip display blanking period.
Add an additional check for active line count to ensure that
BTA is always triggered during display active region only.
Change-Id: Ife67f5a38fa9e8df6f8431e9d2b0179c207adeb2
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
ESD feature is enabled on the nt35597 truly panel on sdm660 to
check the panel status periodically.
Change-Id: Id354c900a784b1bf239595fd31a244c064066987
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
For some panels, escape clock needs to be updated for checking
the panel status periodically. Update the panel init sequence
to increase the escape clock.
Change-Id: I4a154d30e829c80587b3207ddc754aace927ab1c
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
DP sink specifies the maximum per-lane link rate and the maximum lane
count that it supports as part of its capabilities. This would limit
the maximum data transfer rate that can be supported on the link. Use
this information to filter the list of EDID modes to include only the
ones that can be supported with the maximum possible link rate.
CRs-Fixed: 2018514
Change-Id: I4bc3a339935a49081bd45cb778737116d99ee7c2
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Increase the strength of camera mclk0 on msm8998 HDK.
Change-Id: I9804d26265f074e1696f9b324ac8973100bb0a0e
Signed-off-by: Wei Ding <weiding@codeaurora.org>
Do asynchronous driver probing of TZ log driver to improve
the device boot-up time.
Change-Id: Ic972be12f820787db1a5bc957b109461354875fb
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
The frequency value that is calculated in Hz can be of a large value to
cause unsigned integer overflow. DCVSh though fetches the final
frequency value in HZ in a unsigned long variable, the intermediate
variable used in the estimation is unsigned integer. This will result in
a wrong frequency value being reported to userspace and clients.
Fix the overflow by using a unsigned long datatype for the frequency
computation.
Change-Id: I4bba53b9f5bd243c4aaaf67a831ce77ef231b38f
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
Improve touch device setting is needed by QTC800H only. So move
the node to qrd dts from common file.
Change-Id: I1c04e2b2540a4db9dff839ebe3dfe45efe552c9a
Signed-off-by: zhaoyuan <yzhao@codeaurora.org>
HDK835 has HDMI and DP hardware blocks, so enable them in the
device tree.
CRs-Fixed: 2012660
Change-Id: I04a58527875bd6c62d7d31e20bc4ade3824d7e03
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
