When continuous splash is enabled, bus clocks are turned on by the
boot-loader display driver. If these bus clocks are voted down while
MDP is still actively fetching from DRAM, it leads to under-runs and
device hangs. Prevent this by skipping vote down of bus clocks if splash
hand-off is still pending.
Change-Id: Ia0b0ff90fb85024fb986453e70afaced331fbf06
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Currently the NT35596 ESD related DSI read values are defined
in mdss_dsi_panel.c file. Add changes to pass these values from
panel DTSI and parsing them in DSI drivers accordingly. This
helps making the code generic and can be easily extended to
other panels also.
Change-Id: If62fa45fdf41429d2efe14a78857433883a329a9
(cherry picked from commit 51684bee60e503e9b06174a294ed2eb7b939d5b2)
[veeras@codeaurora.org: As part of 3.14 upgrade reomve
arch/arm/boot/dts/qcom/dsi-panel-nt35596-1080p-skuk-video.dtsi]
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
During fb release we should release all resources that are associated to
that process. However, in current release function this can lead to
kickoff being done, if this is done while display thread is running
there can be race condition between the updates from two different
threads. Fix this by pushing the commit through the display thread in
cases where display thread should be running, or otherwise shutdown this
thread and do it along with panel blanking.
Change-Id: I9ff6316c18adfdb67d0250a144ddc2f9f2634273
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
During display commit cycle, we need to iterate through pipes that have
been marked for cleanup and destroy these. However in the middle of the
function we may block for sometime to wait for display to be ready, when
this happens we are releasing ov_lock which controls access to this
cleanup list. If there is any cleanup done in this period, then there
could be some pipes incorrectly cleaned up after this.
To fix this race condition, add a local variable to keep track of pipes
that should be cleaned up.
Change-Id: Ib80cf91e10d66e318754c327fd71a489b8c42676
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Currently, when mdss_mdp probe fails after registering for
regulator notifications, the regulator_unregister_notifier
function is not called. Because of this, when the regulator
has some state change now, the notification call fails.
Change-Id: I2a41029aa145f88477701ab75a6e30883d2c4017
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
While coming out of static screen on command mode panels, we
initialize the DSI host as part of DSI clock control. When partial
update is enabled, we need to program the correct ROI parameters
to DSI controller. Otherwise, issues will be seen if the first
update after the static screen has same ROI parameters as the last
update before static screen. Hence, update the existing ROI
parameters properly to MDP_STREAM_CTRL and MDP_STREAM_TOTAL
registers.
Change-Id: Id6ec179e42592bc4fbaa85d45ad4459036a4faf3
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
In case of command mode panel, the pixel clock can be increased in order
to finish transfer faster. In such cases we can increase the core clock
in order to match the pixel clock and finish the transfer faster.
Change-Id: I44a01e42c687ce20d4dbfa068478ad438433a581
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
HW underrun recovery in newer mdp revisions is h/w bug free. Enabling
it may help avoid system wide stability issues.
CRs-fixed: 723006
Change-Id: Ide52f68b272a66e18f62535f091faea91f7f13c7
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Fix a typo that was comparing the width instead of the height
parameter that lead to black stripe flickering when scrolling on
browser.
Change-Id: I10e57f876458f46d445b3404d09a5e7606aeb666
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Non-RealTime(NRT) memory fetch should use NRT AXI
ports while RT usecase memory fetch should go through
RT AXI ports. Number of RT and NRT AXI ports can be
different from chipset to chipset. MDSS driver hardcodes
them to "2" for all usecases which won't apply for
all MDP cores Ex: MDPv17. This change removes AXI ports
hard coding and updates ab/ib request based on AXI
ports availability for respective chipset. It uses
uniform calculation method for ib/ab quota request on
RT and NRT AXI ports to reduce the driver complexity
and clean interface.
Change-Id: I015c5c8a64bdf62f5747fcbcf19ba00cd29e21b5
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
msm8909 has mdp3 with DSI 6G. Enable DSI 6G to work with
mdp3 and mdp5 while using iommu and bandwidth functions.
Change-Id: I0de48dbe388c81ebfade7aeb5592357e2750d143
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
Add changes to share ion fd to userspace for mapping to
the frame buffer memory for mdp3.
Change-Id: I59c2cacde89abbd8919752c129ae8cf304208052
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
On some targets size_t and int are different sizes. This results
in a failed length check.
Change-Id: Ia5dd42cfe32eda789787c59785848e79b61ae218
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
compat layer ovarlay structure needs to be updated whenever there
is change in 64 bit overlay structure. This change updates the
compat layer.
Change-Id: Ibeaef3d825d8c33ee8c6abf9caaae8432b6b0645
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
It is possible that userspace modifies the frame buffer
parameters. In such cases ensure to align the frame
buffer size to avoid mmap failures.
Change-Id: I4a002694c26c8fface45d8e274d79d5624cc8158
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Add a property to configure maximum prediction error when
FBC is enabled.
Change-Id: Iad17d567e7e8b9a0bd73df8d59a34e364c2acf8e
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
We now support high resolutions like 4K that need higher b/w votes.
Increase b/w vote to 2GBps for the duration of the continuous splash
screen logo.
Change-Id: I2c73e98ea769b252bee51d953d7cdc24f2b6668a
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
While handing off pipes from LK to kernel during the continuous
splash screen support, we were iterating through the HW cursor
pipes causing a crash. Only iterate through non cursor pipes.
Change-Id: I1223d34b374c5517c68beaaaa1df8d21f0fe8b83
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Framebuffer commpression(FBC) 2.0 has new bit fields added to the
registers. Configure FBC registers correctly based on the dtsi
configuration. FBC 2.0 has increased the compression ratio to 1/3
and has configurable block size(in lines).
Crs-Fixed: 723612
Change-Id: Icf3c9b29d31f0e3214d6c7d525369fc7398dd9bb
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
When entering doze mode, do not turn off the interface clocks since
display updates are expected in this mode. This also avoid unnecessary
delays when entering doze mode while trying to wait for the clocks to be
turned off.
Change-Id: Ie6658a561f5d49aff50881c561fef858f3d26c61
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
When doze mode is requested while the panel in powered off, the
panel needs to be first unblanked and then configured into low power
mode. While this sequence exists in the current implementation,
the execution sequence only calls MDP's on function while unblanking
the panel. The correct approach is to go through the full unblank
sequence which would also start the display commit thread. Without
this, screen updates while in doze mode will not work and could
lead to unexpected behaviors.
Change-Id: I4f65764acaf01d61d129e00179930af9ebb79c77
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
For video mode panels, MDSS hardware needs to be on as long as the
panel is on. When doze mode is requested for a video mode panel,
no special optimizations can be done in the display driver to
configure the hardware in a low power state. As such, when doze mode is
requested for video mode panels, simply unblank the panel if it is not
already on.
Change-Id: I0f279d78b9b5c8eebb2bf654df628acafa408f23
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add MDSS_DSI_LINK_READY support to mdp3 driver, since
8909 uses DSI 6g.
Change-Id: Iccb752329d2116f09c31a522c53f54c675da1cb7
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Move double bufferring mode support property for dsi controller
to dtsi as it is not supported on 8909.
Change-Id: I2d99c34af7d4b9eef8f4503bad6fcd1480b2bde6
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
This change adds mdss gdsc changes to mdp3 driver of
8909 platform and also throws error when iommu attach
fails in driver.
Change-Id: I6a0f18b19535e7450f0f9c3fad9b3c30178b9754
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
[imaund@codeaurora.org: Resolved trivial context conflicts.]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
This change updates the bandwidth calculation for mdp3
hardware based on 8909 requirements, otherwise under run
is seen when USB is disconnected.
Change-Id: I49f7c225b57c43eca5ba8c6ac7b889e53cce6037
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Set Correct unpack pattern for ARGB888, XRGB888 and BGR565
color formats to avoid the color swap.
Change-Id: I9e3aa5018ea87be34122b3c1a80b94fc8cec3967
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
In case of histogram collection call failure due to histogram is not
enabled, or histogram state is unknown, return ENODATA instead of
EINVALID.
Change-Id: I6996345a19a43752827195b9edf786d62f9cbc75
Signed-off-by: Ping Li <pingli@codeaurora.org>
If mixer swap or interface swap is enabled on split display, disable
synchronized flush to prevent under-runs.
Change-Id: I21592fd5ef682a2ee8f2bcdaba33d6bcf015e5d4
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
With many updates coming the postprocessing driver, there needs to be
a way to manage the multiple versions of programming sequences and
interface structures, without adding to the hardware agnostic code path.
The pp_feature_ops structure will be used to decouple the PP driver from
the PP hardware, such that the hardware-specific code is separated to a
different file
Change-Id: I604850c082c32f5741905bd509ae0e819e334749
Signed-off-by: Benet Clark <benetc@codeaurora.org>
[cip@codeaurora.org: Moved mdss_mdp_pp_v1_7.c file location]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Layer mixer count is used for configuring SSPP(source side post
processing), DSPP(Destination side post processing) modules. There can
be a mismatch between the number of layer mixers with SSPP, DSPP
modules. Driver should be using the sspp, dspp counts instead of using
the layer mixer count. This change udpates the logic to use the module
count specific to pipe instead of layer mixer count
Change-Id: I32e32ed233d9c7026135087d05458e8af13d72e7
Signed-off-by: Ping Li <pingli@codeaurora.org>
MDP hardware consists of postprocessing hardware modules which are part
of different layers. Offsets of the post processing block can change
based on the MDP version. Moving these module offsets into device tree
makes the driver agnostic of mdp version. This change adds support to
parse the offsets from device
Change-Id: I586c69d0f6217cda9bb7d4ce47aa563c827ea531
Signed-off-by: Ping Li <pingli@codeaurora.org>
MDP hardware supports inverse gamma correction(IGC) on the source pipes.
Driver will program the LUT(Look up table) on the source pipe and
enable the IGC. Register exposes a bit mask which is equal to number of
pipes for which IGC LUT table needs to updated.
Source pipe enum values are not contiguos in nature which was resulting
in incorrect programming of IGC module.
This change fixes the issue by assigning bit mask position instead of
relying on the source pipe enum values.
Change-Id: I219cc484edd42fdd563dcb7535ceacb11e9e2d38
Signed-off-by: Ping Li <pingli@codeaurora.org>
MDP_SMP_FORCE_ALLOC flag is used to allow SMP
allocations even when there is mismatch between
allocated and requested SMPs for a pipe.
User space can make use of this flag in extreme scenarios
where SMP allocations need to pass like GPU composition
and playback of protected or secure videos.
Change-Id: I369b4361e7e2bbfc8150add467678c4ef8d5cfb6
Signed-off-by: Justin Philip <jphili@codeaurora.org>
UI may update in doze mode and there may be tearing when going
from doze to unblank - with respect to synchronization, doze mode
must be treated as on.
Change-Id: I8635b0722bc6294f6850ab28ce43046f81ed49a5
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Update the capabilities sysfs node with the max mixer width
supported to have userspace read and add checks for pipe
configurations.
Change-Id: I1431b8d06538b68d0dab4ac1698bd2a93331ad1c
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
When partial update and sync-wait-broadcast enable, col_page
address dcs command are sent to panel on every frame update
which generates unnecessary interrupts and cause frame rate
to dropped. To avoid unnecessary interrupts, col_page address
dcs commands are sent only when frame size changed. Since
sync-wait-broadcast enabled, col_page address of both
left and right dsi controller need to be sent at same
trigger.
CRs-Fixed: 707502
Change-Id: I37b8f78edf4fa75fa4aea9ca5d57ae0efd10b36c
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
At split display case, DSI panel initialization dcs
commands need to be sent to panel when both dsi links
are in LP-11 state. Add MDSS_EVENT_LINK_READY to have
both dsi controller's phy/pll initialized which brings
link to LP-11 state first so that panel initialization
dcs commands be received by panel successfully to bring
panel to display_on state.
Change-Id: I4b33fafd2673be1f068819bee25fc1a335eb0fe8
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
For some command mode panels, the HW Vsync signal from the panel
stops or becomes irregular if the panel goes bad due to ESD attack.
For such panels, the Vsync signal irregularity can be considered
as a trigger for recovery due to ESD attack. The ESD thread
interval needs to be set based on the irregularity pattern seen
that is specific to the panel. Add support for this.
Change-Id: I8a2408ac1b2c0e063446f8af60ed6fac4c53cb8c
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
[imaund@codeaurora.org: Resolved trivial context conflicts.]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
Change the final fence wait timeout to be 7s for a total of 10s
Change the display operation timeout to be 1s more than that
instead of the excessively large timeout.
Change-Id: If9ae04f9e5993d754b6ccbfdd9e80ec46960e73b
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Optional dtsi properties are not present for all targets
for MDP dtsi configuration. Parsing failure for such property
should be reported under debug message instead of error message.
Change-Id: I91c966ebffd1bab3d29e047fa2ff5446e7de1b33
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Currently iommu map call is done in client's context during overlay
play, this requires iommu attachment to correctly map buffers.
This mapping can be delayed until the actual commit and avoid
unnecessary delays in client's context. Also, only unmap buffers if they
have been mapped, instead of checking if iommu is attached.
Modified to work one kernel 3.14, iommu changes.
Change-Id: I802ec83a5af52ce6f372e8bda3ceb2646fb9cc55
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Current driver does not configure the pipe if the requested
data is same as the data already in the pipe.
This is a problem and can cause underruns in cases where
the pipe is freed due some error and driver tries to
setup previous configuration.
These changes make sure that if pipe was freed due some error,
driver will not skip the re-configuration of the pipe.
Change-Id: I36fc1644b4bdf413b308f7f7b5edcf97dcc8ec0b
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Add support for DSI data lane workaround if the DSI data lanes
are in stop state and not active for MDSS v1.5 and v1.9.
Also, always check for the DSI lane status when the frame is
being sent to DSI host.
Change-Id: Id1cfcdcaf709c571840449e4517db760d5058c90
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Currently, for dual DSI cases while turning off the DSI clocks,
the DSI clamps are getting enabled before turning off the DSI PLL.
Due to this, there are DSI PLL lock failures seen while enabling
the clocks back while coming out of idle screen on command
mode panels. Change the clock sequence by making sure to enable
the clamps only after the DSI PLL is disabled. Also while turning
ON the clocks, make sure to disable the clamps before the DSI PLL
is enabled.
Change-Id: I545f17b85866553d1ff1cea42a6eaa2a84f8f014
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
[imaund@codeaurora.org: Resolved minor merge conflict in
drivers/video/msm/mdss/msm_mdss_io_8974.c.]
Signed-off-by: Ian Maund <imaund@codeaurora.org>
when wfd is tear down, HW still fetch the address of buffer queue
which was already released and while cancelling the buffer cause the
iommu page fault. Call wait4comp before kickoff is called to avoid
iommu page fault.
Change-Id: Ia597b395e13072374cfe3d5fa8216363946bff16
Signed-off-by: Raghavendra Ambadas <rambad@codeaurora.org>
FBC lines prefill is option property but MDSS driver probe
returns failure if this property is not defined. This change
handles it as optional property.
Change-Id: I8d1813fbbc2f5aef9bf81535e1640c9c25c8a784
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
We were calling free_bootmem_late, which is a __init function,
from a none __init context. We are moving to free_reserved_page.
Change-Id: I53b3b781201d46a6894f8d9fdfab1c3c5f3802b8
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
There are use-cases where pipe is reused with a lower resolution than
previous one. In such cases, it is possible that SMP requirement is lower
than before. Current implementation will reject pipe configuration where
any SMP change is requested. This may lead to GPU fall-back option and
eventually consume more power. But on high end targets we have enough
number of SMPs available for use such that we can still allow the use-case
and not run out of SMPs to use. Based on this knowledge, change the logic
to allow extra SMPs during pipe reuse.
Change-Id: Icad5ca284a6b5ec1810d65bb1755d2f9572db7f0
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
