As GPIO 54 has already been connected to an external
pull up resistor, config it to no pull to save power
consumption.
CRs-Fixed: 2015121
Change-Id: Id13588be53b8756e4d9792035bcc6adfbaa8c3f7
Signed-off-by: xiaonian <xiaonian@codeaurora.org>
HIFI headphone path is not present in sdm660 qrd board.
So there is no need to add these two hph_en nodes under tasha node.
These two nodes get initialized by msm_cdc_pinctrl driver and make
gpio24/25 as output low, which causes some power leakage.
Remove these two hph_en nodes for sdm660 qrd.
Change-Id: I527ce45296cd3b168bea67804e0909f668f74221
CRs-Fixed: 2011375
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
Currently the HVDCP auth IRQ is only enabled upon USB removal. When APSD
is rerun the USB type is not updated to HVDCP_3 since the IRQ was
disabled.
Fix this by enabling the HVDCP auth IRQ before APSD is rerun.
Change-Id: Ic9ec2dca5915651864582abea9165ca8c4290169
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
As the best clocksource is not selected till core boot completion,
only periodic tick timer works and it increases jiffies by one at
every tick updates. If interrupt is disabled more than one tick(10ms),
timer interrupts are missed and jiffies can't be updated at every
10ms and it can be behind the real time. So make it possible to select
the best clocksource right after arm arch timer initialization, so that
jiffies can be increased by multiple counts since then.
Change-Id: Id8c4e3ce9b9e44061fef7ad7e678ca1c27d84bb1
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
As the best clocksource is not selected till core boot completion,
only periodic tick timer works and it increases jiffies by one at
every tick updates. If interrupt is disabled more than one tick(10ms),
timer interrupts are missed and jiffies can't be updated at every
10ms and it can be behind the real time. So add API to force re-
selection of the best clocksource among registered clocksources so
that the best clocksource can be selected whenever it is available.
Change-Id: I481de3cdf1df8f0e35ed10aee7ab3882bf7a35b3
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Setting adsp cma region to 8MB, as cma region need to be 4MB aligned.
Acked-by: Chenna Kesava Raju <chennak@qti.qualcomm.com>
Change-Id: I7f774dd193435f045243b34fc0d4f2a9ff24329f
Signed-off-by: Tharun Kumar Merugu <mtharu@codeaurora.org>
SPDM feature requires to be enabled, so add SPDM settings
for APPS CPU bus client.
Change-Id: I35fdafcefebcd3fb6e59f3e55bb68d07403abc74
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Setting adsp cma region to 8MB, as cma region need to be 4MB aligned.
Change-Id: Idf7865712a97870fd56d1957b464b98fb92fad2a
Acked-by: Chenna Kesava Raju <chennak@qti.qualcomm.com>
Signed-off-by: Tharun Kumar Merugu <mtharu@codeaurora.org>
Core 6 (MPIDR:0x102) and core 7 (MPIDR:0x103) are not
present in SDM658, SDA658 variants; so make relevant
updates to disable the cpu and other device nodes for
them.
Change-Id: I4633a3c36d367cc4ed5bbca525087d3d1cb57421
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Add sub-device node to allow mba to be able to load in carveout
memory region for SDM630.
Change-Id: Id249ca6512732572b9dce8d59b2e2713caaa7f9e
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Return immediately from idle enter if there is no mode
selected. Log idle exit as failure to enter LPM in the
events that cpu needs to be rescheduled for another task.
Change-Id: I25a444682a8f8c9060f426c03e2f183f86d2fa3a
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
