A check is needed to ensure the LSB and MSB are coherent
when reading the result registers for the RRADC channels.
The driver performs another round of read request and
compares the result registers to ensure the data read
back is coherent.
Since there are no channel specific properties remove
the dependency to add the channel nodes in the device
tree and instead statically register the channels within
the driver.
Update the scaling functions to report in the units
desired for the final scaled value based on the channel.
The resistance channel reports the units for batt_id
in ohms, the voltage channels such as DCIN, USBIN report
the value in units of microvolts, the current channels
in units of microamps and the temperature channels
such as thermistors are reported in units of millidegC.
Change-Id: I56e6bff28be2cc23f00622d5c37e42564c51a72f
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Clients will find it easier to refer to channel
name instead of logical number when reading the
RRADC channel sysfs nodes. Add support to register
the string name when registering the RRADC channel
with the IIO interface.
Change-Id: I972def91c47af5e1d2406c470a40bf6c2f3fbde9
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Query buffer from buffer manager based on buf index.
This allows modules to provide a buffer associated
with a particular request and avoids a wrong buffer
from being returned.
CRs-Fixed: 1018651
Change-Id: I206f3fa334d96e9f57fcbd985922a436ed701ff3
Signed-off-by: Krishnankutty Kolathappilly <kkolatha@codeaurora.org>
Signed-off-by: Hariram Purushothaman <hariramp@codeaurora.org>
Support a new OSM sequence which optimizes the number of
instructions required to program MEM-ACC settings and
the APM configuration of the CPUSS. This frees up sufficent
space to implement the DxFSM workaround.
CRs-Fixed: 1043040
Change-Id: I9499497cb558efcf3c73e7145ce65d3f129be696
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Program architectural register 6 with the address of the SPM
core count hysteresis register and architectural register 7
with the up and down core-count SPM hysteresis values. The
sequencer uses this information to ensure stable operation
when CPU retention or power-collapse and cluster collapse
LPMs are enabled.
CRs-Fixed: 1045435
Change-Id: I5e41ce376c694736128ceb051db86f93467fdaea
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Since LowSVS and SVS frequencies share the same ACC settings,
map any frequency in the LowSVS to SVS range to the same ACC
level. By doing so, the OSM device need only support 3 levels
instead of 4 thus saving sequencer instruction space. Also,
update the ACC setting to ensure bit 31 of the last ACC register
in each cluster is set when running at LowSVS/SVS frequencies.
CRs-Fixed: 1021659
Change-Id: I322b9b57ec89f5cdc75336d83010ff89a6bb5726
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Define the APM threshold voltage to be used by the OSM device
to determine the correct APM supply selection for different
DCVS setpoints.
CRs-Fixed: 1021656 1030444
Change-Id: Iebeb45eaa2503bd5be19f00938d0dbec1163c5a5
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add support to determine the APM threshold corner via open-loop
voltages in the VDD regulator OPP table. The threshold corner
is used by OSM to determine the APM supply for each DCVS setpoint.
The crossover corner is used by OSM to request a specific voltage
during the APM switch transition.
CRs-Fixed: 1021656 1030444
Change-Id: Iac04f6db8e85b3651a33b6c9bff667365cae891d
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add support for a corner whose open-loop voltage corresponds to the
VDD supply voltage required during an APM switch transition. This
corner is requested by OSM hardware to the CPRh controller when
the VDD supply must be set to a specific voltage to ensure a stable
APM switch procedure. Define a crossover corner of 880 mV for both
VDD_APC CPR devices.
CRs-Fixed: 1021656
Change-Id: Icf4b640ec2c330b0d9721d3494297e2d8445c9b6
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Currently, maximum value for VIDC_VIDEO_LTRMODE contrl is set to
LTR_MODE_PERIODIC which is not supported. By limiting it to
LTR_MODE_MANUAL, the control value will stay with in supported range.
CRs-Fixed: 1046755
Change-Id: I85b8ac6dc847343d42cb2f6466137bf43fc1b7c1
Signed-off-by: Amit Shekhar <ashekhar@codeaurora.org>
Add support to IPA USB APIs for SMMU.
CRs-Fixed: 1046497
Change-Id: Ifca675f308b59913743baf2e59dc3ed515a5b974
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Enable SMMU on IPA3 and put in stage1-bypass mode to
not do the memory mapping.
Change-Id: Id2811c67a423c82201993b3119647a3d4caf4517
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
FG GEN3 peripheral is present on pmicobalt and it provides the
battery parameters like current, voltage, resistance and
temperature for the clients that depend on them. Add FG GEN3
device on pmicobalt to support that.
Change-Id: I7ebb6a50564abc8e607f688d59690c55c10e2dc9
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
GEN3 FG (fuel gauge) is a new hardware peripheral which cannot
be supported along with existing GEN1/GEN2 FG supported under
qpnp-fg.c. Some of the differences are listed below.
- No conventional memory access for accessing SRAM
- No OTP region for battery profile
- FTRIM registers will be loaded to SRAM
- SRAM partitioning and address format got changed completely
- Battery id detection done by RR_ADC
- Encoding/Decoding changes for battery parameters
Hence add a new driver to support this GEN3 FG. This driver
reads the battery parameters like voltage, current, temperature,
resistance etc. acquired by the FG hardware and expose to the
userspace through a power supply class device.
Change-Id: Ibcd6e49c7dc7c3520527bcf9553296e846fb7458
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
If we have hit fatal errors and are not able to recover using
a reset, crash the system instead of proceeding and causing
further system failures.
Change-Id: I01820e4e8d3d3b603f16b615ae475095c3a417dd
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
There are events doing probe/remove operations that
shouldn't be swapped. Strict the order by setting
max_active to 1 and adding the WQ_UNBOUND flag.
Change-Id: If65c952622bbaa3f71de6d02c81dbbba5ccead4e
CRs-Fixed: 1046131
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
