Add a PM QOS request to disallow L2PC during wake up
from SLUMBER state. This is required to improve queue
to submit time for first set of GPU commands which results
in GPU wake up.
Change-Id: Iad1a6dfdf9e1fe034eef4fae526138d724bdd3eb
Signed-off-by: Gaurav Sonwani <gsonwani@codeaurora.org>
The original method of getting array member size is wrong.
Considerating vfe_dev->hw_info is set during runtime, so set the number
statically.
Change-Id: I90a2fb19948409b22ed219ba8ec8bc4deb4f0a46
Signed-off-by: Andy Sun <bins@codeaurora.org>
A median filter is useful for filtering out outliers. Add it.
Change-Id: I21f97a870c262e5fb3d33b8250a2bf074f519b58
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Add support for the CC_STEP and CC_STEP_SEL properties in the BMS power
supply. These properties will be used to communicate the future charge
currents for time to full calculations.
Change-Id: I44087b42b31800d1885bdaf1f38815c8756bc9a8
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
There are several algorithms which modify the charge current in steps
across the charge cycle. CC_STEP is used to notify of all the upcoming
charge currents.
The CC_STEP_SEL property is used to select the index of the CC_STEP to
read or modify using the CC_STEP property.
Change-Id: Ieeb533b758035c1c408cdfd68f001374bf0987a5
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
status7 register will indicate all the charger bits are cleared during
the rest or discharge phase of a Qnovo pulse. Moreover those bits remain
cleared after a pulse train is done and before a new pulse train is
issued.
Hence when Qnovo is active ignore status 7 register bits.
Change-Id: Ice61f8a49625081ffbf1aacaac844b929715e818
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
There are a couple of cases where qnovo charging fails,
1. pulse train enable command register fails to write through, or
2. pulse engine fails to start and pulse train timer PTTIME does
not start counting.
In either case, qnovo charging will stop. Here is the fix,
Write register twice when enabling pulse train, and
restart pulse train if PTTIME does not increase.
Change-Id: Ic235f8f2bc67fe577e42848ef623870c25b68256
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The request is to delay ok_to_qnovo for 15 seconds after a charger is
inserted.
To achive that:
Make ok_to_qnovo variable as a votable that can be voted on by
A. HW error conditions
B. Charger is ready after debounce
Moreover since there could be two chargers -usb and dc, create another
votable to track their individual debounce states. The result of this
votable will feed in to ok_to_qnovo votable as branch B above.
Also since we need to stay awake for the debounce time, create an
awake_votable and vote on it while debounce on either usb or dc is in
progress.
Change-Id: I32dc07ba16ef0515a9683f2702d317c39baa2eba
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
At the end of pulse train ESR measurement is forced. It is expected
that when ESR is being measured, which takes about 1.5 seconds, the
next pulse train does not start.
However we see that a uevent is sent to userspace and it enables pulse
train within 100mS.
To prevent that put the pulse train enabling bit under a votable
control. And make QNI_VOTER (the userspace voter) and ESR_VOTER vote
on it.
Moreover, the current pulse train enabling path checks if qnovo was
enabled, make a QNOVO_OVERALL_ENABLE voter to this new voter to reflect
it.
Change-Id: I6d2177250cc47f5aeb6591c532ee18d37e3b02c6
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When FG IADC measurement period coincides with qnovo discharge pulses
it reads incorrect IADC values. That causes issues with SOC accuracy
and capacity learning amongst others.
The fix to IADC inaccuracy is to set a bit in the FG
peripheral while Qnovo is active.
A side effect of IADC inaccuracy fix is that the ESR
measurement goes haywire. To overcome that, disable ESR when
Qnovo is active and force an esr measurement when its between pulses.
Realize this by disabling ESR and enabling the bit when
Qnovo becomes active. The qnovo driver will set CHARGE_QNOVO_ENABLE
property on the bms psy when its active. Also provide code to
force an ESR measurement via a write to RESISTANCE property in
bms psy.
Change-Id: I7160ad6288362c17d28d67b38ec09332d9a6cbd2
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When FG IADC measurement period coincides with qnovo discharge pulses
it reads incorrect IADC values. That causes issues with SOC accuracy
and capacity learning amongst others.
The fix to IADC inaccuracy is to set a bit in the FG peripheral while
Qnovo is active.
A side effect of IADC inaccuracy fix is that the ESR measurement goes
haywire. To overcome that, disable ESR when Qnovo is active and force
an esr measurement when its between pulses.
Realize this by setting CHARGE_QNOVO_ENABLE and RESISTANCE property on
the bms psy at appropriate times in the driver.
Change-Id: I5b37083c843ec6bc052c4d344347b9a80554e226
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Routing driver reuses the same adm for streams with the same
app_type, sample_rate etc. This isn't allowed for ULL streams
as per the DSP interface. We need to open a separate COPP
port for concurrent ULL streams
CRs-Fixed: 2083105
Change-Id: I569b32830145d6dae99449d0bc4148b2f60b101d
Signed-off-by: Haynes Mathew George <hgeorge@codeaurora.org>
Acked-by: Shiv Maliyappanahalli <smaliyap@codeaurora.org>
Add debugfs interface to simulate device and firmware boot step
by step. This can provide the flexibility to debug both host and
device issues in boot path. The debugfs node will only be added
in debug builds.
Change-Id: I4cf03efad5e5a792095f509864fddd54dc6e2e7c
CRs-fixed: 2059087
Signed-off-by: Yue Ma <yuem@codeaurora.org>
Fix scm_qcpe such that an error returned in X0, will be
propagated back to the calling client.
Change-Id: I8014b3f2f850d8664404c69e77ba36295a28db07
Signed-off-by: Amit Blay <ablay@codeaurora.org>
This reverts 'commit 5f71e693df ("perf: stop deadlock if attempt
to bring cpu up fails")' as this change is not needed.
Change-Id: I17e6f7c1b648a5f2559eeea786efafc9be32a9e9
Signed-off-by: Imran Khan <kimran@codeaurora.org>
In the current programming sequence, if a particular logical lane
is not used, we map the corresponding physical lane for this to '0';
which means no connection. This can cause DSI FIFO overflow issues
for panels which don't use all the 4 lanes. Fix this by programming
the LOGICAL_LANE_SWAP_CTRL for all the 4 lanes always, irrespective
of the number of lanes used.
Change-Id: I31a703f8f5133eb85c33fd0d3728f824a435392d
Signed-off-by: Rashi Bindra <rbindra@codeaurora.org>
This check is not valid:
if (len < sizeof(struct ieee80211_mgmt))
Because ieee80211_mgmt contains the ieee80211 header followed by
a union of various action frames, so the check will fail when trying
to send any management frame which is smaller than the largest action
frame in the union. This breaks FST and possibly other features.
Fix this by checking only against the header structure size.
Change-Id: I730300e180d9509f3555f16a0803af53cc8eca0a
Signed-off-by: Lior David <liord@codeaurora.org>
This reverts commit a4ca7944f4.
There have been stability failures (SPM ack timeouts) due to
ACD. Reverting this patch until the issue is resolved.
CRs-Fixed: 2084607
Change-Id: I407e4ecc5bd7af738c0d0599d1fa57007e959495
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
The recharge SOC is based off the monotonic SOC (msoc). Hence, use
the msoc to determine if the hold-soc-while-full logic needs
to be applied.
CRs-Fixed: 2080211
Change-Id: I52b02adc4d97cbed42b0c8034a5a48dba1e343d3
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Add an option for the debug module parameter to skip device boot
during driver probe. This adds the flexibility to boot device
later after kernel boots.
Change-Id: Icd8a544149f3d6b0f4ca3e3f7e004d230c2469ab
CRs-fixed: 2059087
Signed-off-by: Yue Ma <yuem@codeaurora.org>
When floating charger is detected, driver first notifies -ETIMEDOUT to
PMI after 10 sec and then stops peripheral by simulating cable disconnect.
As part of disconnect it notifies PMI to draw 0ma which PMI re-interprets
as a SDP in bus suspend state and reconfigures PMI for SDP. Hence send
charger current notification only as part of cable disconnect simulation
by checking charger type.
Change-Id: Ibafe8d52fa14ff32b6cb11e9f6e15a4f3f147d7a
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Driver should directly call PCI ioremap API, and not customize
it with wrapper function which is only a WAR for QCA6290 chipset
emulation.
Change-Id: Icba3ce0ebbcef94d75a1713f4776524b909e5552
CRs-fixed: 2059087
Signed-off-by: Yue Ma <yuem@codeaurora.org>
