Add QMI message to send MSA0 physical memory start address
and size to wlan FW.
Add QMI message indication to get the HAL-PYH Pin connect test
result from wlan FW.
Add a new qmi message for sending fw debug configuration.
Update cap_resp message.
CRs-Fixed: 978217
Change-Id: Ie0fa374b720ebbffd1d1fd5b9289b2aa816a822a
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
Allow child devices to be defined and populated once the OSM
clock device probes. This enables parent and child relationships
across the OSM clock device and any dependent devices.
Change-Id: I0193663d72e05d8227f9814268ec293cfb94bbe3
CRs-Fixed: 994175
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Use secure IO write calls to program the APM crossover corner
and registers 47 and 48 of OSM sequencer architectural space.
Values for these registers reside in the HLOS, but must be
programmed from a secure domain.
Change-Id: I961bde48822adcbfbbb28130f2872104de5c11ce
CRs-Fixed: 992982
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add a debugfs interface to enable and configure OSM debug trace
packet generation. There are four different supported OSM packet
IDs and two tracing modes. The supported sysfs files and their
corresponding values are:
trace_enable [0, 1]
trace_method [xor, periodic]
trace_packet_id [0, 1, 2, 3]
trace_periodic_timer [1 - 20000000] (us)
Unless otherwised modified through trace_periodic_timer, the
default periodic timer is set to 1 millisecond.
Change-Id: I82b7f78bac7379e9a647b5c8e68c356cd1d5c863
CRs-Fixed: 987787
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Remove the qcom,osm-no-tz flag from the OSM clock device
to prevent the clock-osm driver from initializing registers
which are normally programmed by the secure world.
Change-Id: Iadcbba42eeae1f4e8b4a43e0bf833eaa7e96afd5
CRs-Fixed: 992982
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Enable the pulse swallower, droop, WFx, and power-collapse
FSMs to enable all features of the OSM hardware.
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
CRs-Fixed: 992982
Change-Id: I69fa6fd84c1e89bb6b698b865dcb9ce1bfc35e98
Refactor the enablement and parameter initialization of the
supported OSM FSMs. This initialization can be performed
by the clock-osm driver in absence of secure-world
initialization.
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
CRs-Fixed: 992982
Change-Id: Ie2a78394b388b0357459f1778bb7b2d821abde1c
Support an additional column in the OSM look up hardware table
which establishes a mapping between frequency and mem-acc level.
The OSM uses this mapping to program ACC settings which vary
depending upon the performance level. In addition, update the
OSM sequencer and branch instructions to support ACC programming
as part of the clock scaling scheme and define the mem-acc level
associated with each row of the OSM look up tables.
Change-Id: I03e6f189ab0ab6af406a338bd667fb40240d89b3
CRs-Fixed: 981231
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Move the property overrides defined for the OSM clock CPU device
on the RUMI platform to msmcobalt-rumi.dtsi.
Change-Id: I2f37dc87b3380a1d84b3f2aa1763a47c4ec9b034
CRs-Fixed: 981231
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
The vdd and vdd io for SDHC can be turned off when not in use,
hence remove the always on setting and update the supported
voltage levels as per power grid.
Change-Id: I64059e1c440736884c7fea1a0096351b8b49f976
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
IPA Status Packet parsing is a logic related to H/W.
As such, migrate this logic to IPAHAL (H/W abstraction
layer) of IPA driver and adapt the core driver code to
use it. New internal S/W API is added to access the IPAHAL
for Status Packet parsing.
CRs-Fixed: 980623
Change-Id: I5d6a8b8b18de44b0ae512a4610d9f55f538d0fdb
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
There have been some updates to the multimedia clock frequency
plan on MSMCOBALT. Reflect these in the linux clock driver as
well.
CRs-Fixed: 994012
Change-Id: If787e92dbd59b9147d44a53fa3d35d3b3bcfc3d9
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Update the alpha_pll_set_rate function to support dynamically
updating the pll frequency if the dynamic_update flag is defined
for the pll. Also set the HW_UPDATE_BYPASS_LOGIC bit for these
plls during handoff.
CRs-Fixed: 988270
Change-Id: I7f3527ef45cf68c3f5c41e04bfdd3ede55bbaa4d
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
XO shutdown should not happen when there's still a sleep
vote on DDR. Making CXO as bimc_clk parent takes care of
this.
CRs-Fixed: 992753
Change-Id: I49ac2aefb645a4463cb1873072cd3a1f9a136dad
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Add the dynamic_update flag and define the update_mask to enable
MMPLL9 to be able to dynamically update its frequency.
CRs-Fixed: 988270
Change-Id: I48a40f879b07469a954065d568c12e4a75925292
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Add explicit memory barrier after programming USB3_PHY_SW_RESET
register which makes sure that above write is not cached. If
this register write is cached, then phy driver is timing out
with checking PCS status. In some cases, L2 cache memory error
is seen when that register write is flushed whereas usb phy
clock is turned off.
CRs-Fixed: 990963
Change-Id: Iebe8cb4034721e76fa5ea63e33304b9dc0243797
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Extended compat ID descriptor contains fixed-length header section and
one or more function section. Function section contains five fields as:
bFirstInterfaceNumber, Reserved1, compatibleID, subCompatibleID and
Reserved2. Specification suggests that Reserved1 needs to be set as 0x1
but f_fs driver fails processing descriptors if Reserved1 field is 0x1.
This results into USB enumeration issue due to incomplete descriptors.
This issue is seen with newer adbd which is passing extended compat ID
descriptors.
CRs-Fixed: 994161
Change-Id: Id18261d76edd859ef078f4510dd82b8a6c1ca4bd
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Currently used USB QMP PHY register address space size is 0x45c which is
used by Linux USB QMP PHY driver to memory mapped the region. Some of
QMP PHY registers' read/write offset is above this size. Hence increase
USB QMP PHY register address space size to 0x7a8 to memory map complete
USB QMP PHY related register address space.
CRs-Fixed: 992231
Change-Id: I2a861c6a0d34d75aaad508b182c4007b6b448c2e
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Extend the IOCTL argument to support a vmid parameter for describing
which secure pool the prefetch is for. Also allow multiple different
memory sizes to be given to more accurately describe the future
allocations.
Change-Id: I8a91ef2f8ecf2075c18c963b4c82ca0e97ea770d
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
The previous implementation of moving pages to the uncached pool before
freeing them is unnecessarily complex.
Follow the same methodology as ion_page_pool_shrink().
Change-Id: Ic69947c18b5899e5ca75b7e0039e4e2869a5dfa6
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
After creating all secure pools successfully, i == VMID_LAST.
If ion_system_heap_create_pools(), the error path will attempt to
destroy all secure pools, starting from i.
But this is one past the end of the array.
struct ion_page_pool **secure_pools[VMID_LAST];
Change-Id: Id97ab40a1dc0885f476f6e25cdd324f5ee3dcf04
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Optimize the Ion System Secure Heap by adding per VMID
based page pooling. The secure/assigned pages are pooled.
This essentially uses the same pooling functionality as
the system heap, but adds the VMID component to each pool.
Change-Id: Ib65b3f490ab1bb299b57227edba88b876924ff2b
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
The MSM ion implementation moved the dma_sync call to
ion_system_heap_allocate()
It was inadvertently added back to
ion_page_pool_alloc_pages() by
commit cb22ca6421
("ion: add snapshot of ion support for MSM")
Change-Id: I61029996e59c754b37f45543c4263a100b427867
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
commit cb22ca6421
("ion: add snapshot of ion support for MSM")
mistakenly changed the behavior of ion_system_heap_shrink.
Restore the upstream behavior.
Change-Id: I5c989eefb7196925b11fc6519fb22628994aed30
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
The meaning of the flag "cached = ion_buffer_cached(buffer)" is different
between the msm and upstream ion implementation.
Upstream:
cached means get memory from the ion_page_pool vs. buddy allocator
MSM:
cached means get memory from the cached ion_page_pool vs. uncached
ion_page_pool
if the new flag ION_FLAG_POOL_FORCE_ALLOC == true, then use the buddy
allocator.
In upstream commit ecd32842283c64b14243be9b20b60f351aea1b5d
("ion: Handle the memory mapping correctly on x86")
pages allocated from the ion page pool may have special page table
attributes. These attributes must be unset before the page is returned
to the buddy system.
This issue was introduced by an incorrect cherry-pick of the above
change.
Change-Id: Ia9339e78a4fa3f4734b6c75bb35d226f293dafb5
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
PCIe Advanced Error Reporting is currently enabled
by default with no way of disabling it. AER is not
always ideal to have enabled as it may flood PCIe
IPC logs. Thus, this change provides an option to
enable and disable AER from debugfs.
Change-Id: Ic5b90ad47b4d97ad492745c1f57e1ab85236772a
Signed-off-by: Tony Truong <truong@codeaurora.org>
Update the CPR open-loop reference voltages for msmcobalt
to ensure that the correct open-loop voltages are calculated
based upon hardware fuse values. In addition, rename Turbo_L2 to
Turbo_L1 as this corresponds to the highest fused corner valid
across all msmcobalt devices.
Change-Id: Ia71c6bade7920f80ce4227344011c1f239ac9752
CRs-Fixed: 988269
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
IPA-driver needs to config ep metadata with
embedded call QMAP_ID which IPACM will pass.
The fix is have right qmap_id configure in ep
metadata.
CRs-Fixed: 991570
Change-Id: I0a9549a5c30f53c75fd9ff961ae5dcdc0741c866
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
LED switch node operations are invoked both from LED trigger framework
callback and LED work thread. As work thread and LED trigger framework
operations are asynchronous, a race condition occurs when back-to-back
operations happen. Therefore, moving LED switch node operations from
LED trigger framework callback to work thread to eliminate race condition.
Change-Id: Ia962f3aebda9162e3a35773ef3ee27a4434e6d0c
Signed-off-by: Chun Zhang <chunz@codeaurora.org>
The system secure heap now uses page pooling. As a result, free
operations are fast, since hyp_unassign is not necessary.
Change-Id: I8da8f5adb32c089d5dcac0e560e305401d69fdc9
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Clients may wish to implement custom functions on a particular
heap ID. That function assumes that the heap ID has a specific heap
type. Make that requirement explicit by only calling the custom
function if both the ID and type match.
Change-Id: Ie746362a19a22dceb6e47148d67901d483778a85
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
ion_page_pool_alloc, the only API available to allocate pages from the
pool will request pages from the system if the pool is empty.
For some pools, we need to allocate pages only from the Pool and this patch
provides that functionality.
Change-Id: Ibe4ffe1e8b352f1c9e9a6ad7cc5d31792abc5a66
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
The __pm_stay_awake/relax() calls were moved to runtime callbacks as a
means to fix data loss due to race conditions between incoming userspace
commands and executing PM related callbacks.
However calling the __pm_relax (to notify wakeup event processing)
as part of the runtime suspend callback could be race prone between
the system suspend and the runtime framework. If the system suspend
gets to run before the runtime callback, the wakeup event will block
system suspend.
Remove the use of the wakeup source altogether, instead do these:
1. Block system suspend based on the current clk request count and the
RPM state of the device (to detect potential inbound userspace
requests).
2. If the driver is in the process of executing the system suspend
callback, ignore any userspace requests.
3. If the client calls a shutdown without an unvote ioctl, zero out
the client_count vote forcefully to allow suspend.
CRs-Fixed: 977421
Change-Id: I17de85f29b555c1a4563dd59bec3ba3084c3604f
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Add VMEM slave nodes and associated mmss maxi and axi clocks.
CRs-Fixed: 988418
Change-Id: I36ed4051615f781ff5316c033ba2ff8de96e891e
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Subsystem ramdump collection as of now happen segmentwise, but sometime
there are hole in between segment where dynamic image is loaded and
which need to be captured during subsystem ramdump collection.
This change will dump complete subsystem memory rather than only segments
based on the configuration of subsystem who desire it.
Change-Id: I5075a90817d1a4d00d69ad39d892dbbc40b0b0dc
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Currently, whenever new dci client registers, diag
allocates memory from kernel and free it during
de-initialization. For one of the buffer, it is not
freeing the memory which will lead to memory leak.
This patch takes care of possible memory leak.
Change-Id: Ie50b4a549c249375f93962a5b6b20d614943f1aa
Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
We've exhausted all of the 64 dynamic minor numbers in misc
devices. Ideally, we shouldn't be using so many misc devices. We
should be using cdev directly instead. Increase the number for
now so that kernel drivers don't fail to probe.
Change-Id: I514f4acc7d27b68005ec7f0a8d4ab3c0906b36ff
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
kgsl_mem_entry_attach_process() adds new entry to the mem_idr list
without really having a valid GPU address.
This new entry can be used by other thread with GPUADDR_IN_MEMDESC()
and destroy it.
Get GPU address first and then add it to the mem_idr list.
Change-Id: I4d66cec754ca5315df3c9fe09644f55596c3c33c
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
ETM parser expects ETM trace ids starting from 0x1.
This change fixes the start of ETM trace id to make it compatible with
ETM parser.
Change-Id: Icc5c6de317468b845448dae22a447e8b9a82ea54
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add code to support ETM initialization when CPU comes online for
the first time.
Change-Id: I4a7c02cb71c3bd0ffa01586bed28950067e1f604
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Some TPDMs require to program MSR registers after enabling the DSB
subunit.
This change adds support for such TPDMs.
Change-Id: Iff5c1d73f752c8f9ff483e37cf65f9fe8e2901ca
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Update device tree binding information for STM, CTIs, TPDA and TPDM
devices.
Change-Id: I441086199c80d2952ae418cdeafc7b05df650b4f
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add support to configure mux select registers for all subunits.
These registers can be used to select different trace events supported
by a subunit.
Change-Id: I5d5236e4c0cb94e401dfe82eeb91e8fe7e3c566b
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add TPDM and TPDA devices for msmcobalt target. These devices can be
used to trace various hardware components.
Change-Id: I1f9316636a11794d89ea81cf99a0fba7d77c9c96
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add TPDM and TPDA drivers in upstream implementation of Coresight driver.
This change copies coresight-tpdm.c and coresight-tpda.c files from
drivers/coresight (commit : a8371783eed42f9e1ce9cecc1e3d5fba94f05014)
to driver/hwtracing/coresight directory.
Change-Id: I8a518de3f0ab0e4b0880c5ca00d90a012234a91c
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
