Firmware running on HW blocks could be powering down the branch clock or the RCG whilst software is doing frequency changes. If this happens, the RCG behavior is undefined and may cause issues with its functioning. To work around this, use the RCG root_en bit and force turn it on while scaling the rate. In addition, make the polling timeouts configurable. CRs-Fixed: 971305 Change-Id: If2db14c70614c47d673fc735f5f4bac276d4a3d9 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org> |
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acpi | ||
asm-generic | ||
clocksource | ||
crypto | ||
drm | ||
dt-bindings | ||
keys | ||
kvm | ||
linux | ||
math-emu | ||
media | ||
memory | ||
misc | ||
net | ||
pcmcia | ||
ras | ||
rdma | ||
rxrpc | ||
scsi | ||
soc | ||
sound | ||
target | ||
trace | ||
uapi | ||
video | ||
xen | ||
Kbuild |