0513453847
Add splash region to handle continuous splash over HDMI. Change-Id: I827111ce1656fcd4bc3bc61232c2f81af3bef5eb Signed-off-by: Venkata Prahlad Valluru <vvalluru@codeaurora.org>
131 lines
3 KiB
Text
131 lines
3 KiB
Text
/* Copyright (c) 2016-2017,2019 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "apq8098-v2.1.dtsi"
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#include "msm8998-mdss-panels.dtsi"
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#include "msm8998-cdp.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. APQ 8098 V2.1 mediabox";
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compatible = "qcom,apq8098-cdp", "qcom,apq8098", "qcom,cdp";
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qcom,board-id = <8 1>;
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};
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&spi_10 {
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status = "disabled";
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};
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&msm_ath10k_wlan {
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status = "ok";
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};
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&mdss_mdp {
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qcom,mdss-pref-prim-intf = "hdmi";
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};
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&sde_hdmi {
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qcom,display-type = "primary";
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};
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&mdss_fb2 {
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qcom,cont-splash-memory {
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linux,contiguous-region = <&cont_splash_mem>;
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};
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};
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&slim_aud {
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tasha_codec {
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wsa_spkr_sd1: msm_cdc_pinctrll {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&spkr_1_sd_active_mediabox>;
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pinctrl-1 = <&spkr_1_sd_sleep_mediabox>;
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};
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wsa_spkr_sd2: msm_cdc_pinctrlr {
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compatible = "qcom,msm-cdc-pinctrl";
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pinctrl-names = "aud_active", "aud_sleep";
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pinctrl-0 = <&spkr_2_sd_active_mediabox>;
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pinctrl-1 = <&spkr_2_sd_sleep_mediabox>;
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};
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};
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};
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&mdss_dsi {
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status = "disabled";
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};
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&sdhc_2 {
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vdd-supply = <&pm8998_l21>;
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qcom,vdd-voltage-level = <2950000 2960000>;
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qcom,vdd-current-level = <200 800000>;
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vdd-io-supply = <&pm8998_l13>;
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qcom,vdd-io-voltage-level = <1808000 2960000>;
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qcom,vdd-io-current-level = <200 22000>;
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pinctrl-names = "active", "sleep";
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pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on
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&sdc2_cd_on_mediabox>;
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pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off
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&sdc2_cd_off_mediabox>;
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qcom,clk-rates = <400000 20000000 25000000
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50000000 100000000 200000000>;
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qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";
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cd-gpios = <&tlmm 86 0x1>;
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status = "ok";
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};
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&tspp {
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qcom,lpass-timer-tts = <1>;
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};
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&snd_9335 {
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qcom,msm-mi2s-master = <1>, <1>, <1>, <0>;
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qcom,msm-mbhc-hphl-swh = <1>;
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};
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&wcd_usbc_analog_en1_gpio {
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status = "disabled";
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};
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&wcd_usbc_analog_en2n_gpio {
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status = "disabled";
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};
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&pcie0 {
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qcom,boot-option = <0x0>;
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};
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&soc {
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qcom,msm-dai-mi2s {
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dai_mi2s3: qcom,msm-dai-q6-mi2s-quat {
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/* SD0 (1 << 0) | SD1 (1 << 1) | SD2 (1 << 2) */
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qcom,msm-mi2s-rx-lines = <0>;
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qcom,msm-mi2s-tx-lines = <15>; /* SD3 (1 << 3) */
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active
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&quat_mi2s_sd1_active
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&quat_mi2s_sd2_active
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&quat_mi2s_sd3_active>;
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pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep
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&quat_mi2s_sd1_sleep
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&quat_mi2s_sd2_sleep
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&quat_mi2s_sd3_sleep>;
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};
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};
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};
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