John David Anglin cd4235a794 parisc: Also flush data TLB in flush_icache_page_asm ... commit 5035b230e7b67ac12691ed3b5495bbb617027b68 upstream. This is the second issue I noticed in reviewing the parisc TLB code. The fic instruction may use either the instruction or data TLB in flushing the instruction cache. Thus, on machines with a split TLB, we should also flush the data TLB after setting up the temporary alias registers. Although this has no functional impact, I changed the pdtlb and pitlb instructions to consistently use the index register %r0. These instructions do not support integer displacements. Tested on rp3440 and c8000. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2016-12-02 09:09:01 +01:00
..
configs	rtmutex: Delete scriptable tester	2015-07-20 11:45:45 +02:00
include	parisc: Increase initial kernel mapping size	2016-10-28 03:01:27 -04:00
kernel	parisc: Also flush data TLB in flush_icache_page_asm	2016-12-02 09:09:01 +01:00
lib	parisc: Unbreak handling exceptions from kernel modules	2016-04-20 15:41:52 +09:00
math-emu	parisc: remove duplicate define	2013-11-07 22:28:15 +01:00
mm	parisc: Unbreak handling exceptions from kernel modules	2016-04-20 15:41:52 +09:00
oprofile
defpalo.conf	parisc: switch to gzip-compressed vmlinuz kernel	2013-07-09 22:09:20 +02:00
install.sh	parisc: make "make install" not depend on vmlinux	2013-11-07 22:28:06 +01:00
Kconfig	parisc: Add Huge Page and HUGETLBFS support	2015-11-22 12:23:10 +01:00
Kconfig.debug	consolidate per-arch stack overflow debugging options	2013-07-04 11:25:39 -07:00
Makefile	Merge branch 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild	2015-02-19 10:07:08 -08:00
nm