Make change to support listener service request from mink object.
Change-Id: I9a707d953a85c16c9c5be82fd36960b49da36e3c
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
Add a new kernel API to support listener service for smcinvoke.
Change-Id: Ifeed957b99d2becd986629f60e145d6fdb717244
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
CRs Change ID Subject
--------------------------------------------------------------------------------------------------------------
1103705 Id95a65cefc25174eaf2bcd9b3d97fd8d3e632adb iio: rradc: Update charger die temperature coefficients
1103814 If51734ae27add47a856ca378faf11e54b81e4dcf ARM: dts: msm: Enable context aware and quirks for A512
1104081 I2a17d95328bef91c4a5dd4dde418296efca44431 sched: Fix out of bounds array access in sched_reset_all
1102981 I69001073af6b72875f6d023a1eb754fe0a0e00a1 ARM: dts: msm: Enable camera for msmfalcon.
1059232 I92ace85ee7fd40c3f33f1b9f7bdd32469d990d84 USB: dwc3-msm: Add support for voting for PM_QOS_LATENCY
1103251 I604a94ed28cb8df389eea8815ba0b279c7b7603c ARM: dts: msm: Update Venus PIL clock voting for MSMFALC
1088153 I3499b2ee5bb1ddb74fc94fa55d3f5a8170d72b98 ARM: dts: msm: Modify BT node for QRD interposer msm8998
1097836 I175d76cd193d649f8b91cdab5000f6e1c66de15e cfg80211: Define macro to indicate support for update co
1085388 I2f083a399b0d433ac7e8fd358f75ec0778d0396a ARM: dts: msm: Disable clock gating on msmfalcon
1094763 Ib132eaa99e0632807124f44c8dd3bc90cf6710b0 ASoC: msm: Add routing controls for hfp, port mixer
1099759 Ib8fc3ed96e4704e71d9224a067fd8d9e88373cf0 drivers: mfd: clean up bootup info logs
1096945 I8fc3f646a0127ec705239be6a7de858a4f805acc wil6210: Block write ioctl to the card by default
1059232 I40a86a062910253401dc4a59f7ae84c518eebb5e ARM: dts: msm: Allow only wfi based on USB irq load for
1102504 Ia995e60b8d8d335239be0a35876d1becfd9a0f3c soc: qcom: glink_pkt: Remove BUG_ON in glink_pkt_write
1088153 Ibc1d54ca18c57a83c08e8a1eafc63e6aeb95f7c4 ARM: dts: msm: Enable blsp1_uart3_hs for QRD interposer
1086571 I70c5ec050f88e23c1d09fe0d19ac34a4a56977a1 ARM: dts: msm: Add battery profile for FG in qrd8998 int
1068294 I510c2fe7f763c8d44c67794c889c687df60398d7 regulator: gfx-ldo: support voltage based regulator oper
1100789 I84a936f834101ba2ad9e354c4d8df6d3c051a2f7 soc: qcom: glink_ssr: Add rx done for received packets
1094973 I98e443e894d81bcd815418f2a79723db14d87ce4 msm: ADSPRPC: Add channel for compute/modem DSP
1097863 Ib55302c8fc9dbf2a4114a793e17f9b2dc9ade37c nl80211: Use different attrs for BSSID and random MAC ad
1096083 I22bc2803d1cfa57777dda41c6d635b60f2740fad ARM: dts: msm: configure wled for mdss on falcon interpo
1097836 I184b8e13bc5f7e2ed21e5337673c6ba82cd2f4fe cfg80211: Add support to update connection parameters
Change-Id: I9b9d04bbef27f5576bd29dde1fe8f9bbcd9c419f
CRs-Fixed: 1094763, 1100789, 1103814, 1103705, 1097863, 1096083, 1094973, 1097836, 1085388, 1099759, 1059232, 1096945, 1103251, 1102504, 1068294, 1088153, 1104081, 1086571, 1102981
Add SOC_REPORTING_READY property which indicates when the SOC
reporting is ready from FG driver. This can be read by healthd
daemon during its start.
Change-Id: I415e322e99bacd61c4e9ac921643d87d3eec4b3e
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Add SOC_REORTING_READY property to indicate if the SOC is ready
to be reported.
Change-Id: I53ac153ba9f7ae81bb0657b17e0e798fd3fe4f48
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, smcinvoke driver sends actual content size instead of
size of actual buffer. As per new requirement, TZ needs full
buffer size.
Change-Id: I9e051d8825ff753f801155d1ea941034fa5e1e12
Signed-off-by: Dinesh K Garg <dineshg@codeaurora.org>
In FIFO mode before putting the core in run state the driver currently
only writes a word of data if the payload size is more than the FIFO
size.
Instead always write FIFO worth of data before moving the core to
run state.
Change-Id: I47db9f66c95846dbff882f631b915655c33c3d55
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
Currently we sample power stats at the expiry of
cmdbatch. In cases where cmdbatch takes a long time
to finish the job, it delays power stats sampling,
in effect it delays DCVS decision for changing the
frequency. Do a midframe power stats sampling and
feed it to DCVS if it is enabled.
Change-Id: I547d792b38649aa1d60525b0dc335791b37989fd
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
Add mdss node for msmfalcon target which is used by
display driver.
Change-Id: I49efddea0228e3129d36eabc102d6df0fcd53d12
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
Add the msmfalcon compatible string to MDSS PLL driver dt
table list so that MDSS PLL driver initialization takes place
for msmflacon platform.
Change-Id: I806456737485dfcbca8a71d59db0927bbd843708
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Abort any read() operation to unlock the channel mutex.
On channel remote-disconnect notification, the local side should close
the channel.
However, open()/close()/read()/write() operations locks the channel mutex.
The glink rx-abort notification happens only after the remote-disconnect
notification, not as originally expected.
Change-Id: I77f8e6de6f1b5c447a3516380c51db9c7129d2f3
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
qcrndis_free_inst function can double free f_qc_rndis pointer.
Hence fix this memory bug in qcrndis_free_inst function.
Same bool RNDIS flag is used for USB_CONFIGFS_RNDIS and
USB_CONFIGFS_QCRNDIS. Add bool Change in Kconfig to differentiate
these two different configs.
Change-Id: I8e7c4be090107618cd6cbac394a57f109f8a1ced
Signed-off-by: Chandana Kishori Chiluveru <cchiluve@codeaurora.org>
This patch enables allocation of 5MB for new diag client
of memshare.
CRs-Fixed: 1100632
Change-Id: Iab69062336966e61683117a17974f46cd8f513aa
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
During system wakeup from suspend by connecting USB cable,
runtime PM framework transitions from enabled to disabled
state during i2c transaction. This causes asymmetric increment
and decrement of device's usage counter which blocks runtime
PM suspend callback.
To avoid this, remove rumtime PM status check on suspend path
to make it symmetric with the resume path. This takes care
of unaccounted increment/decrement of device's usage counter.
Change-Id: I47cfe2cd7d93ba5db57365cf250c600dac22bab1
Signed-off-by: Shrey Vijay <shreyv@codeaurora.org>
Configure the button under the display panel as
a home key for QRD8998HB.
CRs-Fixed: 1103939
Change-Id: I03e4a8e10452ef53d8e35e7cee44bdf51f53483b
Signed-off-by: Jin Fu <jinf@codeaurora.org>
Remove the "down stream" registration during EDID
initialization so that all the support resolutions
are exposed to the framework.
Change-Id: I9dcc89d75f97d2c88563af6389a3f87a7982b155
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Commit 4216b747aa5d6ac0171ab584237cdaec1044e4e7 ("mdss:
display-port: add support to configure transfer unit attributes")
incorrectly handles 64-bit integer divisions which may lead to
errors while compiling for 32-bit target architectures. Fix these
errors.
CRs-Fixed: 1086278
Change-Id: I1ae86f2ee72b85c78d34d5fa8a09e5c467bcde86
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add code to calculate transfer unit parameters that change depending
on the DP monitor/Sync resolution. Use these parameters to configure
the transfer unit registers.
CRs-Fixed: 1086278
Change-Id: If2978d3721c7ac6910379f3d31342f820062e3c6
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Implement the necessary programming sequence to configure the
uPacket RX of a connected downstream device in power save mode.
Add a new sysfs node to trigger the configuration as follows:
To enter power save mode:
* echo 1 > /sys/class/graphics/<fbi>/psm
To exit power save mode:
* echo 0 > /sys/class/graphics/<fbi>/psm
where fbi is the framebuffer node corresponding to the display
port device.
CRs-Fixed: 1076516
Change-Id: I306ff4451d56dfa7edcff93fe26842ae9af71b69
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Only RmNet and DPL need to update their IPA pipes
during ipa_data_connect_work context. Add this check
before updation of the pipes.
Also fix usage of spinlock to avoid potential
device crash.
Change-Id: I45d13b40fab9bf6686277c0c26a07668410cdfb2
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
The commit 04a0136aeea5 ("clk: introduce CLK_ENABLE_HAND_OFF flag")
assumes that the first time clock client calls a clk_prepare &
clk_enable, the clocks from that point of time could be on their own.
But there could be use cases which could have impacts due to this
handling. Moving the handoff counts for prepare and enable at unused
tree level.
Change-Id: I7d527571c2eb4d53d58d82126989bd673de12e2d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Some clocks are critical to system operation (e.g. cpu, memory, etc) and
should not be gated until a driver that knows best claims such a clock
and expressly gates that clock through the normal clk.h api.
The typical way to handle this is for the clk driver or some other early
code to call clk_prepare_enable on this important clock as soon as it is
registered and before the clk_disable_unused garbage collector kicks in.
This patch introduces a formal way to handle this scenario that is
provided by the clk framework. Clk driver authors can set the
CLK_ENABLE_HAND_OFF flag in their clk data, which will cause the clk to
be enabled in clk_register(). Then when the first clk consumer driver
comes along and calls clk_get() & clk_prepare_enable(), the reference
counts taken during clk registration are transfered (or handed off) to
the clk consumer.
At this point handling the clk is the same as any other clock which as
not set the new CLK_ENABLE_HAND_OFF flag. In fact no changes to any
clock consumer driver are needed for this to work.
Change-Id: Ib5247f6bceb1f555c03103f061af089755b2de62
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Patch-mainline: patchwork.kernel.org @ 02/11/16, 9:19
Signed-off-by: Taniya Das <tdas@codeaurora.org>
CPU OSM clock is required to be enabled for cpu to be able to scale
frequencies for the CPU.
Change-Id: I5680dc5333c9664e1316c29a91e29231f15eb4f1
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Update WLED configuration to enable HVG_PULL_SWITCH bit to
temporarily pull up Hvgate with larger switch(for pm2falcon)
and enable DEBOUNCE_BYPASS_ILIM bit to remove debouncing for
Ilim. This guarantee stable operation of WLED.
CRs-Fixed: 1102641
Change-Id: I39a1266f4158e71238f374b6cba49e1a8c2b1a3b
Signed-off-by: ansharma <ansharma@codeaurora.org>
Check if cp_irq has been raised by sink, if so, read bstatus
register to check the status of hdcp at sink side. Clear the
cp_irq after reading bstatus. Also, fix the bstatus read size
which is one byte.
Change-Id: I46231f82878f8d2557aa06ccfa5c74f67252c6f8
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Following list of changes have been made
- Update the clock osm to register to common clock framework
- Update clock ops as per common clock framework
- cleanup unused function (clk_osm_setup_osm_was)
- Fix tabs for macro definitions
- Add clocks ids for power and perf clock for clients
Change-Id: I389cc9e93a26a434be752cf74444d6c0985ff36d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Set ship mode in qpnp_pon_system_pwr_off() API if it has been requested
previously.
CRs-Fixed: 1092969
Change-Id: I6e315eec256f01c143ffc8b463279f2b30e64610
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Update the PHY/PLL setting related to pre-emphasis and voltage
swing as per hardware recommendations.
Change-Id: I3bbd7c8de541e22da30205d93a98d48f82288865
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
A sink can have more than one EDID blocks. The extension
block count is provided in the first block. Not reading
all blocks can result in DP compliance failures.
Read all the extension blocks as mentioned in the first
block to avoid any EDID related compliance failures.
Change-Id: I9cfe6403da511e6af3b887fcf858109852e9844c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Wait for the user modules to come up during boot up before
sending events. In case user modules are not yet up,
events sent to them are ignored. If the cable is connected
at boot up, wait for user modules to enable hpd (Hot Plug
Detect). On receiving hpd, check if the cable is already
connected, if so, notify user modules so that power on sequence
can be initialized.
Change-Id: I91242fbfd32a478324b98edba4349081d9e55601
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update the I2C configuration for AUX communication
as per hardware recommendations.
Change-Id: If5550b66660aab692f9a358b50e0d1fb157b1d58
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Initialize the DisplayPort's host controller once the usbpd
configuration has been done. Do not wait for HPD high as some
DP sinks may not issue HPD high unless the host is initialized.
This avoids a deadlock between sink and source where source is
waiting for HPD high and sink is waiting for the DP host.
Change-Id: I1cdcb3556779d00fd2b4ecd264fa6b187bf4e317
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Upon out of XO shutdown due to remote wakeup, as soon as XO gets
restored refclk is supplied to phy before even refgen current
is stabilized. USB3 controller asserts suspend_n signal asynchronously
for remote wake-up scenario solely based on utmi_linestate switching
from J state(suspend) to K state(resume). As a result phy attempts to
lock PLL since all prerequisites are met but, PLL lock attempt fails
and phy gets stuck. Since GCC_RX1_USB2_CLKREF_EN which was supposed to
control differential(CML) clock output to QUSB2 is a no-op, hence switch
to SE clock by PHY CSR controlled mux upon suspend. This prevents refclk
output to go directly to phy upon XO restore and prevents premature phy
pll locking. Phy PLL actually gets locked when phy driver switches back
from SE clk to diff clk.
Change-Id: Ie5474c42ccdd88df4c101b2113ca8d924eddf037
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Remove the additional unbalanced unlock being called for the
link training mutex. This fixes random crashes seen while
running Display Port connection/disconnection tests.
Change-Id: I2fce80cec72e3bd8b1561fd46fa1a1520cddd294
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
If the calculated link rate based on sink's capabilities exceeds
the maximum supported link rate, do not error out. Instead, cap
the link rate at the maximum supported rate. This fixes instability
issues seen when connecting to sinks at 4K resolution.
Change-Id: I214bb19385f855af61da628fdf1cf7efc5dd08d6
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add support for PHY compliance tests by parsing requests
from the reference sink and generating the requested
PHY test patterns from DP PHY.
CRs-Fixed: 1076516
Change-Id: I290ec786bbe5c45873265ea74290eefcd3d16cb1
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
