If an ahash request is not final, the result variable of ahash_request
may not exist. In the completion callback function, then, do not
copy the digest result to result variable of ahash_request, if it not
final. Otherwise, crash may happen.
Change-Id: I169218e8658500539b19408eca3afeabcaa4816b
Acked-by: Che-Min Hsieh <cheminh@qti.qualcomm.com>
Signed-off-by: Sivanesan Rajapupathi <srajap@codeaurora.org>
cma regions can be allocated for secure use cases where
the virtual mapping is removed. kmemleak scan can try to
scan through this mapping causing mmu faults. Hence free
cma regions from kmemleak scan.
Change-Id: I2cc66423ec9ec539905cc8d07bbc40fa43e695bd
Signed-off-by: Shiraz Hashim <shashim@codeaurora.org>
Add cpu enter and cpu exit log into lpm debug for 32bit.
Change-Id: I88973dbc4f9ffc08f8201059a82a3133fa0db330
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
The worker thread can either be stopped through kthread_stop or could
return from the function on some conditions. Since thread has two exit
points, this is causing a race condition where kthread_stop indefinitely
waits for the thread to exit. Make the thread standalone and always call
do_exit itself to exit instead of stopping it through kthread_stop.
CRs-fixed: 972943
Change-Id: If95cbd6ee895d566887453e98421d1514147441b
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
Add split DSI display support for MSM8996 AU CDP board. It's
using NT25597 dual DSI video panel.
CRs-fixed: 977619
Change-Id: Ibeee5fa903c152c8242a2b27be3d9df9670b762e
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Set the recommended high bit bank value for all of the various GPUs
that will be programmed into registers by the kernel and/or the
user mode driver.
CRs-Fixed: 970272
Change-Id: Ic0dedbadcd02dd37afce0807ac1118fe7bf10b5d
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
On 5XX targets we need to program the bit of the highest DDR bank
into a number of registers, one of which is protected which would
cause problems if the user mode driver tried to write to it.
Specify the high bank bit in the device tree files, set the
problematic register in the kernel and then pass the value up to
the user mode driver as a property and let them program the
other registers. This makes the device tree the authoratative
source of the high bit value which is exactly how it should be.
If the value isn't specified by the device tree for whatever reason
return an error for the property request - that will give the UMD
a clue that the value wasn't specified and they should just set a
default.
CRs-Fixed: 970272
Change-Id: Ic0dedbad830321329b74da7fa3e172fdaf765c4d
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
For performance improvement avoid multiple writes to channel ring
which is a dma coherent memory. Instead, construct the TRE
(Transfer Ring Element) in local memory and then copy it to the
ring itself.
Change-Id: I36bfae306be2a90c8679d416397a435e638b54eb
CRs-Fixed: 977590
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Enable CSID IRQ dynamically and add sof recover logic,
in case kernel get sof freeze hints from userspace,will
enable IRQs to monitor the status of moduels,if sof recovers
after 2.5 secs then kernel get MSM_SD_UNNOTIFY_FREEZE to disable
all the IRQs.
CRs-Fixed: 973732
Change-Id: I7aa6dcd60e0858258c40c3d6517e2974e6e2b722
Signed-off-by: Ramesh V <ramev@codeaurora.org>
The pm_qos framework passes down a mask of cpus for which the qos has
changed. cpuidle driver uses this info to wakeup only those cpus for the
new qos to take effect. This would prevent waking up cpus for which the qos
values remains unchanged.
Change-Id: Ibb79937674a8f16920c6b8f224a21d2f72a0f9ce
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Add a devicetree property disable-busy-time-burst to
disable ceiling threshold in the governor. The ceiling threshold
cause busy time burst that switch power level for
large frames based on busy time.
Change-Id: I44f8a51e0aa49bb0b2210703f57874fd5f219c18
Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
There is a race condition when a read is queued and a
subsystem restart occurs before the read can finish. The
read will call read_done on a freed handle. This fix
changes the ss_reset lock to a rwlock and extends the
critical sections in the read and write data functions.
CRs-Fixed: 969026
Change-Id: I7726e4bbea7447ad96df725b50e4eff1ec67607f
Signed-off-by: Chris Lew <clew@codeaurora.org>
Add sharp 4k dsc cmd mode panel configs and enable it for
msm8996 mtp, cdp and fluid. Add partial update for support
with roi alignment width as 1080 and y-slice as 8,
as per the spec. The panel is also capable of supporting
y-slices 8/16/24/32/48/3840, but width/x-slice cannot be
modified.
CRs-fixed: 974677
Change-Id: I6e7e96178db604f71a16f1f656e38d66d37eca66
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Fix the panel on command for sharp 4k dsc video model panel
according to panel spec. And remove few parameters from the config
file, which are unnecessary for video mode panels.
CRs-fixed: 974677
Change-Id: I92cb0c5a30206b6b788cdfe2b0316e4bf77d1828
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
The GPU GDSCs need to be turned prior to enabling the graphics
clock and programming the CRC registers. Add that support.
CRs-Fixed: 974342
Change-Id: I4f97c10c383f79490c8dc428ef5ffb1040adc18d
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
When configure the scratch buffer, wrong pingpong bit location is
programmed. So the VFE hardware can still write to the same buffer
which has been diverted to other camera compoment. This cause the image
corruption.
Change-Id: I6d5cfe0c00a237efb3ab3dff87459341736d45a7
Signed-off-by: Jing Zhou <jzhou70@codeaurora.org>
Allocated memory is not getting freed in remove request.
This change is to free the memory allocated to avoid memory
leaks.
Change-Id: I1225d492b7f58f8bda2621ec0bb2bd201d8dee6c
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
The camera drivers for msmcobalt are not ready yet for
presilicon verification, Hence disable them from
the dtsi.
CRs-Fixed: 974351
Change-Id: Icdf65d0aabbac5661a803d2a3d6d04f78071d963
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
wear_leveling_worker() currently unconditionally puts a PEB on erase in
the error case even it just been taken from the free_list and never
used.
In case the PEB was never used it can be put back on the free list
saving a precious erase cycle.
v1…v2:
- to_leb_clean -> dst_leb_clean
- use the nested option for ensure_wear_leveling()
- do_sync_erase() can't go -ENOMEM so we can just go into
RO-mode now.
CRs-Fixed: 975289
Change-Id: I9955366673af13e6cfd3da3523dba4857b2b4ea2
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Richard Weinberger <richard@nod.at>
Git-commit: 34b89df90374b631692132640c6b3dbef52f808d
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
Add a comment in key.h to explain why we keep an unused
parameter in key helpers.
CRs-Fixed: 975289
Change-Id: I88633f34f7f49b5b895f2295c1ce4ad250900fc0
Signed-off-by: Dongsheng Yang <yangds.fnst@cn.fujitsu.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Git-commit: 170eb55f7d4ba9564736ba298a7d4985422db4cc
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
Add 32/48KHz sample rate capability to the VoIP driver to
allow VoIP application which uses 32KHz/48KHz sample
rate to take Voice path.
Change-Id: I654b97ffc36b993114899e85706914d99ef44abc
Signed-off-by: Shiv Maliyappanahalli <smaliyap@codeaurora.org>
Add capabilities to GSI driver to collect data path statistics
in order to help debugging throughput issues.
This change also exposes the a debugfs interface to print stats.
CRs-Fixed: 975119
Change-Id: If97512af034bd419cf4f679b1c19419605529fa6
Acked by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Compress offload playback failures observed if SSR is triggered
during playback. Compress_write is blocked as there are no bytes
consumed by the DSP. During SSR, based on the reset events,
driver has to update the bytes copied by the DSP so that write
gets unblocked.
CRs-Fixed: 966659
Change-Id: I24d5bf09b3453f101adb9487298e6fbdfeb15e4a
Signed-off-by: Venkata Narendra Kumar Gutta <vgutta@codeaurora.org>
The current code enables GPU clock gating only for v2 and v3.
Enable it for MSM8996pro also.
CRs-Fixed: 974760
Change-Id: I2bcdbf73be080fba836c24616fc7959ad7c4c1e9
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
Add slimbus 6 playback hostless and slimbus_6_rx back-end
dai-link to enable independent backend for different devices
during audio playback.
Change-Id: Ibc12ca8ad2c99316c52092b74462ecd7bfbded5c
CRs-fixed: 940415
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
Add codec rx4 dai to support independent backend for different
devices.
CRs-fixed: 940415
Change-Id: I48b24d81e2047d4d4c299ca60cdbd299e172393e
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
Update the slimbus RX 6 routing and add the slimbus RX6 hostless
to support more use cases.
CRs-fixed: 940415
Change-Id: I4fcea97cc4a0c876609fbaa8f5eecf3b4914e776
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
Add slimbus_6_rx back-end dai-link for msm8996 to enable
independent backend for different devices during audio playback.
CRs-fixed: 940415
Change-Id: Id588c1951262d2c76d3b7789c76ca04068b7ffff
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
Update PCM device node from ULLPP mode to low latency mode which has
matrix to match to different backend ports.
Change-Id: I71e3bde88b8a14b6975b51d4c739e5993162313d
CRs-fixed: 940415
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
Enable content protection for A506 from gpulist.
Also, skip scm call to program CP secure ucode base
registers since A506 supports retention for these
registers.
Change-Id: I48a0f04826430bfb927c755c176255be45199b26
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Open ack is received in separate work queue than process_open_event.
It causes race condition since process_open_event and process_status_event
might get scheduled before glink is notified about open ack.
Glink will be notified about ack in process_open_event.
CRs-Fixed: 974508
Change-Id: Ie03a4914c2655ae5140a740cde73b06bb6d43291
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
Check if 'mbhc_cb' is NULL in wcd_mbhc_stop() before
dereferrencing.
CRs-Fixed: 972101
Change-Id: I3b2348bddb071e5bf7bc2e5d6885bb3c1ba2c195
Signed-off-by: Karthik Reddy Katta <a_katta@codeaurora.org>
We need to pass TZ specific device id when
calling into TZ for SMMU configuration. Expose
these device ids and an interface function which
can be used to extract these device id.
CRs-Fixed: 959535
Change-Id: I31239d187c893e1bf419a5e9b5add127699ef701
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
The RPM channel is now available for msmcobalt. Remove the rpm-standalone
flag to enable communication with the RPM.
CRs-Fixed: 973067
Change-Id: I4215633d2608cd2ac0a588ddf476accd47abfdff
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Communication with the RPM has not yet been verified on RUMI. Configure
RPM in standalone mode until it has been verfied.
CRs-Fixed: 973067
Change-Id: If82537272cfb14509420928a8985bcb71761b24f
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
LDOs 5 and 7 are missing from msm-pmcobalt-rpm-regulator.dtsi. Add them.
Update the min and max voltages for LDOs 18 and 22 to reflect the
changes in the most recent documentation.
CRs-Fixed: 973067
Change-Id: I57d11af8e63a2a40dcbfa6aae34ee04b286780bc
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Add CPU IDs to the socinfo table needed to support MSM8996AU.
CRs-fixed: 971957
Change-Id: Ifaed6df0a99999566e6241fbf98f45ab92f8c0fe
Signed-off-by: Ajit Khare <ajitk@codeaurora.org>
Signed-off-by: Mathew Joseph Karimpanal <mkarim@codeaurora.org>
Add ETM devices for APSS CPUs. These devices can be used to configure
and enable processor traces.
Change-Id: I7d0ade28161eb77992eb19b19233261895afa169
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Defining the context banks and the appropriate VBIF settings allows
Venus to make DDR accesses.
Change-Id: I5f2052a28f19545b080c863c425dac45f7511643
Signed-off-by: Deva Ramasubramanian <dramasub@codeaurora.org>
Add device tree files that are needed to support MSM8996 Automotive CDP
platform.
CRs-fixed: 971957
Change-Id: Ifbef60c283d1b51274ac41c6eb00fc9e186986d1
Signed-off-by: Ajit Khare <ajitk@codeaurora.org>
Signed-off-by: Mathew Joseph Karimpanal <mkarim@codeaurora.org>
Preemption from secure to unsecure needs zap shader to be run
to clear all secure content. CP does not know during preemption
if it is switching between secure and unsecure contexts so
restrict secure contexts to be preempted at ringbuffer level.
At the end of each secure submission we switch back to unsecure
mode and run the zap shader to clear secure contents. Ringbuffer
level preemption ensures Zap shader is run before switching
back to unsecure mode.
CRs-Fixed: 974102
Change-Id: Iff11c1d5732d46fe5a1fbdbc7d162aaa1736741b
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Program the DROOP_CODE register for both clusters so that
the limits management clock is gated off during certain
sleep states.
CRs-Fixed: 973567
Change-Id: If4860d329393ece54a4d0f017c2700d4bde9d2b6
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Speed bin information is sometimes written to efuses to
specify a GPU frequency plan available on a platform. The
current code only supports reading the efuses for msm8996v3.
Hence specify it in the platform device tree node to
support multiple platforms.
CRs-Fixed: 967494
Change-Id: I5db4d5a35e2700250517ea6cac3d4d736936ce9f
Signed-off-by: Suman Tatiraju <sumant@codeaurora.org>
The dsc config-select parameter in sharp dsc 4k video mode panel
wrongly points to a different config structure. Fix it to
use the correct structure.
CRs-fixed: 973663
Change-Id: I5b3d07e4c7c3c3f0465db6ab4a2ca64d17a1e642
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
