Update the rpm-smd communication API to send across votes for clock
enable/disable to RPM. Use the clk_hw list for the RPM clocks and also
update the clock ids and clock names for RPM clocks.
Change-Id: I37ae97f22b1b39d040bb78c90b1ff231bc348fe6
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Some RCGs would be expected to be enabled/disabled using
the root enable bit of the RCGR. These RCGs would have to
indicate the force enable using the FORCE_ENABLE_RCGR flag.
Change-Id: Ia1eaba2728d06066612739ff48f7e5e44322e96b
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Add Bluetooth bus type for product id = 0x05ac and vendor
id = 0x0220, so that it can be handled by specific vendor
driver to parse specific key events which cannot be handled
by generic USB HID driver of kernel.
CRs-Fixed: 1072093
Change-Id: I68b585db1b350c7ffd8ea662cab550aaa7a0727d
Signed-off-by: Hemant Gupta <hemantg@codeaurora.org>
The load balancer restrictions are in place to control the tasks
migration from the lower capacity cluster to higher capacity
cluster to save power. The assumption here is that higher capacity
cluster will have higher power cost which may not be necessarily
true for all platforms. Use power cost based checks instead of
capacity based checks while applying the inter cluster migration
restrictions.
Change-Id: Id9519eb8f7b183a2e9fca87a23cf95e951aa4005
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Add additional verbiage to the info logs to help
determine the type of source cable connected: default,
medium or high current. Similarly, if a sink is attached,
indicate whether it is with a powered cable or not.
Change-Id: I0687365827cdbb8a1b7168a2b676b1afd2f576f6
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Enable recycle wan buffer support in IPA driver
to support napi in rmnet ipa0 net device.
Change-Id: I54efe72b5cf4ecdf50c7c642a8b453c46d057e57
CRs-Fixed: 1072443
Signed-off-by: Sunil Paidimarri <hisunil@codeaurora.org>
When attempting to restore multiple endpoint's configuration
space over a switch or bridge, only restore for the ones
that are accessible and powered on.
Change-Id: Ie6234ae30ad47a063982e5cc50f4ecedf1f61de2
Signed-off-by: Tony Truong <truong@codeaurora.org>
Correct the base address of BAM device when dump registers of the
BAM.
Change-Id: I12f49919a278b176bb85f353f5ce538f22ddc059
Signed-off-by: Yan He <yanhe@codeaurora.org>
Fix the bug introduced by commit 82d4ec9778
("usb: Add support for reset controller framework") which
overrides the core clock rate from device tree.
Change-Id: Ic3ef2229fa8552301e09dfb912e79e044a81324f
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
Optimize the initial rotator session opening time by moving the clock
and BW voting to the start of rotator. Also adjusting the clock
calcuation to include overhead and fudge factor. Create debugfs entry
for supporting override the clock and BW calculation
CRs-Fixed: 1071288
Change-Id: Ia6a84f160d0288ced98bf9f1818d9eabfc2e3963
Signed-off-by: Benjamin Chan <bkchan@codeaurora.org>
Remove support for 710 MHz as the highest possible frequency that
the graphics core clock can scale to on MSMCOBALT v2. The new FMAX
will be 670 MHz.
CRs-Fixed: 1072272
Change-Id: I39119c9dd527dec6a9f4745c0502c83d083f4b26
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
WLAN firmware can reject QMI message, improve the logs to
indicate the same.
CRs-Fixed: 1071938
Change-Id: I7ab180e06ececf8136903ee04565b8b4a2bf3524
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
Verifying the i2c table index value before accessing
the i2c table to avoid memory corruption issues.
CRs-Fixed: 1065916
Change-Id: I0e31c22f90006f27a77cd420288334b8355cee95
Signed-off-by: Sureshnaidu Laveti <lsuresh@codeaurora.org>
There is possibility of memory leak when rpm create request
fails. Fix it by using kfree.
Change-Id: I0aba2165cd7e1a0d6f4227ccdcfb7ba9317bdc62
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Convert the driver to dev_pm_ops from SIMPLE_DEV_PM_OPS
in Goodix TS driver to reduce suspend/resume latency.
Change-Id: I45690b239c73f636538b864f0c4a7e539a02eedb
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
The PBL spare status registers provide more info
about the reason for PBL failure.
Change-Id: I1dddc7df26caa1556e57128603afd32b2613ebde
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
When no audio use-cases are active, codec digital core
can be put into power collapse to reduce the power consumption
during codec stand-by. Add support to put core into power
collapse and remove out of the collapse when audio use-cases
are triggered.
CRs-Fixed: 1063742
Change-Id: I0314b7319f2ef02d6125b77e68bf47d065521f6a
Signed-off-by: Meng Wang <mwang@codeaurora.org>
HFP client call is not working on external codec over I2S
as backend entry is missing for multimedia6. Add entry for
multimedia6 in routing map to fix the issue.
CRs-Fixed: 1069401
Change-Id: I98b8dcc26ec776777b835e8438983c79aeb25a42
Signed-off-by: Dhanalakshmi Siddani <dsiddani@codeaurora.org>
Interrupts are useful for testing and debugging. Enable all fuel gauge
interrupts.
Change-Id: Ic6dd2d1e7f829630dc6eae5ff74fae04f7fc7f9b
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Some SRAM registers are encoded using a floating point representation.
Add a function to decode these registers into signed micro-unit
integers.
The exponent and mantissa are signed integers represented by two's
complement, and the exponent value is offset by -9. This is a half
float representation stored as:
EEEEE MMMMMMMMMMM
Where E are the exponent bits, and M are the mantissa bits.
To decode this representation the following formula is applied:
2^(exponent - 9) * mantissa
Change-Id: Id9f28a0eeb2a904aca41eb46d0215d80287e0b88
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Rate converter clock needs to enable for adaptive ANC
(Active Noise Cancellation)to work otherwise noise mic
data will not go to Rx path. Add change to enable rate
converter clock.
Change-Id: I8c83f6305dbc0a40b67bf2ffd53d37a0abdcf953
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
User space may request of concurrent writeback (CWB) on the previously
programmed frame where input HW reprogramming may not be needed.
This change make sure mdp control flush is force triggered when
CWB is requested. Since signaling of fence timeline mandates a non-zero
commit count on the display, this change tracks a separate commit count
each time CWB is requested for the frame.
Change-Id: I7f6a134af9e5ad245a53063a90f1d7b625882a15
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Allow scaling the performance cluster clock to 2.3 GHz using
single core frequency boost on MSMCOBALT v2 speed bin 1 parts.
CRs-Fixed: 1070684
Change-Id: I473a1965989ac652c630b69c6086b74d0bdabfa3
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
The current OSM framework does not support mapping multiple OSM
clock frequencies to the same CPR virtual corner. Enable this
support and update the current clock DT entries accordingly.
CRs-Fixed: 1070684
Change-Id: I3422848cabf221f497eb91f9aae5905e34ebdc84
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Update the QoS settings for concurrent writeback in the
supported targets.
Change-Id: I9f190393eb4fcf9f5b3e004732cafeb7ee622894
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Change FnR rule creation prints to low in order to avoid IPC
logging flood.
Change-Id: Ie1f0f48ffc1fd67fc8a2074d3d334fb8cd29c99f
CRs-Fixed: 1064336
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Clock must be set before enabling it.
Enabling clock before setting it may run the clock at a lower
rate than required.
CRs-Fixed: 1046014
Signed-off-by: Rajesh Bondugula <rajeshb@codeaurora.org>
Change-Id: I92618b736e637b1575a77a7fc18dd384919ed927
Regulator enable and disable of CSIPHY depends on the CSID module.
Make the enable and disable of clk regulator independent of CSIPHY.
CRs-Fixed: 1050172
Change-Id: Iefd57ae1c3fb5774b8043ef2e824acbacc8d16d2
Signed-off-by: Viswanadha Raju Thotakura <viswanad@codeaurora.org>
Add top-level wcd934x codec registers as volatile because
those registers get updated even before register map cache
initialization.
Change-Id: Ibdf5f695e5464b9597d153f725ff461f89b62ae4
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
For MSMCOBALT QRD SKUK board, add a new file for the new wqhd command
panel. And enable it in the board.
Change-Id: Iac5b202343bcf0265baf7732196b33dc5fe9c18d
Signed-off-by: Mao Flynn <feim1@codeaurora.org>
Remove code that reads firmware from the header file,
this feature is not supported.
Change-Id: I6c18e153ddf18667ca83d47df20c71bce6dbfa21
Signed-off-by: Himanshu Aggarwal <haggarwa@codeaurora.org>
Remove irq polling from Goodix driver. Use interrupt based
mechanism to process interrupts from touch controller.
Change-Id: I0a9037eac6e30a6319919043dd2ef1c226663af9
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
Signed-off-by: Sudhakar Manapati <smanap@codeaurora.org>
In cases where we do not use the CONFIG_COMMON_CLK_MSM
and clients who use clock_debug_print_enabled would fail
compilation. Fix the same by adding the config check.
Change-Id: Iaa878754e1d769056a621066eb8a73e1bc55d3a0
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
For ADSP SVA, MAD cannot work without MCLK. Connect them so that
dapm can power MCLK up.
CRs-Fixed: 1070327
Change-Id: Ia79f862379ad32e5a44dce6bdc905d2083a45b60
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
To support ADSP SVA with wcd934x codec, audio codec path needs to
be set up from MAD module to slimbus port. Establish the path and
reserve the slimbus TX13 port for it.
CRs-Fixed: 1070327
Change-Id: I4cc20bd7070a51a121a0da33c9b30233443bb543
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
Current implementation for getting fw files for a target is
supported only in PCIE based QCA chipsets. Add support to
get FW files for QCA SDIO targets.
CRs-Fixed: 1036232
Change-Id: If6c273d9a86f9fc4bc841388b11b96c385dc64f4
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Add support for CTI, DCC and Watchdog for msmfalcon. DCC is used for
capturing register values and CTI is used to map triggers.
Watchdog is used to handle kernel panics.
Change-Id: I4202cfb21868983792e75e8ef6a305030879fb39
CRs-fixed: 1056777
Signed-off-by: Amey Telawane <ameyt@codeaurora.org>
Add threaded irq support to Goodix touchscreen driver to reduce
the time spent with interrupts diabled to a bare minimum by
pushing the processing out into the kernel thread.
Change-Id: I3ade13181957d327ad9d0266b1999a4b0f2d8d1a
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
Request TZ to unlock WLAN doorbell register for ipa
uC access for offload data path.
Change-Id: Ia79b1d8a9a0213c2f5296140bff7a36d3f035e21
Acked-by: Shihuan Liu <shihuanl@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Driver sets the speed using extcon cable state flag. This
allows to start host or peripheral in selected speed.
By default start peripheral in super speed mode. However,
starting host in super speed consumes more power so to
achieve lower consumption default it to high speed only.
Add module params to override the default behavior as follows:
# echo Y|N > /sys/module/policy_engine/parameters/ss_dev
# echo Y|N > /sys/module/policy_engine/parameters/ss_host
Change-Id: I2a45a4149f593a129b4dd123df730405169404f9
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Signed-off-by: Jack Pham <jackp@codeaurora.org>
When clients of the lazy APIs enable IO coherency they will
skip their cache maintenance code.
However before passing a coherent buffer to the device for
DMA a barrier call must still be made to ensure the caches
are up to date.
Add this barrier call to the lazy map function when
IO coherency is enabled.
Change-Id: I3fc065f8aeff705283211e59bd641d81b4e74067
Signed-off-by: Liam Mark <lmark@codeaurora.org>
Cacheable mappings should be inner- and outer-shareable, but
currently we're only making them inner-shareable. Make them
outer-shareable as well.
Change-Id: I50e0ee3654d5d13dcbfdbb31d2df4d56b79a2b78
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The DOMAIN_ATTR_COHERENT_HTW_DISABLE IOMMU domain attribute is no longer
used. Rip it out.
Change-Id: Icc8b81e3020276a1a2c0ed7798eb36568cb866db
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The DOMAIN_ATTR_COHERENT_HTW_DISABLE IOMMU domain attribute is
currently not being respected in any way. SMMU coherency will be
configured through the SMMU device tree nodes moving forward.
Remove support for the obsolete option.
Change-Id: I3d3a939da588334b25951512b499fa14a9f08469
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The DOMAIN_ATTR_COHERENT_HTW_DISABLE IOMMU domain attribute is being
removed. SMMU coherency will be configured through the SMMU device tree
nodes moving forward. Remove the obsolete option.
Change-Id: I1ec7126144c41fa4215405e632d1d7b61de057bc
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The DOMAIN_ATTR_COHERENT_HTW_DISABLE IOMMU domain attribute is being
removed. SMMU coherency will be configured through the SMMU device tree
nodes moving forward. Remove the obsolete option.
Change-Id: I8bf9b5115db0394620fa96f4bdaf0faec4528709
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The DOMAIN_ATTR_COHERENT_HTW_DISABLE IOMMU domain attribute is being
removed. SMMU coherency will be configured through the SMMU device tree
nodes moving forward. Remove the obsolete option.
Change-Id: I4bbbfb90fe172e048cc9504c4e6be5f36501b485
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
