Setting the GPU to 64bit when rest of world is in 32bit can
make the GPU misbehave. Hence, check the kernel configuration
before actually moving the GPU to 64bit mode.
Change-Id: Ie4cf6c2d4fdfa978287c86812bdce4bf8c56ef5f
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
PMIC gpio used for the 3.3v power supply to wlan has been
converted to rome_vreg fixed regulator. This Fixed regulator
shared by both WLAN and BT. Remove PMIC gpio enable dead code
from CNSS SDIO platform driver.
CRs-Fixed: 945575
Change-Id: Ifbb17e05969da25ec9a87844b4409e26f07fca69
Signed-off-by: Sarada Prasanna Garnayak <sgarna@codeaurora.org>
USB OTG mode depends on USB ID detection performed by the PMIC driver.
APQ8096 DragonBoard SOMs use either a PMI8994 or a PMI8996 component.
In PMI8994, USB ID detection is based on an interrupt handled by the
qpnp-smbcharger driver, so the pmi8994_charger device tree node
must be enabled.
In PMI8996, pmi8994_fg device needs to be enabled as well, as the charger
USB ID detection is not connected to any interrupt, but handled by the
qpnp-fg driver.
Additionally, remove USB PHY initialization which causes USB PHY PLL
lock failure.
Change-Id: I8d7bc23e7c730174fb8f9f6c52dc4f5e02a0ec6e
Signed-off-by: Liron Kuch <lkuch@codeaurora.org>
In Voice call, Incall recording in downlink path isn't working.
This is due to dpcm capture flag isn't set for "Incall Record
Downlink" backend DAI link. Update this flag to fix this issue
and also, update the naming convention of Incall recording DAI
links to avoid confusion.
CRs-Fixed: 943349
Change-Id: I788b8718699c3d0ec4de257a57e01f6438bb04a9
Signed-off-by: Venkata Narendra Kumar Gutta <vgutta@codeaurora.org>
Deep nap removes the quality of service latency vote. Restore device
before powering back the GPU while coming out of deep nap.
Change-Id: I9366ffa6f5f2768cb3ea10f9117678ba8cf8d190
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
Signed-off-by: Divya Ponnusamy <pdivya@codeaurora.org>
The buffer used for look-ahead-buffering is allocated during IOCTL from
userspace. It is possible that userspace can invoke this IOCTL multiple
times without invoking the IOCTL to de-allocate the buffer. This results
in out of memory issue for buffer allocation during stress testing. Fix
this issue by avoiding multiple buffer allocations.
CRs-fixed: 942452
Change-Id: Id9eb99dc2c8527fbbe1fe79fca1cdcea232c33da
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
Enabled QPIC display support by stubbing out MDP specific
functions. Fixed compile errors by removing obsolete
include files.
Change-Id: Ibd0159bd530dcef69848a93ad2dd302d58dbc447
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Add spi-msm-codec-slave device as a subnode of spi_0.
Change-Id: I0cafb8ffb684ce78a9dedcdba6e9ecae49e434f2
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
Clear TX HOLD when ANC is enabled and decimator
10 to 13 are selected.
Change-Id: I18c1ddeacc59c1ae7d88daf371c84140c0459693
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Update register sequence for low hifi and low power modes
for headphones on wcd9335 codec to achieve better performance.
Change-Id: Icf543df7c4e8ab4cc9222a39bf1df4e6af4ab8ec
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Check if a ZLT descriptor is the last pending descriptor in
the desc FIFO when determine if the desc FIFO of that pipe is
empty.
Change-Id: Ib8174953d6ad7d886f47f21e243e985b79ef41fb
Signed-off-by: Yan He <yanhe@codeaurora.org>
Add ftraces to dsi panel on and panel off to get better profiling
data during suspend and resume cases. This delay would be varying
depending upon the panel and so the data would be helpful in
isolating panel related delays.
Change-Id: I16ca90ee7968a57b4f56462b0a00a31a145524b5
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
If an error occurs allocating memory for zram we will not be able to
fullfill the request to store the page in zram. The swap subsystem still
continues to try to swap out pages to zram even when this error occurs
since there is currently no facility to stop the swap subsystem from
swapping out during such errors. This can cause the system to be
overflowed with logging errors.
Reduce the amount of logging to prevent the kernel log from being filled
with these error messages
Change-Id: I54b920337749ece59d9ca78fa8b29345ec7b976b
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Non-secure pipe should not be staged on MDSS when
secure display session is in progress. Client has
to unstage all pipes to disable the secure session
before pushing non-secure layers on MDP. This change
updates the validation checks to avoid such conditions.
Change-Id: I626c6c3a5ef313b1af8369884a9b10d8586f7251
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
In order for the host to receive Synopsys MSIs from its endpoint,
the MSIs need to me masked in the PCIe global interrupt mask
register. Therefore, mask all Synopsys MSIs in PCIe bus driver.
Change-Id: I3afbe233e3298e98a27e7df59f325cf9969a0ee5
Signed-off-by: Tony Truong <truong@codeaurora.org>
In the current composition cycle, if the staging params are
not changed, then currently MDP flush register is not configured.
But due to any unforeseen reason if MDP fence timeout happens then
to handle it gracefully we stage border fill. In this regard as
the mixer config has now changed, then ctl flush has to be set.
Change-Id: I24b9cb28426f8829ac3bb36bfa32859b588d06fd
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
All Transports debug logs are captured in one logging context
which makes the debugging difficult and has a chance to miss
the important logs due to other high traffic transports like RPM.
Create separate logging context for each transports for better
debugging.
Change-Id: If2d00966a186dc48badc8a9a2e017eec6895dcad
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
rome_vreg_dsrc regulator is a fixed regulator and this regulator
is control by PMIC gpio4. This is being used as vdd supply for
the wlan DSRC module based on sdio interface. Enable rome_vreg_dsrc
voltage regulators to enable the power up support in CNSS SDIO
platform driver.
Change-Id: I7c6032b706d468cc57b5304a3627f526935fb3a3
Signed-off-by: Govind Singh <govinds@codeaurora.org>
wlan_vreg is not freed in cnss_sdio_release_resource, free
wlan_vreg in cnss_sdio_release_resource.
Change-Id: I0b82a4eaf532eb0131d192f9a59184e4ea587cc8
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Max threshold Bandwidth selection logic should be independent of
number of entries in max bandwidth limit DT property. Correct the
logic to make it independent.
Change-Id: I6510ad7095560b25bbada7c63c44ae88a6d955f1
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Currently per pipe bandwidth limit implementation takes
care of only HFLip and VFLip case. Make it generic such
that it takes care of Camera usecase as well.
Change-Id: I6642bdb0611aa973a7563df019bf2dcdd5e4e584
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
'us' can overflow and can potentially cause unexpected wakeup.
Change it to uint64_t.
Change-Id: I943cbc9d62268ca073e388c287e3b180c0eaa8e3
Signed-off-by: Girish S Ghongdemath <girishsg@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Enable Secure Processor Communication (spcom) driver for msmcobalt.
Change-Id: I1196bc5495b08126adbcbdb7e4d7a65a4a08609b
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
This driver supports communication with secure processor subsystem
over glink transport layer.
The communication is based on using shared memory and interrupts.
This driver exposes interface to both kernel and user space.
Change-Id: Iec5fc78c8370002643b549e43015c06b09d8ab8b
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
It is possible that 'root' variable is used uninitialized. This
change avoids usage of uninitialized usage of the variable.
Change-Id: I9a3bd941a23736cb003f209cf6dde84fd859e9e6
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
It is possible that the 'tail' variable is used without initialization.
This change fixes uninitialized variable usage.
Change-Id: Idbd7d52797af2eeffcece19249055d5099a7fdb1
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
It is possible that the 'in' variable is used without
initialization. This change fixes uninitialized variable usage.
Change-Id: If26733110b29ec1c1150f1da50efa0c1ac6c2796
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
The DRAM size used for codec WCD9335 is incorrect, this is causing the
dumps to be wrong. Update the DRAM size for WCD9335 as per the memory
map.
CRs-fixed: 929517
Change-Id: Ie4815b4cedf429b0d7045b84381d945bde62d5ce
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
Since the underlying codec can have different memory map, it is possible
the starting offset and size for DRAM can be different as well. This
causes the collected dumps to be incorrect on some platforms. Fix the
ramdump collection to obtain DRAM offset and size from CPE services
which is aware of the codec being used.
CRs-fixed: 929517
Change-Id: I6a592d8f97da117d1e58154460cd0b8f3cbf62c7
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
During irq_disable, mdp_lock is held and intr status is checked and
cleared if any. If a new irq is triggered from another CPU at the
same point, it would ideally be waiting on mdp_lock held by the other
CPU. And when the mdp_lock is released after clearing the irq, mdp_isr
is executed and at this point, clks might have been disabled. To avoid
it, protect the clk_ena variable with mdp_lock and also check for the
clk_ena status and skip irq handling when it is disabled.
Change-Id: Ic71d2b6f877ca3510a0d0fa593a8a0c17e93d8f3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
According to the latest hardware guidelines, only L2 and L3 cache
HMSS ACC settings need to be programmed based upon the level of
their voltage supplies. Update the apc0_pwrcl and apc1_perfcl mem_acc
regulator devices to adhere to this requirement.
Change-Id: I94032f6fbe5920a8d446c58c763afa29705e527a
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
On few recent targets APSS L2 memory is moved to APC domain which were
earlier on Mx domain. This can cause inrush current while bringing up
huge memories like modem and adsp.
To mitigate inrush current, bring up comparatively lesser memory in
size(for eg MDP memory) before bringing up huge memories like modem or
adsp. This way MDP memory introduce an intermediate load on MX rail.
During boot, gdsc driver will set MEM and PERIPHERAL bits. This driver
makes sure that dependent subsystems are powered up. Once done, call
gdsc_allow_clear_retention() API to allow retention of MDP memories.
Change-Id: I54011eb1b6cc38b2c33a67b8b9cc5eaadbd42c6a
Signed-off-by: Arun KS <arunks@codeaurora.org>
Soundwire hardware has two banks for configuring soundwire
slave ports. After playback is stopped, disable soundwire slave
ports in both banks to avoid any port collisions during the start
of next playback on other slave device.
Change-Id: I5cfd1d985a1ca5fd7b4020d7e14697642f207501
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
In case of independent dual DSI configuration, the GLBL_TEST_CTRL
register for both the DSI PHY should be set to 1. This change adds
proper check to handle this case.
Change-Id: I6c16c1a359541ea0d3c5430a331f47b55e4bd8cc
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Add all cpu notifiers in CONSOLE_FLUSH_ON_HOTPLUG config
flag to avoid hotplug latencies and by default config
CONSOLE_FLUSH_ON_HOTPLUG flag is disabled.
Change-Id: I389f207d8faf84cfd4267d52213e40a47a43774d
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Current code does not reflect the correct panel information
when user space request the panel info and fps data
after the fps update when using the clock method.
This change fixes the code, so further calls to get
the screen info have the correct panel data, as it
is done for vfp method already.
Change-Id: I2cae33cad02f43a9b887c8bdc55aca876e47a99a
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Set the GPIO based on the flag parsed from DTSI. To enable the
switch gpio set the flag and to disable set inverse of the flag.
Change-Id: Iddbe654f2cc6c7e2c5815798099f88d2154d76d5
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
On smart panels, Early Clock Gating (ECG), is initiated when current
frame transfer is finished and no new frame update is queued. To track
these two different states, driver maintains the state machine
for HW transfer and SW's new frame update. Currently SW state machine is
cleared only after HW transfer has started. Now in normal scenarios SW
state should be cleared before HW is finished and if there is no new
frame update queued then ECG will be initiated. However due to CPU
scheduling, thread that needs to clear SW state got preempted. In the
meantime HW finished the transfer and updated its state machine in the
interrupt context. Since at this moment SW state wasn't cleared, ECG
was not initiated. Avoid this situation by clearing SW state before HW
transfer is started.
CRs-fixed: 941832
Change-Id: I44828c6077eb8729162127b521f4fd4add2e3bcb
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
This change enables clock update method as default for sharp
WQXGA panel for changing refresh rate of panel.
Change-Id: I08f1a4ee446318174824dbd26dcf9682dbabddc9
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
It is possible to change the refresh rate of the panel by
changing the byte clock and pixel clock to the required panel supported
frequency. This change adds support to program dynamic refresh
registers and trigger the dynamic refresh interrupt. Once the current
frame is done, hardware ensures that the change in clock frequency is
taken effect within the vertical blanking period.
Change-Id: I3a1e0eb478c34111e94f977088c20e9a50c4ef25
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Populate the AFE topology for the RTAC
voice and device structures which allows
retrival of AFE topologies for RTAC
clients.
Change-Id: Ib47e6b04cdfe7146315a800a3f54f9932d54cadc
Signed-off-by: Ben Romberger <bromberg@codeaurora.org>
vsync_handler added in lp2 (doze_suspend) power
state enables the vsync on hardware. That can lead
to unclocked register access because device can go
in pm_suspend in this power state. This change blocks
the vsync_handler processing in lp2 power state.
Change-Id: I4386baa6bc2f8303928edade79108b4983f66f42
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Expose the bandwidth limits and status of bandwidth
limit request to the userspace through sysfs entries.
Change-Id: I697138546689e8d9943c3e5ff47ae6a924b8ddfb
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
WCD9335 can transport data to and from device through I2S and I2C.
Update the change to support I2S/I2C interface.
Change-Id: Ifdec293510adf685410a4fb6ef6a3e939c4ee04b
Signed-off-by: Deven Patel <cdevenp@codeaurora.org>
