This adds WA to handle few CQE error which
can cause HALT to fail or can give CQTERRI info
as NULL.
Like - currently there is a HW bug that in
case of ADMA error CQE will not stop and CQTERRI
register will not be updated with any valid values.
Halt will also most likely fail in case of ADMA error.
Thus possible WA for this is to disable CQE,
do reset_all and requeue all the requests in flight.
Change-Id: I5aaddbb7bec1de7dbc959144dc2f1a5ad16789ff
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Add a check in mmc_cmdq_ready_wait to not pull any
requests in case if CQE is disabled and card is not suspended.
This means that CQE must be in error state and so mmc_cmdq_thread
should stop issuing requests.
Change-Id: I0c5e6556d3d881f1a675db4fff4f995de024ddf8
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
There could be a case where after platform device (sdhci_msm)
suspend, (where external gpio to IRQ is configured for wakeup
in case of sdio) external gpioIRQ is raised before
system suspend is completed.
To solve this problem we use a flag to signal
sdhci_msm_suspend_noirq to abort suspend with -EBUSY signal.
Change-Id: I82617d5a02674af24d330601e41fb3c20278f672
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This patch adds following helper API/info -
1. cmdq_halt_poll to halt the controller using polling
method. This is to be mainly used in case of an error
from cmdq_irq context.
2. Adds num_cq_slots & dcmd_cq_slot info to
mmc_host structure. This can be useful info
for mmc host structure like in case of handling
of multiple error requests
3. Adds CMDQ_STATE_CQ_DISABLE for cmdq host.
In case of an error if halt also fails, CQE error handling
code will disable CQ. So block layer needs to know
- to not pull any requests in such case.
Change-Id: I8e9a8d5094db82336917fcca4361ce84316c34ef
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
cmdq_irq should be handled before clearning error interrupt.
Because in case of an error CQE needs to be halted/disabled
in cmdq_irq, before we clear the error interrupt.
Otherwise, CQE might start processing other requests whose
doorbell is set, even in case of error in previous completed
request.
Change-Id: I8c77ca08dcf440293844120c1b59d2dada84bac5
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This change reverts the following gerrits as they cause the
timeout issues with Hynix cards. Also, the latest code supports
sleep/awake through CMD5 and hence MMC_PM_KEEP_POWER need not be
set for Hynix eMMC cards.
edcf5be "mmc: host: add detect vops chain"
09287cb "mmc: sdhci-msm: configure MMC_PM_KEEP_POWER for SDIO"
7cf603a "mmc: schci: add support for MMC_PM_KEEP_POWER in eMMC"
c085820 "mmc: core: set MMC_PM_KEEP_POWER for certain Hynix mmc cards"
CRs-Fixed: 947299
Change-Id: If863771191ee7c2b717d5817f4a88e4ad936653a
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Configure the controller to send the QSR at 1 clock period.
This would send SQS(CMD13) when no data transfer is in
progress. This decrease in the polling period increases the
performance of the device.
CRs-fixed: 891366
Change-Id: Ic2807c6334a778b5f0c89fb605c6923a44f7624a
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
When mmc request timeout occurs (eg. card is not responding), it is
possible that devfreq update poll interval ended and devfreq update
started. Update context takes devfreq lock and block on
__mmc_claim_host(). Error handling flow (same context that executes mmc
request) tries to suspend clock scaling, the flow is trying to take devfreq
lock while holding (and not releasing) mmc host. Although it is
incrementing devfreq_abort counter, but it is not enough to cause devfreq
update context to release devfreq lock, because the context scheduled out
from execution.
This patch wakes up devfreq update context, it causes to break polling loop
waiting for mmc host exclusive access (because devfreq_abourt countr > 0),
so devfreq lock will be released and clock scaling may be successfully
suspended.
Change-Id: I3d1e7b38d7d281594b49d8452198ed4c1e550b73
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
When in SVS2 on low load scenario and there are lots of requests
queued for CMDQ we need to wait till the queue is empty to scale
back up to Nominal even if there is a sudden increase in load.
This impacts performance where lots of IO get executed in SVS2
frequency since the queue is full. As SVS2 is a low load use case
we can serialize the requests and not queue them in parallel
without impacting other use cases. This makes sure the queue gets
empty faster and we will be able to scale up to Nominal frequency
when needed.
Change-Id: Idbe7e939e01327061dfa5de93c0eaed59b910592
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
When we do blk_end_request, request pointer may get freed.
Therefore cache request_queue pointer and tag value at start itself
instead of dereferencing already freed request_queue pointer.
Change-Id: I35def3ef6a260ebe78e92874ac121aca529f00cf
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
After reading ext_csd, the host is not claimed while
doing unhalt if the card is in CQ mode. This may race
with RPMB context which tries to halt and disable CQ
in the card. This may unhalt the controller while RPMB
is still going on, resulting in software request timeout
for RPMB commands that are supposed to be sent in
legacy mode with controller in halt state.
Fix this by claiming the host till the unhalt is done
in mmc_ext_csd_open() so as to prevent race with RPMB
context.
CRs-Fixed: 935719
Change-Id: I6d2738b21c3cd44c8fb6c99f63291059d5b18ee1
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
If an RPMB request is the last request to be done before shutdown,
then the card will be already switched to legacy mode as part of
RPMB request handling. Later, in the shutdown handler, we get this
error if we try to switch to legacy mode again.
mmc0: failed to switch card to legacy mode: -74
CRs-Fixed: 935717
Change-Id: Ie75ba225412d0fecce9c98f07334b570a6cd5772
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
The lower bus speed mode to be used during clock scaling may
vary based on the target. Hence, add a new dtsi property to
define this bus speed mode.
Change-Id: If8e2d125b8246ca479f816a475940bb357138297
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Add support for DDR52 bus-speed mode during clock scaling.
The reason for this change is DDR52 can be supported at SVS
mode.
Change-Id: I68e5fca57ae5cbc154f5dd7001df368900cb3f57
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
By delaying the QoS vote removal, there is some improvement
in performance in single threaded use cases.
Change-Id: I80545486057c55c697b72b56d57e2ea47cff86b9
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
* Removed spinlock as it was not locking against anything
* Removed conversion of interrupt status to error number
as it is not used by API client, and in case several bits are
set only 1 error is ever handled and the rest get lost.
Instead pass to the client the complete status.
* Removed redundant includes, variables
* vops structure is returned after performing a lookup in the DTS.
There's no need for that as we already know the structure
to return.
* Other minor corrections
Change-Id: I6d2549ce04c9e4b19fdd8fe3dfee03d83bfd9d77
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts, dropped ICE & UFS
driver changes as they are already present]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This adds external GPIO wakeup support to sdhci-msm driver
for sdio cards.
Change-Id: Ic3e280b975d293ea8adadadafecfa8115fe5f428
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This removes disabling of clock-gating for qca6574
& qca9377. Now since async card interrupt support for
sdio card has been added(3c5351c0643a), re-enable
clk-gating support for sdio cards.
Change-Id: Ib497556f10c9c6576a3e0a3592f6755c8725370c
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
SD host controller have asynchronous interrupt support
capability to detect card(sdio) interrupt
even when clocks are gated(to save power).
This patch add support and enable this capability/feature to
of SD host controllers for sdio cards.
Change-Id: Ic1945355a19ebfdb3bd000bf8138d8001cea53f6
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts & compilatione error]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This removes direct enabling of MMC_CAP2_ASYNC_SDIO_IRQ_4BIT_MODE
capability from sdhci-msm driver.
This capablity needs to be enabled based on reading HOST_CAPABILITIES
register.
Change-Id: I74c2877d5906ee9e2180fdb8d50167af6d03b3af
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This change adds support for new drive strength.
Before this change sdhci-msm supported only 3 types of drive
strength, starting from eMMC version 5.0 there is additional
drive strength.
Change-Id: Ib0bf945560107ec732e7ffeb7653d271d8d91c2f
Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
[subhashj@codeaurora.org: fixed minor merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Add mmc_get_card() to make sure host is resumed before sending pon
command. Also, add mmc_put_card() after completing pon command so
that it can release the host and also vote for runtime suspend.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Change-Id: I52f4d854388a608c6a09e55a693e3b36bd801fd8
Commit 66a7393a3ba9685d1eddfbce72e3ef8f4848f19f ("mmc: block: ensure CMDQ
is empty before queuing cache flush") added a workaround for particular
vendor's eMMC devices. Workaround was to wait for all the outstanding
requests to finish up before queuing the flush request. Now detailed
root cause analysis from vendor shows that original issue can happen only
if DCMD command is sent to device too quickly (within less than 6
microseconds) after completion of previous small sector (less than 8
sectors) read operations. Hence with this change, we are fine tuning the
previous workaround such that it would almost have no impact on the storage
benchmark performance numbers.
Change-Id: I1df1c5d7bbcd7b526236651077b7dade2626cb30
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
eMMC runtime suspend first puts the CMDQ to halt and then sets the card
state to suspended after sending out sleep command. If new requests get
queued after halting the CMDQ but before the card state has changed to
suspended then command queue thread will not be woken up again until
some new requests are queued to request queue. And if new request gets
queued, we will remain in this state forever. Fix this issue by kicking
the CMDQ thread after the suspend completion.
Change-Id: I37a03d9a75acf2ab3ebda57da87e246b449abf18
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
eMMC CMDQ is pretty latest feature and we may continue to see issues
due to HW & SW immaturity. To debug these issues, we should have the
host controller register dumps along with current SW state from rampdumps.
This change adds the BUG_ON to crash the system in case of eMMC related
command timeouts.
Change-Id: Ib832aef6eb9ef3941fbe9e73852929c835e97847
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Some devices might stop responding to new commands if device cache flush
is queued to host controller while host controller is still processing
outstanding requests.
To workaround this issue, we are making the cmdq thread to wait for all
the oustanding requests to be finished before queuing cache flush command
on host controller.
Change-Id: I15387734f51ca4cadfc9e11270f14d8a0806a00f
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
The current code has some compilation errors when compiling for
single core configurations. This fixes those errors.
Change-Id: Idd1d1bab343cf5cf1e35f229d913d16a7854f358
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Disable power management features for SDIO as the current code is
not ready to enable it.
Change-Id: I234ebf6cc46d2a3b70bf9ba3f94b4b1abc1acd44
Signed-off-by: Pavan Anamula <pavana@codeaurora.org>
There could be 2 different race conditions possible with current shutdown
handler:
1. Shutdown handler sees that there is no request in queue but mmc-cmdqd
might have fetched the request from queue and about to issue it to
driver.
2. Shutdown handler keeps looping in the while(1) loop as it sees request
being pending in the request queue. But mmc-cmdqd thread doesn't wake up
to fetch the requests from the request queue. mmc-cmdqd thread isn't
waking up because shutdown path has stopped queue and request came into
the queue after that. Once queue is stopped, block layer won't invoke
the queue's ->request_fn() callback to notify driver about pending
request.
Remedy to fix both these race condition is simple. In shutdown handler,
make sure that we drain (& complete) all the outstanding requests from the
queue and then don't allow any new requests to be queued. Block layer API
blk_cleanup_queue() precisely does what we want and this change basically
use the same API in shutdown handler.
Change-Id: I761ba6a2e2974d955bb72ff993b1cc2c32c9ec29
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Some host controllers may need additional TLMM registers to be
configured to enable the IO lines connected to it.
Change-Id: Ic334ce653bf13fef5969f08e19f6202377b8fd2e
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
ICE init & reset can be synchronous now because ICE does not need
to go to secure side for any ICE configuration. This would simplify
interface and make call more efficient.
Change-Id: I7aa4e2d3ba3383d25758b21b8ae261a0220f35f9
Signed-off-by: Dinesh K Garg <dineshg@codeaurora.org>
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts, dropped changes
to ICE and UFS driver as they are already present]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
As SDIO spec doesn't allow advertisement of 1.8v support, some SDIO
devices advertise support of only 3.0v even though they support 1.8v
as well.
sdhc3 host controller only supports 1.8v and rejects the initialization
of SDIO devices that advertise 3.0v support.
This change adds fake support for 3.0v to sdhc host controller.
This will allow initialization of SDIO devices that supports 1.8v but
advertise 3.0v support.
Change-Id: I5a98c54ad4998e6439f83081628c9c083e95bbf0
Signed-off-by: Pavan Anamula <pavana@codeaurora.org>
In addition to dumping all the SDCC vendor specific registers,
also dump the ICE registers that helps in debugging crypto
related errors.
Change-Id: I804b0cfd77dec21d45016aafbbb001dafb050241
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Clock gating logic maintains the reference count which gets incremented
with *hold* API call and get decremented with *release* API call.
If we want to make sure that clocks are enabled during some operation,
we should call *hold* API before the operation and then call *release*
API after the operation is finished. So *hold* and *release* should be
in pair and called exactly once per operation, any violation of these
rules may put the reference count out of sync and can cause issues
(like unclocked register access). This change fixes the places where
this can go out of sync.
Change-Id: I2d784cc31027a551a466beec63ee8cd0a1f67af7
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Keep track of task history for the last 32 tasks and dump it
along with registers in case of any error for debugging.
The log is of the following format:
[index] <DATA|DCMD> Task: <lower 32bits> | Args: <upper 32bits>
of the task descriptor structure. The values need to be decoded
accordingly depending on the data or dcmd task descriptor.
The last entry index denotes the latest entry in this list.
---- Circular Task History ----
cmdq-host: Last entry index: 1
cmdq-host: [00]DATA Task: 0x0400002f | Args: 0x00d37d18
cmdq-host: [01]DATA Task: 0x0400002f | Args: 0x00d38118
cmdq-host: [02]DCMD Task: 0x0186402f | Args: 0x03200101
Add a debugfs entry to enable/disable this dynamically. It is
disabled by default. This applies only to eMMC devices.
Usage: echo Y > /sys/kernel/debug/mmcX/cmdq_task_history
X - denotes the slot id
Change-Id: I6abf29aa928d3d8270405cfc104241043dadfe45
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed compilation error]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
If the last access to eMMC before runtime/system suspend is an
RPMB access, the partition type within EXT_CSD[179] will be set
to RPMB. As per specification, the deselect CMD7 and sleep CMD5
are ignored by the card and are treated as illegal commands in
this state. This causes eMMC sleep command to timeout and thus
fails runtime/system suspend. Hence, switch to default partition
config before sending deselect CMD7 and sleep CMD5.
CRs-fixed: 630894
Change-Id: I40f3fb590aeba787de8ca3356a8eed5f2780bcc1
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Fix the timeout issue with mmc_cmdq_halt() that happens in the
below scenario -
1. Let us say an RPMB request is processed just before the
runtime suspend. The RPMB request will put the controller in HALT
state and will put the card in legacy mode.
2. So during runtime suspend, the SW will check for card's state and
since it is in legacy mode, it won't call CQ disable host->op.
But CQ HW will get reset due to SW reset that gets issued during suspend.
3. If we get another RPMB request, we try to do the runtime resume.
But since SW did not invoke CQ disable host->op, it thinks that CQ is still
enabled and returns here without enabling CQ.
4. Now the RPMB request tries to put the controller in HALT state but
timesout since CQ is still not enabled.
Fix this issue by checking for host->card->cmdq_init to determine
if the controller is initialized in CQ mode instead of checking for
card's state in runtime suspend. This will ensure CQ will be disabled
as part of runtime suspend and will be enabled again during
runtime resume.
Change-Id: I26bf97962d31522a9cb25009c6a048dfff6e4535
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
During RPMB operation, command queue mode would be disabled and we don't
exlicitly move back to command queue once the RPMB operation is completed.
We expect the command queue thread to switch operating mode (or partition)
to command queue before issuing the new transfers in command queue but
command queue thread isn't getting scheduled if we don't wake it up
explicitly or if some other new transfer get submitted to the queue.
Fix this issue by explicitly waking up the command queue thread after the
completion of RPMB operation.
Change-Id: I68b2f7989d68b51b4810346458e1966d45aee5a2
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Currently we are not releasing the runtime PM reference count after
halt/unhalt completion which basically keeps the runtime PM state to
active forever. Fix this by releasing the PM reference count on
completion of halt/unhalt operation.
Change-Id: I28a37917b49acde7f5d75bf9a639d0eb67a1c169
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Currently we are printing the cmdq debug ram contents during the
error handling but this code path shouldn't be executed for non cmdq
hosts.
Change-Id: Ic397e4378c290b604037e69b7df58200810e981c
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Currently we are crashing the system if PM QoS request counter goes
negative but this doesn't seem to be right way to handle. We should
instead skip decrementing this counter once it reaches 0 and just
print a dump stack to know the callstack. This change fixes this
as mentioned above.
Change-Id: I36fb03b1ddf8e04ecc9fe449496b656db84e77d2
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Currently we might end up calling ->post_req() 2 times if we failed to
submit the request to host driver. This change fixes this issue.
Change-Id: I10b681ab955e0a9126b22df68d3601b75328c949
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Currently all functions which calls cmdq_halt relies upon HALT
to pass other wise considers it as a FATAL error (like clk scaling).
So add retry mechanism in halt - retry if halt completion
timesout & HALT also did not complete(by doing register read).
Change-Id: I59e199681e46085f804636f4c07249e6f21de1d5
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
CQ irq handler first calls completion path for every notified tag and then
clears CQTCN register for all completed tags. This approach could cause
following problem:
1) issue context (unblocked by tag completion) issues next
request, CQE successfully completes it and notifies task completion
through CQTCN again for the same tag.
2) CQ irq handler proceeds to clear CQTCN for the original request.
In the above scenario clear of CQTCN register will mask next
request completion and issue context will be never unblocked.
Hence clear CQTCN first and then notify the request completion.
Change-Id: Ie644e24279ca30de42bbc9f8e1ae4326609d38a5
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Enable partial init on eMMC devices for using card Sleep/Awake
sequence (CMD5).
Card will be sent to Sleep state during runtime/system suspend
and will be woken up during runtime/system resume.
By using this sequence the card doesn't need full initialization
which gives time reduction in system/runtime resume path.
Change-Id: Ide2b8050b56e858cda7bb22b4acf43b5bd3db786
Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
Signed-off-by: Maya Erez <merez@codeaurora.org>
We make sure that the doorbell bit for any regular slot is not
set before ringing the doorbell for that slot, make sure of the
same for DCMD slot too.
Change-Id: Ia96e8d6ae0c28aad21f4a3cf46b27c7a5c878971
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Keep a reference to the sdhc host instance to retrieve all the
necessary data structures in case of a crash for debugging.
Change-Id: Ic8d696d53cf48290dbcc92f1567650989dd45755
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
