Policy engine needs to provide the plug orientation upon
type-c cable plug in. qmp phy driver needs to program phy
lane based upon this information.
Change-Id: Idd236136c9f0a9163b4ae7a8405c412f1d69ca9e
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
In order to support super speed mode using type-c cable, phy
driver needs to programe the phy with appropriate lane based
upon plug orientation.
Change-Id: I893c0b729015cd22791d168453309168246961e2
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Register callbacks for plug orientations in order to
cache the current plug orientation reported by extcon.
This allows super speed phy driver to configure the
appropriate lane upon phy initialization.
Change-Id: I906005680b4cc90cc38dc3d403beebf7aa515ad7
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Type-C factory mode is unreliable and causes the Type-C mode to be
incorrectly detected in some cases. Disable it.
CRs-Fixed: 1019313
Change-Id: I5f66be80899c33816c886df526db9e50d7e9aff9
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
The change extend the support in video driver
to enable few SEI extradata. Also update the
extradata menu V4L2 control with all the
available list of extradata.
CRs-Fixed: 1007521
Change-Id: I6d060afb48aca34c2bb54221c5babc0ac55aff7c
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
As part of of IPA driver refactoring a separation has been made
between IPA core driver and the IPA clients.
MHI specific code in ipa_mhi.c has been transferred to a new file
called ipa_mhi_client.c.
IPA clients drivers are the interface between IPA core driver
and external drivers. Specifically, ipa_mhi driver is the
interface between the MHI driver and IPA core.
CRs-fixed: 989505
Change-Id: Iebcde6d233ff8580aa83b1885f1e8a01644dd1f4
Signed-off-by: Amir Levy <alevy@codeaurora.org>
Defer wb driver probe until mdss probe is completed, this is
required for supporting bin parts where multimedia hw is not
functional.
CRs-Fixed: 993024
Change-Id: Ic21c25a33a8b2430903e9c1f3d339022551d81d6
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Create sysfs entry to have option to disable software clockgating
NAP state.
CRs-Fixed: 973565
Change-Id: I2376f10161040dbf426887ce146ac597f401153f
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
User can pass arguments as part of write to requests and endpoint number
will be calculated based on the arguments. There is a chance that driver
can access ep structue that is not allocated due to invalid arguments
passed by user. Hence fix the issue by having check and return error in
case of invalid arguments.
Change-Id: I060ea878b55ce0f9983b91c50e58718c8a2c2fa1
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Remove unused APIs icnss_register_ce_irq &
icnss_unregister_ce_irq. These APIs are divided into multiple APIs
to provide flexibility to WLAN driver.
Change-Id: Icd56b61a372cb18e6600617184d8b185b78ce99d
Signed-off-by: Prashanth Bhatta <bhattap@codeaurora.org>
Provide a hw guarantee that a userspace watchdog process receives cpu time.
Move ping_other_cpus() prior to waiting for the userspace signal in order
to minimize the effect of a late userspace pet on the safety margin. The
safety margin is the difference between the workqueue's timer interval and
the bite interval.
Change-Id: I715cf7ad7975c6e020458f623262dc02927795a7
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
GPIO 58 is connected to CTI2's trigout 4. Add node to configure this gpio
when trigout 4 of CTI2 is mapped on msmcobalt.
Change-Id: I064c208557bc7b74bcb342fea76df9c9e10c8405
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add qcedev and qcrypto driver support for msmcobalt.
This enables crypto engine to be used from hlos side.
Change-Id: I5d2861bdb934ac0224fa73b59b350d0d360f5c95
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
Add necessary GPIO and regulator bindings for nt35597 DSC (command
and video mode) panels on msmcobalt CDP. Add these panels to the
list of supported panels so that they can be selected at runtime
from kernel command line.
CRs-Fixed: 1019289
Change-Id: Ie3a2da3c306bc8a85aaf1495afb365c38cf805aa
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add gpio, regulator and other required settings for nt35597 dual-dsi
command mode panel for msmcobalt CDP. Add this panel to the list of
supported panels for msmcobalt to allow selecting this panel at runtime
using kernel command line.
CRs-Fixed: 1019289
Change-Id: If5e6a6b0d7753e3fc83ed6df5d866a62eb5cd60b
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add extra clocks required for ispif node and fix the order of
clocks.
CRs-Fixed: 987962
Change-Id: Id0f46265b10fa06f71a9085aa302536c5f14d295
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
PCIe PHY varies between each chipset. Thus, the port PHY init
sequence on each of these chipsets are also different. Therefore,
add the support to read PCIe port PHY init sequence from devicetree.
Change-Id: I92969b7b59a64018b80470566567887248ced2bd
Signed-off-by: Tony Truong <truong@codeaurora.org>
Enable MSM_JTAGV8 config if CORESIGHT_SOURCE_ETM4X is selected.
This will make sure that ETM registers are properly saved and restored
across CPU power collapse.
Change-Id: Iafc718d5fe3ee392836035c7d301ad2ed6d5f148
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
GSI EPs are assigned to the last 2 IN EPs. While allocating
the TX FIFO sizes we need to iterate over all IN EPs to correctly
allocate larger TX FIFOs for GSI accelerated endpoints.
Update the logic from using min_t(int, dwc->num_in_eps,
cdev->config->num_ineps_used + 1) to just use dwc->num_in_eps.
The EPs that are not enabled will be given the default TX FIFO
size while the ones that are enabled are given TX FIFO sizes
based on the burst size configured for that EP.
Change-Id: Ie9a21544966fb54cf9920e9c719309cc66157846
Signed-off-by: Devdutt Patnaik <dpatnaik@codeaurora.org>
This allows extcon to notify the USB controller driver
to enumerate host/peripheral in high or super speed mode.
Change-Id: I425087a02b680a5a1bc0579fd4d1410eb92d8e4c
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Prepare for future changes which will require waiting on several
conditions prior to petting the watchdog.
Change-Id: I1a62b6ec73e7cd581a535316029956ea7ce23ba0
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
When default dither is configured at boot, the default dither matrix
should be used. In order to use the default dither matrix, the len
parameter should be set to 0.
CRs-Fixed: 1010839
Change-Id: I2ed58d3e61ca4c64cf72569541fc6ee7f6ba651f
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Implement the recommended programming sequence for configuring the DSI
lanes to Ultra-Low Power State (ULPS) for the DSI PHY v3.
Change-Id: I5dc7d8ed4407df5baa94e069b00897086bd02ab8
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Currently the AFE input port is connected to LSM while sending operation
mode parameter to CPE. It is possible that in certain cases, the operation
mode does not need to be sent at all. In such case, the input port still
needs to be connected. Fix this by moving the connection to AFE input port
during LSM_START so everytime LSM is started, it is connected to the
correct AFE port.
CRs-fixed: 1012715
Change-Id: I6dbc344d5d7063c7cfd2fb29c2c39fdee1250bbf
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
Use 7 bits in SOFT_RB_SPARE PON register to store device
restart reasons.
Change-Id: I136c0d3583cef15b3ba22fbf6b8acbe014f9e8ab
CRs-Fixed: 1019225
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
HW breakpoint driver interferes with debug registers save and restore
code and causes loss of HW breakpoints across power collapse.
Disabling this driver to enable debug registers save and restore
functionality across power collapse.
Change-Id: Iff5ba04b2e494f7a5de00e4d05606878ee3d8148
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
The function trace_printk() performs optimization by determining if
there are no format parameters in argument string and calls appropriate
apis to write to ftrace buffer. Add STM logging to support this
optimization in order to allow CoreSight STM tracing for optimized
trace_printk path.
Change-Id: I1a77291e77410c6ed99474335a6d25742c409e47
Signed-off-by: Aparna Das <adas@codeaurora.org>
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Dup ftrace event traffic and writes to trace_marker file from
userspace to STM. Also dup trace printk traffic to STM. This
allows Linux tracing and log data to be correlated with other
data transported over STM.
Change-Id: I4fcb42f2e97ab963fdc85853f4f3ea1f208bfc3c
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
[spjoshi@codeaurora.org: 3.18 code fixup]
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
[mittals@codeaurora.org: 4.4 code fixup]
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Since the cpuidle driver considers the mode selected by qcom governor
for trace events now, remove duplicate traces that report the same
information.
CRs-fixed: 991557
Change-Id: I2a470fb906bb9747f0e1b2c08a231edecc184036
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
VCO configuration should be based on the requested vco
clock rate and should not factor in the bit clock source
divider. In addition, the bit clock source divider for
the slave controller should always be set to 1. This will
ensure that the PLL is locked at the correct rate.
CRs-Fixed: 1019289
Change-Id: Ie5c171e13dcccc711ba03acb38fcd7876e792cee
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add audio, modem and rpm etm devices for msmcobalt. These devices can be
used to configure traces on remote processors.
Change-Id: Idf381b86cd44679ea1f8b6fbfe85b2616232f533
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
This snapshot is taken as of msm-3.18 commit:
89be600 (Merge "msm: camera: Fix KW issues in sensor code")
Jtagv8 driver can be used to save and restore debug and ETM registers
across power collapse.
Change-Id: I1537c92ac86964fdbe9abb012f972d5f3b36047a
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add CSR device for msmcobalt target. CSR device can be used to configure
Coresight slave registers.
Change-Id: I4da057a32b57af6431ead37522f877b114188699
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Currently, glitch removal is enabled by default when the PWM
channel is configured. However, that adds delay to the PWM
output which is undesirable for longer PWM period. Disable the
glitch removal when PWM is configured and enable it after the
PWM is enabled.
CRs-Fixed: 1009283
Change-Id: Ibf4abb99e5e3e7aa9a9212b57094876f6ec6e9f0
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, PWM period is configured only when the client request
to configure period explicitly. However, there are requirements
to get it configured during bootup based upon the device tree
configuration. Add support for it.
While at it, add some pr_debug statements to the driver so that
it can provide some useful log of PWM specific calculations
runtime.
CRs-Fixed: 984628
Change-Id: I50de4488c32ef78efec1587305c56ab06fb32fed
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, DTEST configuration is supported only based on the
DTEST line and output values for LPG subtype. Though this will
help configuring DTEST mode for PWM subtype, input validation
has to be fixed for supporting the latter properly. Add support
for that.
Also, rename the "lpg-dtest-line" device tree property to
"dtest-line" as this will apply for both LPG and PWM subtypes.
CRs-Fixed: 949595
Change-Id: I96bf477a14bb135cf9196532cf4bf39a45c9ff77
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Pack the elements of all YUV interleaved formats in the same order
in which the elements are stored in the memory.
CRs-Fixed: 1019201
Change-Id: I64472af6e9983929e0d3ea08601d17c7a2b7c4ef
Signed-off-by: Ramkumar Radhakrishnan <ramkumar@codeaurora.org>
One remaining supported format for YUV interleaved forats table. Adding
format in this change.
CRs-Fixed: 978785
Change-Id: I025a59d92aca2585335768c94f7a188c339aa788
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Correct the sequence to turn on the GPU_GX gdsc as part of
enabling the GFX CRC.
CRs-Fixed: 1018785
Change-Id: I64d0abe7091f81f85e83747f09ece4bc524a4057
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Change all qdsp6v2 audio driver to use %pK instead
of %p. %pK hides addresses when the users doesn't
have kernel permissions. If address information
is needed echo 0 > /proc/sys/kernel/kptr_restrict.
Change-Id: I7baa9f127266726fecf9238167a1e0128a258847
Signed-off-by: Ben Romberger <bromberg@codeaurora.org>
Provide a test mode mechanism through debugfs interface for WLAN
firmware CCPM module so that WLAN enable and disable can be
tested without loading WLAN functional driver.
Change-Id: I8d411e067690443eefea645f4ff8130cf786c32f
Signed-off-by: Prashanth Bhatta <bhattap@codeaurora.org>
This patch adresses the proper updation of
buffering flag with the check for streaming buffering
mode against the peripheral's buffering mode.
CRs-Fixed: 1017305
Change-Id: Idc4556e568a42aa2441295c9e3caa3f2c92c4cc6
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
This patch provides the protection on dci session by
checking for the session pid and task pid to be same.
CRs-Fixed: 1008138
Change-Id: I7d78a13032365a42097ad71cfd0abab2792a1b98
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
Allow for mappings to have execute permissions in Stage 2 SMMU
as dynamic shared object may get loaded and executed from these
pages on the remote processor.
Change-Id: I3d7fb2829defd8efc362253866587652f35e316b
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
Provide process information as part of context being passed that
allows for messages to be queued appropriately on remote processor.
Change-Id: I93e3c6faa400121612d90f9be8fd5befe45fb39c
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
Expose new IOCTL to provide SMMU information that allows for
userspace to determine the appropriate ION heap to be used.
Change-Id: Iead0966d76acb2d2bbc41fa9cd5d09a252a3429e
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
