Code drop from https://github.com/siliconimageinc/sii8620
taken from commit 20b4c581d705cffce422bc79c2bacf7ed5363beb
"Posting driver 1.03 release candidate.
Version 1.03.19
Signed-off-by: Mikhail Amchislavsky <Mikhail.Amchislavsky@siliconimage.com>"
Adding driver for SiI 8620 MHL transmitter.
Integrated the files into drivers/video/msm/mdss/mhl3/.
Removed unnecessary files:
apq8074_kernel_update/apq8074-dragonboard.dtsi
apq8074_kernel_update/board-8974-gpiomux.c
apq8074_kernel_update/msm8974.dtsi
apq8074_kernel_update/sii6031/msm_otg.c
apq_build.sh
build
build_num.txt
clean
Moved files relating to SiI 6031:
apq8074_kernel_update/sii6031/msm_otg.c
apq8074_kernel_update/sii6031/si_6031_switch.h
apq8074_kernel_update/sii6031/sii_6031/Kconfig
apq8074_kernel_update/sii6031/sii_6031/Makefile
apq8074_kernel_update/sii6031/sii_6031/si_6031_switch.c
into drivers/video/fbdev/msm/mhl3/sii6031/.
Change-Id: I29adf3bd4a02406bd9b47c0727d4093cdea94496
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
[cip@codeaurora.org: Moved new file locations]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
When histogram is already running a subsequent call to start
the histogram would return with an error. Now instead of
failing the request we return success if histogram is found
to be running already.
Change-Id: I728d8388be625ff5d8069166ad4517095a71727b
Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
Implement the overflow recovery sequence only when the clock lane
is not present in stop state. This will prevent from running
the recovery sequence for non fatal overflow errors.
Change-Id: I3a64c9b42d0b112d84f376ab67c6a63c1dc0256e
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Add pinctrl support for the installation of the required GPIOs
from devicetree, and make appropriate changes in the driver to
initialize and set the pins to active and sleep states during
panel on and off stages respectively in QPIC driver.
Change-Id: I7e227843553c2a32cdd8eed3c622af7e3d556e6c
Signed-off-by: Zohaib Alam <zalam@codeaurora.org>
Signed-off-by: anisha agarwal <anishaa@codeaurora.org>
DSI interrupts are not enabled at LK. For cont_splash
case, dsi interrupt mask bits need to be restored to
enable interrupts so that dcs command be sent to panel.
CRs-Fixed: 745369
Change-Id: Ice61d538387c5d37dd9e077f01b4c6d4593cc393
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Decimation flag is not sufficient to prevent decimation from being
enabled. Instead check that decimation values are also not set.
Change-Id: Iab5fb4ef96649a2f28f4203643856b9ab9df4bee
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
The DSI lane overflow recovery should be done only during
active region. Currently, we consider the vertical front
porch also to be part of minimum line count check. This needs
to be fixed since vertical front porch region arrives after
the MDP active region. Also consider the minimum line count
while checking the upper limit of the current MDP line count.
Change-Id: I02401be74ff3af303624eacae8576dd5ccada3f3
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
When underlying mdp driver doesn't support waiting for kickoff trigger,
wait for panel to be idle instead. This will ensure proper
synchronization of updates.
Change-Id: I8fcb75c1873cd55b1aade3442aa99c6c1eba62a8
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Validate frame's ROI against pipe parameter for scaled
destinations only when partial update feature is enabled.
Change-Id: I9e4ccb27ce5648baa4607c70fd375f69413b9d82
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Some HDMI sinks may not have EDID ready immediately
after asserting HPD. Increasing the maximum number of
read retries of the first EDID block to ensure that
EDID read is successful.
Change-Id: Ia8e49f3e8f6beca84ecb584dcb40446a8657edb0
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
When decimating and if chroma is to be downsampled, hw doesn't decimate
for first step. This needs to be considered as part of the pixel
extension values validation.
Change-Id: I58e61776be4dcc11c105bb46e69c9b486ef1f4f9
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
MDP block supports dither feature in DSPPs (destination surface
processing pipes) which can be enabled or disabled by driver clients.
This change adds the support in post-processing driver to allow
dither configuration in DSPPs.
Change-Id: I2bd2da482f3d204649351bebdbe66bd5dab7a187
Signed-off-by: Ping Li <pingli@codeaurora.org>
Gama correction blocks are part of destination and layer
mixer blocks of MDP. Client of PP driver can program these
blocks and enable them. Change adds support to program and
enable the gamma correction blocks.
Change-Id: Ieba07290525c1ccf79e4abf3648baf3dfd02d266
Signed-off-by: Ping Li <pingli@codeaurora.org>
MDP block supports picture adjustment LUTv in the DSPPs
(destination surface processing pipes) which can be enabled
or disabled by driver clients. This change adds the support
in post-processing driver to allows configuration on PA LUTv
in DSPPs.
Change-Id: I7a0d436e7fdd921c55d12fddef33f5ba6c14ba00
Signed-off-by: Ping Li <pingli@codeaurora.org>
Inverse gamma correction(IGC) feature is exposed by the MDP
hardware block in source and destination pipes. Clients of
the post processing driver can program the IGC tables and
enable the feature. This change adds support for IGC post
processing feature.
Change-Id: I177fb06f5eec58fea0a54b537c0009d4c8e01bd7
Signed-off-by: Ping Li <pingli@codeaurora.org>
MDP has a new hardware block for converting mixer
output to yuv format before the data goes to the
interface block. This block will be used for enabling
yuv420 output on HDMI and writeback interfaces. In
case only one block is present, it needs to be
shared between HDMI and writeback.
Change-Id: I2688ca98c22d9f78e3c626ea8c1bf4c77713a3af
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
[cip@codeaurora.org: Moved new file locations]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
MDP block supports PCC feature on the dspp(destination
side picture pipe) which can be enabled/disabled by driver
clients. Change adds the support in post processing driver
and allows clients of driver to configure the PCC block
in DSPP.
Change-Id: Ic9307e12d6204c9e6e780ef8f2266151cc8a7ddc
Signed-off-by: Benet Clark <benetc@codeaurora.org>
When post processing(pp) blocks are udpated in mdp hardware
new functions should be added into pp driver for caching the
params required to program them. Cached params are committed
to hardware when next frame is being queued for rendering.
PP driver file is becoming huge due to addition of caching changes
for different revisions of MDP. This change moves the caching code
for upcoming mdp revisions into a separate file.
Change-Id: I14e34de23c607fd8acdb103767503cb2cce1a0f1
Signed-off-by: Ping Li <pingli@codeaurora.org>
[cip@codeaurora.org: Moved new file locations]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
MDP block supports GAMUT feature on the dspp(destination
side picture pipe) which can be enabled/disabled by driver
clients. Change adds the support in post processing driver
and allows clients of driver to configure the GAMUT block
in mdp.
Change-Id: I4024d54f14ebd41374c591a27b12dcda8695c80d
(cherry picked from commit a285051a127bcfa1da56d66fe7f96eeece88c2c8)
[veeras@codeaurora.org: Done as part of 3.18 upgrade
Resolve conflict by adding this commits version of
include/uapi/linux/msm_mdp.h]
Signed-off-by: Ping Li <pingli@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
With MDSS(v1.7), NRT VBIF handles rotator input,
rotator output and writeback output traffic. All other
input traffic is handled through RT VBIF. This change
updates the MDSS driver to update the WB input bandwidth
request to RT AXI ports and output to NRT AXI ports.
Change-Id: If22e6e7903ca2b246cdb89d23362e70f56f9e349
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
For 28nm DSI PHY, update the regulator programming sequence
as per the system team's recommended settings.
Change-Id: I0bb23e0ee1e25994c4b9dd4cedd6cb46ea8e282c
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Partial update should not be used for a given frame if any of the
source pipe in that frame has scaling enabled and that pipe's
destination rectangle is intersecting with final roi. If this condition
is detected, skip partial update and perform a full update.
Change-Id: I2e9b330048680abcce227232f9e086070c3cbdf8
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
For the panels of resolution less than qHD, ppp can work
in SVS when there is no scaling involved. Optimize the
clock rates based on this for 8909 target.
Change-Id: I0357edcb3f1bc9e4f821a897b6740ac60b4fd44a
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
Helpful in changing the panel resoultion on the fly with the help of
debugfs nodes and when used along with simulated panels, it allows to
test different panel configurations dynamically.
Change-Id: I9cdf82e4fffd3dd618ee97601f169d72ab76a473
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
[cip@codeaurora.org: Moved mdss_panel.c file location]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Currently there is no sanity checks present for panel
resolutions in wb driver. Add proper sanity checks
before configuring with new set of panel resolutions.
Change-Id: Ibdada9e1711f59785d11cc4821105e2e1849b0f3
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
When continuous splash is enabled, bus clocks are turned on by the
boot-loader display driver. If these bus clocks are voted down while
MDP is still actively fetching from DRAM, it leads to under-runs and
device hangs. Prevent this by skipping vote down of bus clocks if splash
hand-off is still pending.
Change-Id: Ia0b0ff90fb85024fb986453e70afaced331fbf06
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Currently the NT35596 ESD related DSI read values are defined
in mdss_dsi_panel.c file. Add changes to pass these values from
panel DTSI and parsing them in DSI drivers accordingly. This
helps making the code generic and can be easily extended to
other panels also.
Change-Id: If62fa45fdf41429d2efe14a78857433883a329a9
(cherry picked from commit 51684bee60e503e9b06174a294ed2eb7b939d5b2)
[veeras@codeaurora.org: As part of 3.14 upgrade reomve
arch/arm/boot/dts/qcom/dsi-panel-nt35596-1080p-skuk-video.dtsi]
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
During fb release we should release all resources that are associated to
that process. However, in current release function this can lead to
kickoff being done, if this is done while display thread is running
there can be race condition between the updates from two different
threads. Fix this by pushing the commit through the display thread in
cases where display thread should be running, or otherwise shutdown this
thread and do it along with panel blanking.
Change-Id: I9ff6316c18adfdb67d0250a144ddc2f9f2634273
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
During display commit cycle, we need to iterate through pipes that have
been marked for cleanup and destroy these. However in the middle of the
function we may block for sometime to wait for display to be ready, when
this happens we are releasing ov_lock which controls access to this
cleanup list. If there is any cleanup done in this period, then there
could be some pipes incorrectly cleaned up after this.
To fix this race condition, add a local variable to keep track of pipes
that should be cleaned up.
Change-Id: Ib80cf91e10d66e318754c327fd71a489b8c42676
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Currently, when mdss_mdp probe fails after registering for
regulator notifications, the regulator_unregister_notifier
function is not called. Because of this, when the regulator
has some state change now, the notification call fails.
Change-Id: I2a41029aa145f88477701ab75a6e30883d2c4017
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
While coming out of static screen on command mode panels, we
initialize the DSI host as part of DSI clock control. When partial
update is enabled, we need to program the correct ROI parameters
to DSI controller. Otherwise, issues will be seen if the first
update after the static screen has same ROI parameters as the last
update before static screen. Hence, update the existing ROI
parameters properly to MDP_STREAM_CTRL and MDP_STREAM_TOTAL
registers.
Change-Id: Id6ec179e42592bc4fbaa85d45ad4459036a4faf3
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
In case of command mode panel, the pixel clock can be increased in order
to finish transfer faster. In such cases we can increase the core clock
in order to match the pixel clock and finish the transfer faster.
Change-Id: I44a01e42c687ce20d4dbfa068478ad438433a581
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
HW underrun recovery in newer mdp revisions is h/w bug free. Enabling
it may help avoid system wide stability issues.
CRs-fixed: 723006
Change-Id: Ide52f68b272a66e18f62535f091faea91f7f13c7
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Fix a typo that was comparing the width instead of the height
parameter that lead to black stripe flickering when scrolling on
browser.
Change-Id: I10e57f876458f46d445b3404d09a5e7606aeb666
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Non-RealTime(NRT) memory fetch should use NRT AXI
ports while RT usecase memory fetch should go through
RT AXI ports. Number of RT and NRT AXI ports can be
different from chipset to chipset. MDSS driver hardcodes
them to "2" for all usecases which won't apply for
all MDP cores Ex: MDPv17. This change removes AXI ports
hard coding and updates ab/ib request based on AXI
ports availability for respective chipset. It uses
uniform calculation method for ib/ab quota request on
RT and NRT AXI ports to reduce the driver complexity
and clean interface.
Change-Id: I015c5c8a64bdf62f5747fcbcf19ba00cd29e21b5
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
msm8909 has mdp3 with DSI 6G. Enable DSI 6G to work with
mdp3 and mdp5 while using iommu and bandwidth functions.
Change-Id: I0de48dbe388c81ebfade7aeb5592357e2750d143
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
Add changes to share ion fd to userspace for mapping to
the frame buffer memory for mdp3.
Change-Id: I59c2cacde89abbd8919752c129ae8cf304208052
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
On some targets size_t and int are different sizes. This results
in a failed length check.
Change-Id: Ia5dd42cfe32eda789787c59785848e79b61ae218
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
compat layer ovarlay structure needs to be updated whenever there
is change in 64 bit overlay structure. This change updates the
compat layer.
Change-Id: Ibeaef3d825d8c33ee8c6abf9caaae8432b6b0645
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
It is possible that userspace modifies the frame buffer
parameters. In such cases ensure to align the frame
buffer size to avoid mmap failures.
Change-Id: I4a002694c26c8fface45d8e274d79d5624cc8158
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Add a property to configure maximum prediction error when
FBC is enabled.
Change-Id: Iad17d567e7e8b9a0bd73df8d59a34e364c2acf8e
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
We now support high resolutions like 4K that need higher b/w votes.
Increase b/w vote to 2GBps for the duration of the continuous splash
screen logo.
Change-Id: I2c73e98ea769b252bee51d953d7cdc24f2b6668a
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
While handing off pipes from LK to kernel during the continuous
splash screen support, we were iterating through the HW cursor
pipes causing a crash. Only iterate through non cursor pipes.
Change-Id: I1223d34b374c5517c68beaaaa1df8d21f0fe8b83
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Framebuffer commpression(FBC) 2.0 has new bit fields added to the
registers. Configure FBC registers correctly based on the dtsi
configuration. FBC 2.0 has increased the compression ratio to 1/3
and has configurable block size(in lines).
Crs-Fixed: 723612
Change-Id: Icf3c9b29d31f0e3214d6c7d525369fc7398dd9bb
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
When entering doze mode, do not turn off the interface clocks since
display updates are expected in this mode. This also avoid unnecessary
delays when entering doze mode while trying to wait for the clocks to be
turned off.
Change-Id: Ie6658a561f5d49aff50881c561fef858f3d26c61
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
When doze mode is requested while the panel in powered off, the
panel needs to be first unblanked and then configured into low power
mode. While this sequence exists in the current implementation,
the execution sequence only calls MDP's on function while unblanking
the panel. The correct approach is to go through the full unblank
sequence which would also start the display commit thread. Without
this, screen updates while in doze mode will not work and could
lead to unexpected behaviors.
Change-Id: I4f65764acaf01d61d129e00179930af9ebb79c77
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
For video mode panels, MDSS hardware needs to be on as long as the
panel is on. When doze mode is requested for a video mode panel,
no special optimizations can be done in the display driver to
configure the hardware in a low power state. As such, when doze mode is
requested for video mode panels, simply unblank the panel if it is not
already on.
Change-Id: I0f279d78b9b5c8eebb2bf654df628acafa408f23
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add MDSS_DSI_LINK_READY support to mdp3 driver, since
8909 uses DSI 6g.
Change-Id: Iccb752329d2116f09c31a522c53f54c675da1cb7
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Move double bufferring mode support property for dsi controller
to dtsi as it is not supported on 8909.
Change-Id: I2d99c34af7d4b9eef8f4503bad6fcd1480b2bde6
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
