MHI driver stack logging to the private IPC log buffer can be quite
expensive from a MIPS perspective. Enable such MHI logging
if and only if such logging is desired in defconfig.
Change-Id: I4a16eedc2424d250129b1b44a91d1fa32be399f5
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Certain corner cases have been identified in the MHI core power management
state machine whereby the driver state can go out of sync with the
device.
The cases are as follows: During in MHI resume operation the device
is not guaranteed to be fully recovered from LPM as the framework
requires. This causes RPM suspend to potentially be invoked
on a device which is still going through a resume state.
During RPM suspend action, if said action is cancelled a timing
window exists where previously cached commands are not played back
to the device. This causes a rotting command issue, when said commands
are never acknowledged causing a non recoverable timeout error on the
client channels.
During an RPM suspend operation, a timing window exists where
the device may be transitioning to M2 when the M3 is set. This causes
a device error which is non recoverable except by a full reset.
CRs-Fixed: 856202
Change-Id: I232365ba77b02b9aec87fef4cecc3d991243afe2
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Do a read after write for M3 to flush the write to the
device.
Change-Id: I0cf8c8a9dcf3599614351e1289f4b56a0fe32289
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Initialize the transaction status return code for the client
to a known value.
CRs-Fixed: 836433
Change-Id: I8023bd29b6ce36f69dfc3d2844803696eacadeb1
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Eliminate race condition whereby the device could go into
a low power mode before the host has finished initializing.
CRs-Fixed: 836441
Change-Id: I9957e87b1bfe956963c1f74f0a02d6714e9afcbe
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Initialize the client interrupt moderation capabilities to enable
correct marking of TRE moderation flags.
CRs-Fixed: 850216
Change-Id: Ic7a51fd1f089a847f225f23202183033352d0761
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Replace dma_to_virt and virt_to_dma with mhi_p2v_addr and mhi_v2p_addr
Change-Id: Ibda473254040cbd1f5fdf9eb463c14996d5fe12a
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Remove assertion on runtime pm resume return code.
A failure to resume may imply an ongoing change in
overall system state rather than a device failure.
Change-Id: Ic7aecc200e2d13f0771fd683e0070b0c2f9da467
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable MHI IPC verbose logs to facilitate debugging.
This will not pollute the kernel main log.
Change-Id: I8178227c7377284ce8e7dc4c3825a3cce6f5e3df
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
MHI WAKE transition must use runtime PM to transition the
device to operational state.
Previously MHI would enable the device transparent to runtime PM,
eventually locking up the entire state machine.
CRs-Fixed: 825891
Change-Id: I264533fe46a42394634e22d737324288ba387bf3
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
MHI clients should not be notified of ESOC shutdown notifications,
since MDM communication is still necessary after such a notification
is received.
Change-Id: I4075b56e1f8666dea63949db7a62bd1698dc9df8
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Remove incorrect logging during the MHI_DISABLED notifier.
Change-Id: I35b31ff448be03cd76a848e25391a825d79cabe9
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Parse MHI ring information from DT instead of statically allocating
data structure.
This is necessary as different platforms support different
configurations.
Change-Id: I59cd660459d627f93479a11257653611070fd3a4
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Remove unused MHI data structure and reorganize the main
MHI context data structure for easier debugging.
Change-Id: I2658bef7fcda95181bf8d80f58991277cf854449
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable MHI reset for dynamic recovery of MHI transport errors.
CRs-Fixed: 797757
Change-Id: I522503ab12d90d5391884772952960201f3585fb
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
CPU write buffer must be flushed before a DMA operation
is signaled to the device.
CRs-Fixed: 812602
Change-Id: I304671fd1a403d6d897b47641910bc112310b674
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable M2 power state transition exit through
CLKREQ GPIO assertion due to MHI doorbell write.
CRs-Fixed: 733370
Change-Id: I27b425ee305fc9c044812a8b15c76970987a5dae
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable NER support for MHI core. MHI core now enables
only event rings required for used channels. This saves
a substantial amount of system memory.
Change-Id: I3b9d63875cf117fba2ac062f831da1899b355e2c
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable log level sysfs attribute for MHI UCI
to enable different verbosity levels at runtime to the IPC log.
CRs-Fixed: 734010
Change-Id: I866b5bebb08257ac120de565a7b2a83b8e831a1a
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Remove dead code from the MHI driver. Currently there is no
usecase for the MHI STOP and NOP commands and this codepath is not
being touched.
Change-Id: I6cd96e28b9f46aca8014bbe4d2f2aa701f40b08b
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable large buffer sizes for SAHARA to reduce number
of data transfers by a factor of 12.
CRs-Fixed: 800039
Change-Id: Ica59ae4e3eae3b7c64222d36a8bc5033928ae631
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Flush pending PCIe writes after setting D3 hot and after
setting M2. This will ensure that no writes will bring the link
down as it is being turned off.
CRs-Fixed: 755658
Change-Id: If2ca4575f833ede77d6a14e1e2bf5a86d1c28218
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable queue TRE function for treating both command and transfer
TREs in the same codepath. This simplifies the flow of processing TREs
and facilitates debugging.
Change-Id: I8dc1dec4e0e23b7b36982cc0ace957a1b43aa6da
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Currently on UCI open, if the transport is not ready, the open
is succeeded in hopes that the transport becomes ready in the future.
Increase transparency between UCI clients and MHI such that
when the transport is not ready the UCI client is notified
and can react accordingly.
Change-Id: Iacc85e9aa68be9cde152a3fc2bfe9d0c6f6f6b62
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Assert when an event is received for a channel which is empty.
This is a fatal transport error.
Change-Id: I0249f97480ebc3ca8d3e98c10e35a0eb040215a4
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
This reverts commit e38c1ec36984945d60d02002eae5e615d1b9b6aa.
This commit can generate a link down in M2 state where the doorbell
is flushed while the link is down.
Change-Id: If29db648f0c6d2b0bd7a3d3a9b0f31ae5512c4eb
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable runtime PM in the MHI driver to increase transparency
between kernel and device driver and synchronize runtime PM
actions with system wide power states.
Change-Id: I8b87c2ed7b0be8a4cf9568ac1fb772eebe416dc6
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Ring out pending doorbells in the event of a cancelled M3 transition
attempt.
Change-Id: I83ffe0407618ea26768707fc6341d20947ef3ba2
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
When the netdev interface is released, NAPI is disabled.
This condition can occur while the device is still sending RX data
causing a potential kernel panic.
Wait for all incoming data to be received, before releasing
the interface.
Change-Id: If33ff721a581fdafb9712fe3cf9243996187f09d
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
MHI RmNet will now wait for all packet fragments from MHI before
sending the received packet up the network stack.
Change-Id: I3f0958d029a5763e7e0b1e4ab43f17fd98583a48
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Reduce interrupt moderation for both inbound and outbound
hardware channels to 1ms, for improved latency response to
device acknowledgements.
CRs-Fixed: 782801
Change-Id: Id0717582d88dcfc12a8711f983da59a8f651b6d3
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable support for NER as part of the MHI REV E
specification. NER register will now be set to the
maximum number of channels supported by MHI.
Change-Id: Id868c04886af13cd34720c86a55ac64debc4ab31
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Prevent event counter from getting incremented twice and breaking
the modulo operation.
Change-Id: I472115a3d65a84904482455d00cee9de6d31043b
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Resolve a race condition whereby a buffer could be freed
by the SSR handler while being operated upon by the transfer
callback.
Change-Id: I5e62b04166b2a8a9867047574c7232739229c911
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
A race condition exists in MHI_UCI whereby a client could receive
a buffer, inconsistent with the return code from MHI.
Change-Id: I4a932ea608ce967c1588f092c60d03747bad2064
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enable ftrace events in MHI for the tracing of power
state transitions.
Change-Id: I74373b7429c6d7316c4a66db141cc09e2a4418dd
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
The pending TRE iterator is not properly initialized
and checked against, leading to an incorrect number of
TREs getting processed.
CRs-Fixed: 748475
Change-Id: Ie8609edd1a89d8dc14bf781612357d7dc524f83a
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enabled sanity check for LPM IOCTL in MHI. IOCTL should not
be called into MHI, if the device is not ready.
CRs-Fixed: 749894
Change-Id: I52627a94e70e3b17130653b7b73a86b417807842
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Reorder operations on MHI TRE to prevent a race condition
of publishing the TRE to the device before the TRE is fully
populated.
CRs-Fixed: 726655
Change-Id: Ide208c77c93f0e68eee0c6c304eaebc451028341
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
The doorbell value for the event ring must be sampled within
spinlock context or the value could be stale when written.
CRs-Fixed: 746401
Change-Id: I4eb5095f34b890e02fee48c22206afcbfd70a454
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
A timing window exists where M3 state transition is pending and
the doorbell does not get written out. The M3 process is then
cancelled, and no M0 event takes place to flush the doorbell out.
Remove setting the pending M3 flag until the transition is no
longer cancelable.
CRs-Fixed: 733632
Change-Id: I3b4dfe23d0ea4af69d2810a171c61dc60a6c2f8d
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Enabled event ring context updates regardless of MHI
power state.
Change-Id: I910d056d53f7c940caea48546c206d4603e8a4b9
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
After a channel reset, any pending acks on that channel
will not be received from the device.
In this case they must be cleared in the channel reset
command handling.
CRs-Fixed: 733172
Change-Id: I5b7c525f7f532ed107caa020cde33ec1955ae618
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Resolve issue whereby a deadblock is encountered when trying
to put the interface down.
Change-Id: I757492fceff56014b28ec50307f6d84b1bb81889
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
