Return an appropriate error code if the default pagetable is NULL.
Change-Id: Ic88b066c40a8f840d95fd3fbc9ee9274c428b66a
Signed-off-by: Lynus Vaz <lvaz@codeaurora.org>
For any cache operation, the current code tries to map all pages to the
kernel using vmap in case sg table is not available and then performs
the requested cache operation. If vmap fails because of memory crunch
ioctl just returns failure.
This change avoids using vmap and performs per page cache operation
even when sg table is not available. This is done to avoid failures
because of vmap especially on 32 bit systems.
Change-Id: I123b46e6a55a62cbf934ab6a2a49dcd1f0d4c7d4
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Update QoS settings for A508 VBIF based on recommendation.
VBIF_GATE_OFF_WRREQ_EN register needs to be programmed by SW.
Change-Id: I7d41c8350ad09c595f288bd2a2b45fc2abef15f8
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Return mementry from kgsl_sharedmem_find only if pending_free
is not set for that mementry. This is necessary to avoid use
of a mementry after it is already marked for free.
Change-Id: I23111e9c82a88ccbda2ab259074c38d91f9ff5cb
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
If we delete uninitialized timer on CONFIG_DEBUG_OBJECTS
disabled build del_timer_sync() will block for ever. For
all A3xx targets preemption timer is not initialized, but
dispatcher fault handler is trying to delete the
uninitialized preemption timer. Fix this issue by adding
a preemption check before we delete it.
CRs-Fixed: 2023690
Change-Id: I2c51a0b2286b82bf2eb5ee68d923dd9585f07f00
Signed-off-by: Wenbin Wang <wwenbin@codeaurora.org>
Signed-off-by: Abhilash Kumar <krabhi@codeaurora.org>
Any memory free ioctl doesn't need to be blocked till the
corresponding mementry is destroyed. This change defers
the mementry put to unblock all memory free ioctls immediately.
This is done to reduce the time spent by user applications in
waiting for memory to be freed.
Change-Id: Iaa37ac5dbdedc3d02c41886c2bdf7f3d016176ac
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Kernel should never access untrusted pointers directly.
If the address is not mapped to kernel, map to kernel
address space and perform cache related operation.
Change-Id: I433befcde620e51b8ec17954ddb710f6084e0592
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Robust context attempts to perform a rendering that takes too long
whether due to an infinite loop in a shader or even just a rendering
operation that takes too long on the given hardware. This type of
attempts can result into GPU faults. Robust context expect driver
to replay IB instead skip IB and if it fails on replay context has
to be invalidated.
KGSL_CONTEXT_INVALIDATE_ON_FAULT flag allows draw context to execute
only replay policy on GPU fault recovery instead of going to default
recovery policy. User space has to set this flag during the context
creation.
Change-Id: If42dc5afc7d5ed1226b73ae5abfa2648d7acf2c3
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Hold the context lock before updating the context id in
param->drawctxt_id to avoid race condition between context
creation and context destroy.
Change-Id: Ic26d3e5b68078c02d15c38080b1a262ea4b1f7fe
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
When allocating userspace memory keep reference to memory
allocation till it is completely initialized and info is sent back
to userspace.
Change-Id: Id72c82bf98c094ecbd4722813c732a998dcbb188
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
Check for legacy PM4 commands instead of adreno version to calculate
ringbuffer space for PM4 commands that write to memory.
Change-Id: I5d1d4cfbc70bc73ddee9ee752de24aae154a04dc
Signed-off-by: Lynus Vaz <lvaz@codeaurora.org>
Memory retention is needed only for NAP state but not for SLUMBER state.
Disables memory retention for core clock before entering SLUMBER to save
power.
Change-Id: I64a5ecec6fc90d662da8d9d793860e56b0c6473f
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
For dual channel DDR, IB vote from client is half of actual
IB vote as IB vote calculation on client side doesn't consider
number of DDR channels. ICB driver takes care of multiplying
the client IB vote with number of DDR channels.
This change removes the AB capping check to avoid the scenarios
where AB vote > actual IB vote/2 but gets capped to actual
IB vote/2 because client side IB vote is half of actual IB vote.
Removal of this check will not impact single channel DDR targets
because of the way AB value is calculated. In case of honest BW
voting, AB will always be less than IB as AB calculation doesn't
consider RAM wait value. In case of unhonest vote, AB value is
always caluclated as some percentage of IB vote and this percentage
value is always <=100%.
Change-Id: Icdca6118f6605665979a1bead35ba3ef631d50e8
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Following changes been made to improve soft fault detection,
which will fix un clocked register access in dispatcher_do_fault()
and incorrect declaration of GPU soft fault.
i) Stop fault timer before entering to NAP state
ii) Don’t start fault timer if the dispatcher inflight count is zero
iii) Add ringbuffer empty check in _isidle()
iv) Add device state check in dispatcher_do_fault()
CRs-Fixed: 2012731
Change-Id: I5ce498029f389eeeb428b4ac7fb07afd84d5764c
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Map the GPU QTimer area as a global into the GPU
IOMMU so that the GPU can access the QTimer.
Change-Id: If50bd36681123adde7e3a37644c41316f101154c
Signed-off-by: Jonathan Wicks <jwicks@codeaurora.org>
To handle Cx peak current limit on SDM660, GPU needs
to call Cx ipeak driver APIs when it switches between
threshold points.
Cx ipeak driver will throttle cDSP frequency if all
the clients are running at their respective threshold
frequencies to limit Cx peak current.
Change-Id: I5ffcf1a42523072d2b8b7bc0022eb3cc067acbb9
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
A508 GPU has multiple frequency plan, for loading a
specific frequency plan add speed bin read capability
for A508 GPU.
Change-Id: I32a030bec438edc74f1e78bfb2ea86e7a3f60dab
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Using per uts namespace utsname() for kernel build information section
in snapshot dump was causing a kernel panic because it is accessing a
NULL nsproxy pointer. nsproxy was null because corresponding user task
got SIGKILL which triggered call to free_nsproxy. The patch fixes the
issue by using the global init_utsname() which is always valid.
Change-Id: I13b1b07557794a7fcedf0c9e6acfd3406fbb8989
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
A context may be detached without submitting any commands
to GPU ringbuffer. This may cause us to wait on a timestamp
that will never be retired. So return immediately from
adreno_drawctxt_wait_rb() if context has not submitted any
commands to GPU ringbuffer.
Change-Id: If8b3f8df92ec9b54a1a83d2f6704d4d15eb1b979
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
_get_svm_area can fail to find available address range
from mmap_base which was adjusted by random factor.
By logging mmap_base value will help to identify
any issue with the VA randomization.
Change-Id: Ibdc3fac975adde02c30aa253b53d6533ee558161
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Remove the kgsl device-specific debugfs files in the device removal
sequence, and also if probe fails.
Change-Id: I4d5e9ec33a887f29c14bac513c4faf75266e990b
Signed-off-by: Lynus Vaz <lvaz@codeaurora.org>
Sometimes ringbuffer timer is not getting updated due to
race with the preemption. This can cause dispatcher to
detect false timeout gpu faults. Remove preempt state
check in adreno_dispatch_process_drawqueue(), which will
allow to update ringbuffer timeout value irrespective of
the preemption state.
If the preemption completes successfully, preemption logic
updates timer for new_rb. We don’t need to care if it is
not updated for prev_rb. If preemption in-progress timer
will be updated for cur_rb in adreno_dispatch_process_drawqueue().
In both cases we are taking care to update ringbuffer timer.
Hence we don’t need to check preemption state.
CRs-Fixed: 1095344
Change-Id: I0e0ec655e2262c4f499748ce35a8d710ed15b5e3
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Add new GPU ID: A508 and corresponding VBIF and initial
settings on SDM630.
Change-Id: If1cd782beb50098a69a9d05acb083ef4b0465766
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
in kgsl_pwrscale_init(), add missing NULL check for kgsl_midframe
to avoid further accessing, in case if memory is not available.
Change-Id: If6a4e59d4675fe67aefc63d7f8251f4d28ddeec5
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Enable retention of memory and periphery logics for
GPU core clock. If the setting is not done then GPU
might get stale data while switching from NAP to
ACTIVE and which leads to page faults or hangs.
Clock settings need to be handled by client drivers only
and hence do it in KGSL driver.
Change-Id: Iea3fd720e2a0eda9f6ee719177a8898bc2bd75e4
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
There could be possibility of integer overflow on adding
offset with size and result into a value smaller than
memdesc size.
CRs-Fixed: 1109776
Change-Id: I3746f34c9fb8ada28a9b6ed438ca8c296b69e752
Signed-off-by: Sudeep Yedalapure <sudeepy@codeaurora.org>
Signed-off-by: Abhilash Kumar <krabhi@codeaurora.org>
A512 GPU has multiple frequency plan, for loading a
specific frequency plan add speed bin read capability
for A512 GPU.
Change-Id: Iff207c31bc50748a6caaa405608252b78133fd83
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
If there is IB2 address overlap with IB object list,
driver is dumping pending dwords size of active IB2
data into snapshot. Fix this by updating IB2 size
while active IB1 parsing instead later point.
Change-Id: Ibb12a876ebf73846424232ef28e00d3dc9f9be59
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
