During a pagefault we print trace with the fault
information which gets delayed by unacceptable
time. It happens due to the the code that searches the
faulty address in the recently freed addresses for a matching
entry.
Moving it to new position wont have any impact on debugging
instead trace is dumped without any delay.
Change-Id: I11487798b60742096e06605cf3046b4cfc8cc057
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
Some targets do not have GPMU block in GPU and register read
or write into those registers is not valid.
To prevent this, check GPMU presence and then proceed.
Change-Id: I0992125af8cda4b8235aedb64f6ef8868ae95f20
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Current irq handler clears the pending interrupt bits in interrupt
status register before serving the interrupts. This leads to a race
condition with the idle check which checks the interrupt status
register to determine whether any interrupt is pending or not. As
the interrupt status register is already cleared, idle check goes
ahead and switch off the GPU clocks even when irq is yet to be served
causing NOC errors.
This change refcounts each irq handler call and uses this reference
count to determine if any irq is still pending or not along with
interrupt status register to avoid this race condition.
Change-Id: I030d52c52055f836ea4c7519ce2d8db94a2a09a0
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Try to allocate pages from lower order mempools incase
if requested memory size order does not match with the
available mempools.
Change-Id: Idbe4dae3b8bb2a3165199b6959ad4fbf36559964
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
During GPU snapshot dump path, a5xx_snapshot() tries to
capture preemption record without really checking on the
availability of preemption feature.
Add a check for preemption feature and then proceed.
Change-Id: I6ee23a1d8006ba18a25fb341bb88d8944ff054b7
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Enable HW clockgating and preemption for A512 GPU to save power
and for better context switching.
Also update proper size for CP MERCIU size.
Change-Id: If3e5101c2695b1f06d650d320bc8d3bebac29f6f
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
If power-related initialization fails during device probe, clean up
the kgsl structure members. This is useful if the device probe is
retried later.
Change-Id: I75aeb199da685bb5055ba5a8a0bb552656951674
Signed-off-by: Lynus Vaz <lvaz@codeaurora.org>
This is needed to clear out the internal memories of
GPU while moving from secure to unsecure mode.
Change-Id: I9ef4848212246a2ed45395ef97c7f755784cb635
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Return error instead of BUG_ON on map global failure.
This will avoid crashing the entire system.
CRs-Fixed: 1106621
Change-Id: I693dc196bb7a2e01f6a033f5fbbf7b454108108d
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Enable CPZ feature for A512 GPU on sdm660.
This is required to process secure conent by GPU.
Change-Id: Iaaedde4e56e331379be0b44b23527df0d5807f55
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Currently we sample power stats at the expiry of
cmdbatch. In cases where cmdbatch takes a long time
to finish the job, it delays power stats sampling,
in effect it delays DCVS decision for changing the
frequency. Do a midframe power stats sampling and
feed it to DCVS if it is enabled.
Change-Id: I547d792b38649aa1d60525b0dc335791b37989fd
Signed-off-by: Prakash Kamliya <pkamliya@codeaurora.org>
Allow driver to get pages from the system incase mempool configuration
is not defined from the device tree. This will fix kgsl driver probe
failure for without gpu mempool configuration devices.
Change-Id: I3142a5d2e13ed40f643c91594fd868c37620ce54
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
kgsl_ioctl_gpu_sparse_command() is added to for user to
specify list of binds/unbinds for a memory entry
and syncpoints they depend on. If user specifies both
create a sync object for syncpoints and bind object for
binds/unbinds and add them to dispatcher draw queue. Sync
object should be inserted before the bind object in the
draw queue. Once the bind object reaches the head of
draw queue the corresponding binds/unbinds are performed.
kgsl_ioctl_gpu_sparse_command() only accepts commands from
context created with flag KGSL_CONTEXT_SPARSE, commands
from all other context types will return an error.
Change-Id: Ib0a2361f854ae01d0d8090cdd48cfa96308daf93
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Add the support for trace ID for coresight. This ID is
will be defined in the respective device tree file.
Change-Id: I78ba05ed05b54fdc0f4d4f55c468f90f39c821f1
Signed-off-by: Lokesh Batra <lbatra@codeaurora.org>
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Triggering Crash Dumper might actually change the values of
few GPU registers including VBIF. Hence dump those registers
ahead and skip them from the list which goes to crash dumper.
Change-Id: I37a53983a65bd8abfefa780053819de71df7f24f
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
By default A5xx GPUs use CP crash dumper to get GPU
snapshot in case of any fault.
At times it is required to disable crash dumper
in case of any abnormalities, add support to do so.
Change-Id: Iea6497778bcd711e769f0e509103bd3bd0fd8574
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Check MMU type for below operations to make NOMMU functional:
- adreno_iommu_set_pt_ctx() tries to set pagetable during context
switch without really checking on type of MMU.
- skip tracking of gpuaddr in case of NoMMU during
kgsl_mem_entry_track_gpuaddr().
- In case of nommu the function kgsl_allocate_global() should
always allocate contiguous memory from CMA.
Change-Id: I8cb59e1475376167c7a8a60c54df0939597f5083
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Ringbuffer timer should always be reset whenever we finish
preempting to that ringbuffer. Currently, there is a case where
wptr in the hardware and the kgsl are identical and thus
the timer isn't reset. Reset the timer regardless if they are
identical or not.
There is one special case when we shouldn't reset the timer.
This happens when we try to figure out next ringbuffer to preempt
but the next ringbuffer is the same one as current. In that case,
if nothing new got submitted to this ringbuffer, then don't reset
the timer.
Change-Id: I6b5aea46f1769021b39ba6e135bef780719a92e7
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
When creating a context allocate an ID but don't populate the slot
with the context pointer until we are done setup up the rest of the
process. This avoids a race if somebody tries to free the same
identifier before the create operation is complete.
Change-Id: Ic0dedbadca5b4cc4ce567afad48a33078b549439
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Dumpeti Sathish Kumar <sathyanov14@codeaurora.org>
This reverts commit 691ddba4ee ("msm: kgsl: Enable limits
management on A540v2"). The GPU does not hit the voltage
limits at 670mhz so there isn't any need to enable
limit management.
CRs-Fixed: 1056661
Change-Id: If225dc4ec2c2e3eb8996f49f4fdf6acd31a50680
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
After wakeup from power collapse restore ISENSE registers from
internal buffer.
CRs-Fixed: 1075694
Change-Id: I9cf2f94892bdeb83fab0068902419b1603520364
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
Add more information to the debugfs kgsl/proc/<pid>/mem which
will allow memtrack to correctly assign allocated ion buffer
memory to a process. The additional columns show the number of
kgsl_mem_entries which have a usage of egl_image (or) egl_surface.
When attaching a dma_buf to kgsl, use the dma_buf_attachment's
(void*)priv to point back to the kgsl_mem_entry. This makes it
possible to iterate through all attachments on a dma_buf and
gather statistics from each kgsl_mem_entry associated with the
dma_buf.
CRs-Fixed: 1073673
Change-Id: I1ef3bd0da3f74fa41074021699b2226c48bde9c3
Signed-off-by: Santhosh Punugu <spunug@codeaurora.org>
Add a quirk to set LMLOADKILLDIS bit in A5XX_VPC_DBG_ECO_CNTL
and clear LMLOADKILLDIS bit in A5XX_HLSQ_DBG_ECO_CNTL registers.
This is done to avoid a VPC corner case with local memory(LM)
which leads to corrupt internal state on A540 and its derivatives.
CRs-Fixed: 1036444
Change-Id: I31008433f19924bb35560d3e35fe0665e73751d5
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
