A306a GPU have the two different frequency plans. The frequency
plan needs to be loaded dynamically based on the speed bin
information. Add support for A306a gpu to read the speed bin
information and choose frequency plan dynamically.
Change-Id: Iba53d4381d61f23ce1195a147493b0d292cd3723
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
The current value is leading to spurious fault interrupts
from the GPU. Increase the threshold 4 times so that hardware
fault detection won't be triggered as quickly.
CRs-Fixed: 1073836
Change-Id: Ie780cec4de818c94a407461580f9d80de7e4ec84
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
When programming perfcounter via gpu commands, we may encounter
-EAGAIN because of cancelling rb events either due to soft reset
or when powering down the device. Ignore this error because we
have already set up the perfcounter in software and it will be
programmed in hardware by adreno_perfcounter_restore when gpu
comes back up.
CRs-Fixed: 1024199
Change-Id: I5dc3561d15fa50ac58646f96559cfd262020dda9
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Add driver support to configure mempools from the device tree.
This will enable mempools to configure per device specific and
reduces the high kgsl memory usage based on configuration.
CRs-Fixed: 1064046
Change-Id: I0a7e36b7e1fef9d42a4c0fe33d69a4debf15af2f
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Ensure that device pointer isn't NULL before using it in
kgsl_snapshot_save_frozen_objs().
Change-Id: I676dfa5567b1d09427e3e7691045fabc71b53d43
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
There could be possibility of integer overflow on adding
size with maximum offset bytes and result in a value smaller
than maximum memdesc size.
CRs-Fixed: 1082914
Change-Id: Ie66b3a8ca2ca418a4a52f65987266b8d580c121f
Signed-off-by: Sudeep Yedalapure <sudeepy@codeaurora.org>
If one is mapping anonyomous user memory in the GPU with SVM enabled
we want to try to accommodate that request if possible. The memory
address was being set up correctly in the memory descriptor but
the GPU address was getting tripped up when getting mapped in the
process. This is because the memory should be treated like SVM
memory so it needs to be registered in the memory tree and the
rest of the path needs to accept the address.
Change-Id: Ic0dedbad661143977a226d50263c26b5af579ce3
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
memdesc->pagetable is supposed to help ensure that memory gets
unmapped before it is freed, but the pagetable member is being
populated at create time not when the buffer gets mapped. This
forces the developer to ensure that the same pagetable is
used for both the create and map step. Instead, assign the
pagetable member when it is first used (to get a GPU address)
and put it away when the GPU address is released.
Change-Id: Ic0dedbad372fd9029b932dd99633a650049751ed
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
A process may have many kgsl mem entries in use. Outputing all of them
as a single debugfs seq_file record takes twice as long as necessary
because seq_file must retry higher order page allocations for the output
buffer until it is large enough to hold all mem entries.
Additionally, process_mem_print() currently holds the spinlock
private->mem_lock during this process. This is too much time to
disable interrupts, and prevents locking mutex in print_mem_entry.
Change the kgsl_mem_entry debugfs functions to output one entry at a
time. Then the seq_file only need to kmalloc one page regardless of
the number of kgsl_mem_entries.
CRs-Fixed: 1073673
Change-Id: I2907495b65e62d95a892741aed008048bb86aced
Signed-off-by: Santhosh Punugu <spunug@codeaurora.org>
Readl/writel macros expect void pointers so declare the
addresses as void and not unsigned int.
Change-Id: I67cf15fa918832ebab56cb999265d02880682c5e
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Add a sysfs entry to enable control of notifications
from pwrscale to devfreq.
Change-Id: Ife0a31e96975239bf4fefd59ac6266568c4db1a5
Signed-off-by: Jonathan Wicks <jwicks@codeaurora.org>
Sometimes an interrupt from GPU is ignored while we
are still executing the previous interrupt. In order
to service any interrupt that was fired while executing
the interrupt handler, clear the interrupt register
immediately.
Also, clear the ADRENO_INT_RBBM_AHB_ERROR bit not before
but after it's serviced in its respective handler. This
will avoid firing the main interrupt handler a second
time.
CRs-Fixed: 1072781
Change-Id: Ie6b5a511f5b3077adae7d464de437f2aa893b0c9
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Remove the DPM registers from a5xx snapshot as they are
not needed for A540.
CRs-Fixed: 1074810
Change-Id: Ic4259821e1ee74e49068545208587ad66ac29679
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
We still need to keep this internal flag for non-sparse
mappings. Add back so we don't map multiple times if
the range is already mapped.
Change-Id: Ifcf6073b5b778bcb535d26bc33990254ff48c406
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Move target specific initialization and setup into target
specific init functions. The change is required to port the GPU
driver to support future generation GPUs.
CRs-Fixed: 1053516
Change-Id: I808e247669fab61a6a64131858fe2f9e19754242
Signed-off-by: George Shen <sqiao@codeaurora.org>
a540 hardware does not support BCL and LMH after all.
CRs-Fixed: 1075694
Change-Id: I09808145d20ded63b5043cae6510429560cb599e
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
If the wait for global fails due to timeout then nothing after this
point is likely to work very well. Get GPU snapshot in addition to
BUG_ON(), to analyze the GPU fault.
CRs-Fixed: 1053780
Change-Id: I29930120a72a08533c859002f646af93e67c754f
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Currently dispatcher accepts kgsl_cmdbatch object. This object
is a superset of all the types of objects dispatcher accepts.
Split kgsl_cmdbatch object to SYNC and IB/MARKER objects and
structure the code to make it easier for new type of objects
to be added to the dispatcher queue.
CRs-Fixed: 1054354
Change-Id: I2d482d1081ce6fdb7925243c88ce00ea6b864efe
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Disable UCHE global filter for invalidate/flush,
SP will handle the invalidate/flush for each SP
independently on A5XX GPUs.
CRs-Fixed: 1073853
Change-Id: I3daf3722cfbdfff080161f9a0248fd8096550328
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
Rename all cmdbatch to drawobj. This forms a platform
for future changes where cmdbatch is split into different
types of drawobjs.
CRs-Fixed: 1054353
Change-Id: Ib84bee679e859db34e0d1f8a0ac70319eabddf53
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Currently we have a workaround for A540 which inserts
WFI after every direct-render 3D mode and every 2D
mode draw. Add a check to enable this only on A540v1
as this workaround is not required for A540v2.
CRs-Fixed: 1072767
Change-Id: I679bbf68ee3dcc1aee30d56a646a42b6ff09fb6f
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Add new sysfs nodes which satisfy a generic format requested
by customer. Also add a new node to track GPU temperature.
Create links to these nodes at a generic location:
/sys/kernel/gpu/
CRs-Fixed: 1064728
Change-Id: I414a07ff4f9ee14b8f882d15644b06a73d5fcf76
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Reschedule the idle work in case transition to idle state is rejected
because the GPU is busy. This change avoids the condition where
transition to NAP state gets rejected due to a pending IRQ which is
currently getting served by IRQ handler because of which GPU remains
in active state even when GPU is idle.
Change-Id: I472a30b6a0e83cdd6957ed12eaa39d0c7731fcb5
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
Few gpu faults need system level information like voltages,
interface clock etc. This information can't be extracted
through the snapshot dump. Add a facility to force panic
on gpu fault, which will help to extract additional
information from the ramdumps.
To trigger BUG_ON for a gpu fault:
echo 1 > /sys/class/kgsl/kgsl-3d0/snapshot/force_panic
Change-Id: I020b5518fcaedd4fecc572b580a989bf117f6ceb
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Disable SP clock before programming the clock gating control
registers and enable back SP clock.
CRs-Fixed: 1061048
Change-Id: Ic19a8a67fe0e192c9c7c3f855c7eb33901ca2adc
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Add a NULL check for dispatch_q which will avoid
NULL pointer dereference in dispatcher_do_fault().
Change-Id: I429aa91f9c5fa92ce2e8b23cc4911454744f75c9
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Currently, we free up the gpuaddr range whether unmap
succeeds or fails. If it fails and we free up the gpuaddr
range, there is a possibility that a later allocation will
overlap with this range. Mapping this new range leads to a
BUG_ON() in the iommu driver which thinks that we are
overwriting an existing mapping. To avoid this, we never
free the failing gpuaddr range, effectively removing it
from being re-used for any future mappings.
CRs-Fixed: 1072834
Change-Id: I57dfd6abe6c928dbe4df1bcc682d4093040ccb9f
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
The DOMAIN_ATTR_COHERENT_HTW_DISABLE IOMMU domain attribute is being
removed. SMMU coherency will be configured through the SMMU device tree
nodes moving forward. Remove the obsolete option.
Change-Id: I4bbbfb90fe172e048cc9504c4e6be5f36501b485
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Add a new linux header to support 64 bit pagetable address in Linux OS
section.
Add a new linux context header to support v2+ Linux version in Linux
context section.
Remove multiple register reads on CP IB registers and have a single
CP register read to get the active IB information.
Add Active IBs to obj_list in case static snapshot blob is not having
enough memory, so that it get dumped into dynamic blob.
Add a message in case any active IB is not getting dumped into snapshot
binary.
Change-Id: Icee01f6ba95e469acac9eed6bf2fdbc83947f5a8
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
The RBBM_ALWAYS_COUNT countable does not function properly
when top level clock gating is enabled. Return -EINVAL
when user requests this perfcounter.
CRs-Fixed: 1038778
Change-Id: I48d560ab2caa6ea467ac56bf0d323937a475cdde
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
