The scheduler allocates memory for the task load structures during
fork. It then relies to sched_exit() to be called to free that memory.
However, if the fork itself fails at any point after the allocation,
the memory is left unclaimed forever. Fix this memory leak by freeing
the allocated memory under error conditions.
Change-Id: I14a8290c9fcc4174ec80560e9f9d7bcdb119761f
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
Task load structure allocations can consume a lot of memory as the
number of tasks begin to increase. Also they might exhaust the atomic
memory pool pretty quickly if a workload starts spawning lots of
threads in a short amount of time thus increasing the possibility of
failed allocations. Move the call to init_new_task_load() outside
atomic context and start using GFP_KERNEL for allocations. There is
no need for this allocation to be in atomic context.
Change-Id: I357772e10bf8958804d9cd0c78eda27139054b21
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
Recent changes to scheduler guided frequency have started reporting
the maximum of the cpu load and the load of the top task on a CPU
to the governor. Use the same information to determine whether a
notification is necessary or not.
Change-Id: I1928c6cd0509952443a912ef54e0d72d5f75955d
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
Capping load when reporting to the governor was important prior to new
scheduler guided frequency changes as intra-cluster migrations would
sometimes lead to CPU loads well in excess of 100%. With the new top
task approach however, load greater than 100% is no longer possible
except for the same conditions that were previously exempted (i.e.
inter-cluster migrations and frequency aggregation).
Change-Id: I3e4f5e39ec9ae7eeaba9a567efd245a7aec1b7ad
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
Currently, profile integrity register is using only bit 0 to
indicate whether the profile is loaded or not. Now that the
profile can be loaded and/or fuel gauge can be restarted by the
bootloader, extend the usage of that word by using other bits
to provide more information. This is to aid the debugging.
Change-Id: Ib04ab10998de2f57b05cd976c3e9c8a1e2f4c574
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
When a debug board is present, battery ID will be something like
7 Kohms. Expose a fake battery SOC when this is detected. This
will help avoiding the device shutdown if a low battery voltage
is seen by FG and state of charge goes to 0.
Change-Id: I750b2adfb00f12960f74bd552a5896f66ecaece6
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Make sure that the secure session device is used while freeing the
buffer that was allocated from secure memory.
Change-Id: I07802c21c661fe18fb2fda70980b04f646408d7d
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
GCC clock controller is required to be enabled for all peripheral clocks
supported by global clock controller.
Change-Id: I11c6cc7f09b403a09bdf65a14f7b9d327c5d9613
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The fmax & num_fmax have been updated to reflect the new variable names and
also fall back to branch clocks clock_ops for hardware branch clocks for
now until the new ops are available.
Change-Id: I8b86ebbabe37bb86bd20eafe9501c4677f21a553
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add driver support to configure mempools from the device tree.
This will enable mempools to configure per device specific and
reduces the high kgsl memory usage based on configuration.
CRs-Fixed: 1064046
Change-Id: I0a7e36b7e1fef9d42a4c0fe33d69a4debf15af2f
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
GCC region has been mapped by regmap instead of devm_ioremap_resource.
So to map modem restart register which is part of gcc region requires
devm_ioremap otherwise mapping error occurs.
Change-Id: I1d97d8ef831e3a91df47eebf22e1156d0a3712ae
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Bring in updates from msmcortex defconfigs to msmfalcon's.
Change-Id: Iedbae0d4738c7badf3d4faf60f43e8c8bdab51e1
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
In combo usecase there are 2 front-end dai's with
same codec dai, for example, multi-phrase ADSP SVA detection.
Using a single bit as the counter causes the counter to roll
over to 0 during combo usecase.
To resolve this, change counter to unsigned int from single bit.
CRs-Fixed: 1086127
Change-Id: I2dd07bd967b7d4fb4878b6d65bd0f011c6b15bdd
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
Ensure that device pointer isn't NULL before using it in
kgsl_snapshot_save_frozen_objs().
Change-Id: I676dfa5567b1d09427e3e7691045fabc71b53d43
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Change of colocation group requires to finish CPU busy time accounting
prior to its operation by calling update_task_ravg(). However when
window statistics accounting is disabled, update_task_ravg() acts as
nop and results in incorrect CPU time accounting.
Disallow colocation group change while window statistics accounting is
disabled in order to prevent race between reset_all_window_stats() and
colocation grouping functions.
Change-Id: I6dfa20b8d8b0ae7ccc94119bf9cf14c5e11a1cf7
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
The bandwidth vote determines the bus throughput needed for a
given running UFS gear frequency. For high throughput use cases
the current interface speed based votes may not be sufficient to
achieve peak user level throughput, as it doesn't count for other
system level latencies in the data path. Hence vote higher but
making sure the system stays in nominal voltage corner.
Change-Id: I95cda7e33288df7099826b37c2f436c5a33792e8
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
For DMA pipes, bufer size is 0. This commit fixes a
division by 0 in kernel when connecting DMA pipes.
Change-Id: I11551594e5115e71aa116cc7238953205a4118c3
CRs-Fixed: 1085266
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Clients of VADC_HC and BTM include reading voltage phone
power, system thermistors for thermal mitigation such as
msm_therm, case_therm, XO therm. Round robin ADC (RRADC)
provides clients ability to read supported channels from
PMfalcon RRADC such as battery ID, battery thermistors,
DCIN and USBIN voltage and current. Add the supported VADC,
BTM and RR ADC channels for the msmfalcon platforms.
Change-Id: I1b8bf9762642e0af73d7ac7fa51c974b93fd4b31
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Add 352800Hz into pcm known rates to match with the sound
sample rate macro definitions.
CRs-Fixed: 1082850
Change-Id: Iedd78288f71ddcaa9fcb2f63bd3b73be2c0006dd
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
