Commit graph

568268 commits

Author SHA1 Message Date
Kuirong Wang
3ca62676db ARM: dts: msm: add spi-msm-codec-slave device
Add spi-msm-codec-slave device as a subnode of spi_0.

Change-Id: I0cafb8ffb684ce78a9dedcdba6e9ecae49e434f2
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
2016-03-23 21:12:27 -07:00
Phani Kumar Uppalapati
5371285772 ASoC: wcd9335: Clear TX HOLD for ANC input MUX'es
Clear TX HOLD when ANC is enabled and decimator
10 to 13 are selected.

Change-Id: I18c1ddeacc59c1ae7d88daf371c84140c0459693
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-03-23 21:12:26 -07:00
Phani Kumar Uppalapati
2f3bde0fa0 ASoC: wcd9335: Update low hifi and low power modes for headphones
Update register sequence for low hifi and low power modes
for headphones on wcd9335 codec to achieve better performance.

Change-Id: Icf543df7c4e8ab4cc9222a39bf1df4e6af4ab8ec
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-03-23 21:12:25 -07:00
Phani Kumar Uppalapati
b7f1874102 ASoC: wcd9335: Update HIFI mode sequence for headphones
Update HIFI mode register sequence for headphones on
wcd9335 codec for better performance.

Change-Id: I277a38847d02c4500cc3d2c77b00fbe4a63e2f83
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-03-23 21:12:24 -07:00
Yan He
0307f3529b msm: sps: add the checking of ZLT in case of an empty pipe
Check if a ZLT descriptor is the last pending descriptor in
the desc FIFO when determine if the desc FIFO of that pipe is
empty.

Change-Id: Ib8174953d6ad7d886f47f21e243e985b79ef41fb
Signed-off-by: Yan He <yanhe@codeaurora.org>
2016-03-23 21:12:23 -07:00
Veera Sundaram Sankaran
9d65c3021c msm: mdss: add ftraces to panel on and off
Add ftraces to dsi panel on and panel off to get better profiling
data during suspend and resume cases. This delay would be varying
depending upon the panel and so the data would be helpful in
isolating panel related delays.

Change-Id: I16ca90ee7968a57b4f56462b0a00a31a145524b5
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2016-03-23 21:12:23 -07:00
Olav Haugan
81df3cf70b staging: zram: Rate limit memory allocation errors
If an error occurs allocating memory for zram we will not be able to
fullfill the request to store the page in zram. The swap subsystem still
continues to try to swap out pages to zram even when this error occurs
since there is currently no facility to stop the swap subsystem from
swapping out during such errors. This can cause the system to be
overflowed with logging errors.

Reduce the amount of logging to prevent the kernel log from being filled
with these error messages

Change-Id: I54b920337749ece59d9ca78fa8b29345ec7b976b
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
2016-03-23 21:12:22 -07:00
Dhaval Patel
d722a1a4e9 msm: mdss: update secure display validation checks
Non-secure pipe should not be staged on MDSS when
secure display session is in progress. Client has
to unstage all pipes to disable the secure session
before pushing non-secure layers on MDP. This change
updates the validation checks to avoid such conditions.

Change-Id: I626c6c3a5ef313b1af8369884a9b10d8586f7251
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2016-03-23 21:12:21 -07:00
Tony Truong
fd84788e99 msm: pcie: mask Synopsys MSI for PCIe0 on mdmcalifornium
In order for the host to receive Synopsys MSIs from its endpoint,
the MSIs need to me masked in the PCIe global interrupt mask
register. Therefore, mask all Synopsys MSIs in PCIe bus driver.

Change-Id: I3afbe233e3298e98a27e7df59f325cf9969a0ee5
Signed-off-by: Tony Truong <truong@codeaurora.org>
2016-03-23 21:12:20 -07:00
Jayant Shekhar
e50765b455 msm: mdss: ensure ctl flush in case of fence timeout
In the current composition cycle, if the staging params are
not changed, then currently MDP flush register is not configured.
But due to any unforeseen reason if MDP fence timeout happens then
to handle it gracefully we stage border fill. In this regard as
the mixer config has now changed, then ctl flush has to be set.

Change-Id: I24b9cb28426f8829ac3bb36bfa32859b588d06fd
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
2016-03-23 21:12:19 -07:00
Anna Hanna Sedlak Grinbaum
6b565db34e ARM: dts: apq: Fix configuration of touchscreen on SBC8096
Fix touchscreen configuration:
 1) Change display and panel coordinates.
 2) Remove mapping of touchpad keys.
 3) Add support for firmware update.
 4) Fix I2C clock configuration to BLSP8.

Change-Id: If18bd0396143dc9f21a1b5591a65a547256d64d8
Signed-off-by: Anna Hanna Sedlak Grinbaum <asedla@codeaurora.org>
2016-03-23 21:12:18 -07:00
Arun Kumar Neelakantam
9188869e03 soc: qcom: glink: Add support for transport based logging
All Transports debug logs are captured in one logging context
which makes the debugging difficult and has a chance to miss
the important logs due to other high traffic transports like RPM.

Create separate logging context for each transports for better
debugging.

Change-Id: If2d00966a186dc48badc8a9a2e017eec6895dcad
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
2016-03-23 21:12:17 -07:00
Govind Singh
9e34c2bdf3 net: cnss: enable rome_vreg_dsrc regulator for dsrc
rome_vreg_dsrc regulator is a fixed regulator and this regulator
is control by PMIC gpio4. This is being used as vdd supply for
the wlan DSRC module based on sdio interface. Enable rome_vreg_dsrc
voltage regulators to enable the power up support in CNSS SDIO
platform driver.

Change-Id: I7c6032b706d468cc57b5304a3627f526935fb3a3
Signed-off-by: Govind Singh <govinds@codeaurora.org>
2016-03-23 21:12:17 -07:00
Govind Singh
89d90cdddb net: Fix regulator_put for wlan_vreg
wlan_vreg is not freed in cnss_sdio_release_resource, free
wlan_vreg in cnss_sdio_release_resource.

Change-Id: I0b82a4eaf532eb0131d192f9a59184e4ea587cc8
Signed-off-by: Govind Singh <govinds@codeaurora.org>
2016-03-23 21:12:16 -07:00
Jayant Shekhar
8dac581141 msm: mdss: Correct max threshold bandwidth selection logic
Max threshold Bandwidth selection logic should be independent of
number of entries in max bandwidth limit DT property. Correct the
logic to make it independent.

Change-Id: I6510ad7095560b25bbada7c63c44ae88a6d955f1
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
2016-03-23 21:12:15 -07:00
Jayant Shekhar
27dabc15e9 msm: mdss: Generalize per pipe bw limit implementation
Currently per pipe bandwidth limit implementation takes
care of only HFLip and VFLip case. Make it generic such
that it takes care of Camera usecase as well.

Change-Id: I6642bdb0611aa973a7563df019bf2dcdd5e4e584
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
2016-03-23 21:12:14 -07:00
Girish S Ghongdemath
ccaec924ed drivers: cpuidle: msm: Use 64 bit type for sclk
'us' can overflow and can potentially cause unexpected wakeup.

Change it to uint64_t.

Change-Id: I943cbc9d62268ca073e388c287e3b180c0eaa8e3
Signed-off-by: Girish S Ghongdemath <girishsg@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
2016-03-23 21:12:13 -07:00
Amir Samuelov
9c49666264 defconfig: msmcortex: enable spcom driver for msmcobalt
Enable Secure Processor Communication (spcom) driver for msmcobalt.

Change-Id: I1196bc5495b08126adbcbdb7e4d7a65a4a08609b
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
2016-03-23 21:12:12 -07:00
Abhishek Kondaveeti
45d9709b69 msm: isp: Fix offline isp
1. Configure the pixel pattern properly
2. Issue reg update before fetch engine starts

Change-Id: Ie4cb3df883e6f2ad2f30512297a836fb012e949c
Signed-off-by: Abhishek Kondaveeti <akondave@codeaurora.org>
2016-03-23 21:12:11 -07:00
Amir Samuelov
09e5b18869 soc: qcom: add secure processor communication (spcom) driver
This driver supports communication with secure processor subsystem
over glink transport layer.
The communication is based on using shared memory and interrupts.
This driver exposes interface to both kernel and user space.

Change-Id: Iec5fc78c8370002643b549e43015c06b09d8ab8b
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
2016-03-23 21:12:11 -07:00
Pavan Anamula
876012215c mtd: nand_ids: Add Micron & Kingston NAND details
Add 2K + 64 Micron and 2K + 128 Kingston NAND parts.

Change-Id: I03928ea3a0a4b7bef86be087f5a315b88935b4e3
Signed-off-by: Pavan Anamula <pavana@codeaurora.org>
2016-03-23 21:12:10 -07:00
Jeevan Shriram
ed8ae25f2a cgroup: fix uninitialized usage of a variable
It is possible that 'root' variable is used uninitialized. This
change avoids usage of uninitialized usage of the variable.

Change-Id: I9a3bd941a23736cb003f209cf6dde84fd859e9e6
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
2016-03-23 21:12:09 -07:00
Jeevan Shriram
105850528e net: core: fix compilation warning for uninitialized variable
It is possible that the 'tail' variable is used without initialization.
This change fixes uninitialized variable usage.

Change-Id: Idbd7d52797af2eeffcece19249055d5099a7fdb1
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
2016-03-23 21:12:08 -07:00
Jeevan Shriram
70db50a9b2 net: ipv4: fix compilation warning for uninitialized variable
It is possible that the 'in' variable is used without
initialization. This change fixes uninitialized variable usage.

Change-Id: If26733110b29ec1c1150f1da50efa0c1ac6c2796
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
2016-03-23 21:12:07 -07:00
Naveen Ramaraj
7abd9a80d9 net: unix: Fix uninitialized warnings when building for ARCH=um
Fix compiler warnings for uninitialized variables.

Change-Id: I60571fbaef16f6c112b6e99f6e0bab46150fb241
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
2016-03-23 21:12:06 -07:00
Bhalchandra Gajare
be06d38f28 ASoC: wcd_cpe_services: Fix DRAM size for WCD9335
The DRAM size used for codec WCD9335 is incorrect, this is causing the
dumps to be wrong. Update the DRAM size for WCD9335 as per the memory
map.

CRs-fixed: 929517
Change-Id: Ie4815b4cedf429b0d7045b84381d945bde62d5ce
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
2016-03-23 21:12:05 -07:00
Bhalchandra Gajare
625bbd03d8 ASoC: wcd_cpe_core: Fix address and size for ramdumps
Since the underlying codec can have different memory map, it is possible
the starting offset and size for DRAM can be different as well. This
causes the collected dumps to be incorrect on some platforms. Fix the
ramdump collection to obtain DRAM offset and size from CPE services
which is aware of the codec being used.

CRs-fixed: 929517
Change-Id: I6a592d8f97da117d1e58154460cd0b8f3cbf62c7
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
2016-03-23 21:12:05 -07:00
Veera Sundaram Sankaran
c4254bcb19 msm: mdss: protect clk enable member with mdp lock
During irq_disable, mdp_lock is held and intr status is checked and
cleared if any. If a new irq is triggered from another CPU at the
same point, it would ideally be waiting on mdp_lock held by the other
CPU. And when the mdp_lock is released after clearing the irq, mdp_isr
is executed and at this point, clks might have been disabled. To avoid
it, protect the clk_ena variable with mdp_lock and also check for the
clk_ena status and skip irq handling when it is disabled.

Change-Id: Ic71d2b6f877ca3510a0d0fa593a8a0c17e93d8f3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2016-03-23 21:12:04 -07:00
Osvaldo Banuelos
6c8839e8b1 ARM: dts: msm: Program only L2 and L3 ACC SEL settings for msm8996
According to the latest hardware guidelines, only L2 and L3 cache
HMSS ACC settings need to be programmed based upon the level of
their voltage supplies. Update the apc0_pwrcl and apc1_perfcl mem_acc
regulator devices to adhere to this requirement.

Change-Id: I94032f6fbe5920a8d446c58c763afa29705e527a
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
2016-03-23 21:12:03 -07:00
Arun KS
1e492a56bc soc: qcom: Add in-rush current mitigation driver
On few recent targets APSS L2 memory is moved to APC domain which were
earlier on Mx domain. This can cause inrush current while bringing up
huge memories like modem and adsp.

To mitigate inrush current, bring up comparatively lesser memory in
size(for eg MDP memory) before bringing up huge memories like modem or
adsp. This way MDP memory introduce an intermediate load on MX rail.

During boot, gdsc driver will set MEM and PERIPHERAL bits. This driver
makes sure that dependent subsystems are powered up. Once done, call
gdsc_allow_clear_retention() API to allow retention of MDP memories.

Change-Id: I54011eb1b6cc38b2c33a67b8b9cc5eaadbd42c6a
Signed-off-by: Arun KS <arunks@codeaurora.org>
2016-03-23 21:12:02 -07:00
Sudheer Papothi
4bf1c7f330 soundwire: Disable ports in both banks after playback usecase
Soundwire hardware has two banks for configuring soundwire
slave ports. After playback is stopped, disable soundwire slave
ports in both banks to avoid any port collisions during the start
of next playback on other slave device.

Change-Id: I5cfd1d985a1ca5fd7b4020d7e14697642f207501
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
2016-03-23 21:12:01 -07:00
Sandeep Panda
ac94acf4a9 msm: mdss: handle proper configuration of DSI PHY GLBL control
In case of independent dual DSI configuration, the GLBL_TEST_CTRL
register for both the DSI PHY should be set to 1. This change adds
proper check to handle this case.

Change-Id: I6c16c1a359541ea0d3c5430a331f47b55e4bd8cc
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
2016-03-23 21:12:00 -07:00
Kuirong Wang
9e41f712a9 spi: spidev: add Qualcomm spi codec slave driver
Use spidev for Qualcomm spi codec driver.

Change-Id: I3f06963b011d43038917a29e505536e0b38456a7
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
2016-03-23 21:11:59 -07:00
Prasad Sodagudi
ef45790690 printk: Add all cpu notifiers under CONSOLE_FLUSH_ON_HOTPLUG flag
Add all cpu notifiers in CONSOLE_FLUSH_ON_HOTPLUG config
flag to avoid hotplug latencies and by default config
CONSOLE_FLUSH_ON_HOTPLUG flag is disabled.

Change-Id: I389f207d8faf84cfd4267d52213e40a47a43774d
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
2016-03-23 21:11:59 -07:00
Ingrid Gallardo
aae5800a7a msm: mdss: update the correct panel info for dfps clock method
Current code does not reflect the correct panel information
when user space request the panel info and fps data
after the fps update when using the clock method.
This change fixes the code, so further calls to get
the screen info have the correct panel data, as it
is done for vfp method already.

Change-Id: I2cae33cad02f43a9b887c8bdc55aca876e47a99a
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
2016-03-23 21:11:58 -07:00
Siddharth Zaveri
4fc3b982ec msm: adv7533: Set Switch GPIO based on flags
Set the GPIO based on the flag parsed from DTSI. To enable the
switch gpio set the flag and to disable set inverse of the flag.

Change-Id: Iddbe654f2cc6c7e2c5815798099f88d2154d76d5
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
2016-03-23 21:11:57 -07:00
Ujwal Patel
fa52907f13 msm: mdss: avoid missing ECG due to thread preemption
On smart panels, Early Clock Gating (ECG), is initiated when current
frame transfer is finished and no new frame update is queued. To track
these two different states, driver maintains the state machine
for HW transfer and SW's new frame update. Currently SW state machine is
cleared only after HW transfer has started. Now in normal scenarios SW
state should be cleared before HW is finished and if there is no new
frame update queued then ECG will be initiated. However due to CPU
scheduling, thread that needs to clear SW state got preempted. In the
meantime HW finished the transfer and updated its state machine in the
interrupt context. Since at this moment SW state wasn't cleared, ECG
was not initiated. Avoid this situation by clearing SW state before HW
transfer is started.

CRs-fixed: 941832
Change-Id: I44828c6077eb8729162127b521f4fd4add2e3bcb
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
2016-03-23 21:11:56 -07:00
Jeevan Shriram
830723857d ARM: dts: msm: Enable dynamic refresh for sharp WQXGA panel
This change enables clock update method as default for sharp
WQXGA panel for changing refresh rate of panel.

Change-Id: I08f1a4ee446318174824dbd26dcf9682dbabddc9
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
2016-03-23 21:11:55 -07:00
Jeevan Shriram
f04b3e457d msm: mdss: add support for dynamic refresh in clock update method
It is possible to change the refresh rate of the panel by
changing the byte clock and pixel clock to the required panel supported
frequency. This change adds support to program dynamic refresh
registers and trigger the dynamic refresh interrupt. Once the current
frame is done, hardware ensures that the change in clock frequency is
taken effect within the vertical blanking period.

Change-Id: I3a1e0eb478c34111e94f977088c20e9a50c4ef25
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
2016-03-23 21:11:54 -07:00
Ben Romberger
f72230df47 ASoC: msm: qdsp6v2: Enable AFE RTAC topology support
Populate the AFE topology for the RTAC
voice and device structures which allows
retrival of AFE topologies for RTAC
clients.

Change-Id: Ib47e6b04cdfe7146315a800a3f54f9932d54cadc
Signed-off-by: Ben Romberger <bromberg@codeaurora.org>
2016-03-23 21:11:53 -07:00
Dhaval Patel
0be39b8f3b msm: mdss: avoid vsync_handler update in lp2 power state
vsync_handler added in lp2 (doze_suspend) power
state enables the vsync on hardware. That can lead
to unclocked register access because device can go
in pm_suspend in this power state. This change blocks
the vsync_handler processing in lp2 power state.

Change-Id: I4386baa6bc2f8303928edade79108b4983f66f42
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2016-03-23 21:11:53 -07:00
Jayant Shekhar
8e923808c6 msm: mdss: update bandwidth limit changes
Expose the bandwidth limits and status of bandwidth
limit request to the userspace through sysfs entries.

Change-Id: I697138546689e8d9943c3e5ff47ae6a924b8ddfb
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
2016-03-23 21:11:52 -07:00
Deven Patel
9f1c58fa3a ASoC: wcd9335: Add I2S/I2C interface support for codec
WCD9335 can transport data to and from device through I2S and I2C.
Update the change to support I2S/I2C interface.

Change-Id: Ifdec293510adf685410a4fb6ef6a3e939c4ee04b
Signed-off-by: Deven Patel <cdevenp@codeaurora.org>
2016-03-23 21:11:51 -07:00
Siddhartha Agrawal
33b83ae59a ARM: dts: msm: Add support for NT35950 4k dsc cmd mode panel
Add support for NT35950 4K DSC command mode panel. This panel
support DSC with 3:1 compression ratio.

Crs-Fixed: 922330
Change-Id: I6b0c2913851ec948ae84931396276c929bf63b7f
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
2016-03-23 21:11:50 -07:00
Jordan Crouse
10ad380dc4 msm: kgsl: Add a macro to derive the device from the mmu structure
struct kgsl_mmu is a static member of struct kgsl_device so we can
use the usual container_of trick to get the device from a mmu
pointer rather than carry around an unneeded back reference.

Change-Id: Ic0dedbad7ff22e598b03d980dfbb738374ed5a7a
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-23 21:11:49 -07:00
Jordan Crouse
bdd0368ce0 msm: kgsl: Add macros to facilitate checking MMU and pagetable ops
The MMU code does most of its magic by way of device specific MMU
and pagetable functions.  Add macros to make it easier for developers
to verify that hooks exist before calling them.

Change-Id: Ic0dedbadf74682adebec1a973384e1d3bbf4f79e
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-23 21:11:48 -07:00
Jordan Crouse
6fce6a4e6f msm: kgsl: Skip a5xx_post_start if it isn't needed
a5xx_post_start() is currently only used for either an A530 workaround
OR preemption.  If neither are allocated then memory is allocated in
the ringbuffer for no reason and it confuses everybody.

Change-Id: Ic0dedbad7615ba0593da5eb701cc5943877883f4
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-03-23 21:11:47 -07:00
David Collins
9facb99df7 ARM: dts: msm: reduce VDD_GFX CPR max aging adjustment for msm8996v3
Reduce the VDD_GFX CPR max aging adjustment from 25 mV to 15 mV.
Aging characterization has shown that at most 15 mV of additional
supply voltage is required as the device ages.

Change-Id: Ia96ff89afea16df6bfae9471a65dbf1a421b3f45
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-03-23 21:11:47 -07:00
David Collins
bef14b0537 ARM: dts: msm: reduce VDD_APCC CPR max aging adjustment for msm8996v3
Reduce the VDD_APCC CPR max aging adjustment from 25 mV to 15 mV.
Aging characterization has shown that at most 15 mV of additional
supply voltage is required as the device ages.  Also lower the
open-loop adjustment for each corner by 10 mV (except for
apc1_vreg) for CPR revisions 3 - 7.  The open-loop voltage had
previously been increased by the 25 mV max aging adjustment
amount to ensure that there was room for the closed-loop voltage
to increase based upon aging.  The lower open-loop voltage allows
for LDO operation at a lower voltage which saves power in some
scenarios.

Change-Id: I9951fa60999673896c81447341b06d683dbcf285
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-03-23 21:11:46 -07:00
Dhaval Patel
e63ebb6911 msm: mdss: flush retire work before ctl_stop operation
The vsync_retire worker registers for vsync_handler and
removes it when client requests power_off. It may
possible that vsync_handler is removed from list
through two different contexts. One from worker thread
and other from ctl_stop_sub call. Such race condition
can lead to list corruption. Ideally, ov_off should
wait for retire worker flush before calling ctl_stop
to avoid such race condition.

Change-Id: I7d68d67d1fe1df07e568a5f40db745ce155d7d14
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2016-03-23 21:11:45 -07:00