The current GRO implementation relies on NET_RX to complete
processing or the max possible TCP segment size for it to flush the
GRO coalesced packets. This leads to coalescing a large number of
packets which translates to very few ACKs. Since the number of
ACKs are very few and delayed during the slow start phase (stretch
ACK's), we see that the initial throughput ramp up is slow compared
to normal RFC TCP where we send an ACK per two packets. Note that
there is no difference between GRO and non GRO after the max window
size is reached.
Add a mechanism within rmnet_data to force the flush of packets
every 10 micro seconds (experimentally determined) by default. This
is controlled by the module parameter "gro_flush_time" and can be
configured to any value less than a second. To disable this feature,
set this entry to 0.
This reduces the coalesce of packets which translates to increased
number of ACK's compared to normal GRO but lesser ACK's compared
to NO GRO. There is no increase in power for a day to day use case.
Note that this optimization is specific to TCP GRO path only.
Some useful stats below for TCP DL at 400Mbps -
|TCP GRO Default | TCP GRO flush timer 10us
==================================================================
iperf 1st second tput | 300Mbps | 330Mbps
coalesce ratio | 15 | 4.5
CRs-Fixed: 961186
Change-Id: Ie8d76c493d61f3f4c256dbaa0378b22a361eed49
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
In order to guarantee stable operation some parts may require
elevated voltages when operating at LowSVS or SVS corners. Thus,
increase the VDD_APC0 and VDD_APC1 CPR ceiling voltages for the
LowSVS and SVS corners to match the Nominal ceiling voltage.
Change-Id: I4e50943923aabae104c8d2c8f512b28693132bbb
CRs-Fixed: 1008621
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Dynamic OT is applied before rotator operation to control QoS.
Since REGDMA cannot access QoS registers directly, rotator
driver needs to wait for rotator idle before changing any
OT settings. Once new OT is applied, REGDMA can resume
queueing until OT changes again.
CRs-Fixed: 989206
Change-Id: I2fd07a957b0d8414c855fafcff7a2613695efff0
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
This patch upgrades v4l2 rotator driver to be compatible with the
latest v4l2 framework.
CRs-Fixed: 972831
Change-Id: Iddbaaceaeba6cee5c7935077f4a92a0361fa8c75
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
Actual CPU's min and max frequencies can be limited by hardware
components while governor's not aware of. Provide an API for them to
notify for scheduler to be able to notice accurate currently
operating frequency boundaries which helps better task placement
decision.
CRs-fixed: 1006303
Change-Id: I608f5fa8b0baff8d9e998731dcddec59c9073d20
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
At present scheduler calculates task's demand with the task's execution
time weighted over CPU frequency. The CPU frequency is given by
governor's CPU frequency transition notification. Such notification
may not be available.
Provide an API for CPU clock driver to register callback functions so
in order for scheduler to access CPU's cycle counter to estimate CPU's
frequency without notification. At time point scheduler assumes the
cycle counter increases always even when cluster is idle which might
not be true. This will be fixed by subsequent change for more accurate
I/O wait time accounting.
CRs-fixed: 1006303
Change-Id: I93b187efd7bc225db80da0184683694f5ab99738
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
dm_crypt required to support full disk encryption.
Change-Id: I990fb3317b4c19ad9b1c8c114a5bbc3faf208ff8
Signed-off-by: Harshal Trivedi <htrivedi@codeaurora.org>
The OSM device needs access to the APCS common register space
to configure the LMh RCG which serves as clock source to OSM.
Add this register space to the OSM device.
Change-Id: I493e711463e2458abe735d440f98fbc80b11c208
CRs-Fixed: 1007896
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
The OSM clock is sourced from the LMh RCG. Model this RCG so
that it can be configured properly to provide the OSM a 200 MHz
clock source.
Change-Id: Ib799e8c082977ac226d6bd31ffad8ca63597c0fc
CRs-Fixed: 1007896
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
As part of SSR logic, APPS cleans Q6 Filtering and Routing
tables so they point to empty tables.
At IPA3 connection cache is stored at IPA H/W so packets
may get rule hit at the cache and bypass the rules scan.
Flushing the cache is needed to ensure handling integrity.
CRs-Fixed: 1007738
Change-Id: I80e16f8cd449f6183810304bd92cc5f302125237
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
RPM added new railway resource types to vote for SSC_MX and SSC_CX. Use
these new resource types when consumers vote for ldoa4 and ldoa27.
"rwsm" - railway resource type for SSC_MX
"rwsc" - railway resource type for SSC_CX
CRs-Fixed: 1006168
Change-Id: Ic5d079d615d5b87abb7e1db6e345f77f6066a6ae
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
To support a higher GPU frequency on MSM8937 Pro target the CX rail
expects TURBO_HIGH voltage level. So changing CX max voltage level to
INT_MAX for voting purpose for mss and lpass subsystem.
Change-Id: Ic8278191a7352d1e0a339251dacd028ef5a02e95
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
There are certain occasions when a subsystem though already in STM
mode, sometimes its acknowledgment of ready to shutdown gets delayed
and meanwhile being sent and awaited for response of sysmon event on
simultaneous crash of another subsystem.
This scenario results in deadlock, adding and setting private state
of subsystem with offlining state before graceful shutdown so that
during any delay in acknowledgment no sysmon event should be sent
to the subsystem which is already down.
CRs-Fixed: 991688
Change-Id: I9841ddc88a114fa94aa93571ee27c8c2f7bf6d39
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Commit da4e4f18afe0 ("drivers/perf: arm_pmu: implement CPU_PM notifier")
added code in the arm perf infrastructure that allows the kernel to
save/restore perf counters whenever the CPU enters a low-power
state. The kernel saves/restores the counters for each active event
through the armpmu_{stop/start} ARM pmu API, so that the low-power state
enter/exit cycle is emulated through pmu start/stop operations for each
event in use.
However, calling armpmu_start() for each active event on power up
executes code that requires RCU locking (perf_event_update_userpage())
to be functional, so, given that the core may call the CPU_PM notifiers
while running the idle thread in an quiescent RCU state this is not
allowed as detected through the following splat when kernel is run with
CONFIG_PROVE_LOCKING enabled:
[ 49.293286]
[ 49.294761] ===============================
[ 49.298895] [ INFO: suspicious RCU usage. ]
[ 49.303031] 4.6.0-rc3+ #421 Not tainted
[ 49.306821] -------------------------------
[ 49.310956] include/linux/rcupdate.h:872 rcu_read_lock() used
illegally while idle!
[ 49.318530]
[ 49.318530] other info that might help us debug this:
[ 49.318530]
[ 49.326451]
[ 49.326451] RCU used illegally from idle CPU!
[ 49.326451] rcu_scheduler_active = 1, debug_locks = 0
[ 49.337209] RCU used illegally from extended quiescent state!
[ 49.342892] 2 locks held by swapper/2/0:
[ 49.346768] #0: (cpu_pm_notifier_lock){......}, at:
[<ffffff8008163c28>] cpu_pm_exit+0x18/0x80
[ 49.355492] #1: (rcu_read_lock){......}, at: [<ffffff800816dc38>]
perf_event_update_userpage+0x0/0x260
This patch wraps the armpmu_start() call (that indirectly calls
perf_event_update_userpage()) on CPU_PM notifier power state exit (or
failed entry) within the RCU_NONIDLE() macro so that the RCU subsystem
is made aware the calling cpu is not idle from an RCU perspective for
the armpmu_start() call duration, therefore fixing the issue.
Fixes: da4e4f18afe0 ("drivers/perf: arm_pmu: implement CPU_PM notifier")
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reported-by: James Morse <james.morse@arm.com>
Suggested-by: Kevin Hilman <khilman@baylibre.com>
Cc: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-commit: cbcc72e037b8a3eb1fad3c1ae22021df21c97a51
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: Ia96c64f56d9cb480a2f62ca6fc717d15da77e487
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Commit c6b90653f1f7 ("drivers/perf: arm_pmu: make info messages more
verbose") breaks booting on systems where the PMU is probed without
devicetree (e.g by inspecting the MIDR of the current CPU). In this case,
pdev->dev.of_node is NULL and we shouldn't try to access its ->fullname
field when printing probe error messages.
This patch fixes the probing code to use of_node_full_name, which safely
handles NULL nodes and removes the "Error %i" part of the string, since
it's not terribly useful.
Reported-by: Guenter Roeck <private@roeck-us.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: 357b565d5d52b2dc2a51390eb8f887a9caa8597f
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: I446e06972d714f7a405ff8c264d7851958e69484
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
When a CPU is suspended (either through suspend-to-RAM or CPUidle),
its PMU registers content can be lost, which means that counters
registers values that were initialized on power down entry have to be
reprogrammed on power-up to make sure the counters set-up is preserved
(ie on power-up registers take the reset values on Cold or Warm reset,
which can be architecturally UNKNOWN).
To guarantee seamless profiling conditions across a core power down
this patch adds a CPU PM notifier to ARM pmus, that upon CPU PM
entry/exit from low-power states saves/restores the pmu registers
set-up (by using the ARM perf API), so that the power-down/up cycle does
not affect the perf behaviour (apart from a black-out period between
power-up/down CPU PM notifications that is unavoidable).
Cc: Will Deacon <will.deacon@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: da4e4f18afe0f3729d68f3785c5802f786d36e34
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: I2901cd11e3832ef671581ac6e4f0e3edce630e6d
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
On a big.LITTLE system e.g. with Cortex A57 and A53 in case not all cores
are online at PMU probe time we might get
hw perfevents: failed to probe PMU!
hw perfevents: failed to register PMU devices!
making it unclear which cores failed, here.
Add the device tree full name which failed and the error value resulting
in a more verbose and helpful message like
hw perfevents: /soc/pmu_a53: failed to probe PMU! Error -6
hw perfevents: /soc/pmu_a53: failed to register PMU devices! Error -6
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: c6b90653f1f7ea383734f8ce9e8df285a0c23f5b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: I6d250a614d26dbb218f1f2e4ee087db41e8202a7
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
ARMv7 counters other than the CPU cycle counter only work if the Secure
Debug Enable Register (SDER) SUNIDEN bit is set.
Since access to the SDER is only possible in secure state, it will
only be done if the device tree property "secure-reg-access" is set.
Without this:
Performance counter stats for 'sleep 1':
14606094 cycles # 0.000 GHz
0 instructions # 0.00 insns per cycle
After applying:
Performance counter stats for 'sleep 1':
5843809 cycles
2566484 instructions # 0.44 insns per cycle
1.020144000 seconds time elapsed
Some platforms (eg i.MX53) may also need additional platform specific
setup.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Signed-off-by: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com>
Signed-off-by: George G. Davis <george_davis@mentor.com>
[will: add warning if property is found on arm64]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: 8d1a0ae724ad74ef7946a45e3b2d3e01f39df02b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: Ic946deff2433ada458eb8040ddf40615a0a80959
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Nothing outside of drivers/perf/arm_pmu.c should call armpmu_register
any more, so it no longer needs to be in include/linux/perf/arm_pmu.h.
Additionally, by folding it in to arm_pmu_device_probe we can allow
drivers to override struct pmu fields without getting blatted by the
armpmu code.
This patch folds armpmu_register into arm_pmu_device_probe. The logging
to the console is moved to after the PMU is successfully registered with
the core perf code.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Suggested-by: Will Deacon <will.deacon@arm.com>
Cc: Drew Richardson <drew.richardson@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: b916b785af99088916a122cb37de1bda3fa7f70e
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[jgebben@codeaurora.org: minor merge conflict in arm_pmu.h]
CRs-Fixed: 1008368
Change-Id: Ief4b49a866ec8b056b6552bbd1745be8f002a1da
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
This reverts commit 0e4ee435ac
("Perf: arm64: support hotplug and power collapse")
This change is being reverted so that it can be replaced
by equivalent functionality from upstream.
CRs-Fixed: 1008368
Change-Id: I464549b185625314a9f2844272bdce617ce988e4
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
This reverts commit 09e03e5113
("Perf: arm64: fix disable of pmu irq during hotplug")
This change is being reverted so that it can be replaced
by equivalent functionality from upstream.
CRs-Fixed: 1008368
Change-Id: Ie3140289f1f4dd2bdf0c3fdb315369d763d53b22
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
This reverts commit 6470f7956a
("Perf: arm64: restore registers after reset")
This change is being reverted so that it can be replaced
by equivalent functionality from upstream.
CRs-Fixed: 1008368
Change-Id: Ieaa6da68173aaf31c8a38bce64f1bc46bae957c4
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
This reverts commit 182eeb0c0d
("Perf: arm64: stop counters when going into hotplug")
This change is being reverted so that it can be replaced
by equivalent functionality from upstream.
CRs-Fixed: 1008368
Change-Id: Ibf007132366486ae70c1d919f32e933744a1721e
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
This reverts commit 38dccacd2b
("perf: replace cpu_up/down with device_online/offline")
This change is being reverted so that it can be replaced
by equivalent functionality from upstream.
CRs-Fixed: 1008368
Change-Id: Ic19addb342e20c6e87f7781a02bed4f0094e80c5
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Add handling for extended header packets going
to the DCI stream. Set new bit in feature mask
to signal support for extended headers over DCI.
CRs-Fixed: 998973
Change-Id: I8badb0aa9e6ff604d8d0b2a932df0ea5ef6a70f9
Signed-off-by: Chris Lew <clew@codeaurora.org>
Update copyright separately for this file so that the subsequent
change can be propagated without merge conflicts.
CRs-Fixed: 991792
Change-Id: Ib1af02d00e438f48619eacee291b1875671978e1
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
A crash is observed when a decrypted packet is processed in receive
path. get_rps_cpus() tries to dereference the skb->dev fields but it
appears that the device is freed from the poison pattern.
[<ffffffc000af58ec>] get_rps_cpu+0x94/0x2f0
[<ffffffc000af5f94>] netif_rx_internal+0x140/0x1cc
[<ffffffc000af6094>] netif_rx+0x74/0x94
[<ffffffc000bc0b6c>] xfrm_input+0x754/0x7d0
[<ffffffc000bc0bf8>] xfrm_input_resume+0x10/0x1c
[<ffffffc000ba6eb8>] esp_input_done+0x20/0x30
[<ffffffc0000b64c8>] process_one_work+0x244/0x3fc
[<ffffffc0000b7324>] worker_thread+0x2f8/0x418
[<ffffffc0000bb40c>] kthread+0xe0/0xec
-013|get_rps_cpu(
| dev = 0xFFFFFFC08B688000,
| skb = 0xFFFFFFC0C76AAC00 -> (
| dev = 0xFFFFFFC08B688000 -> (
| name =
"......................................................
| name_hlist = (next = 0xAAAAAAAAAAAAAAAA, pprev =
0xAAAAAAAAAAA
Following are the sequence of events observed -
- Encrypted packet in receive path from netdevice is queued
- Encrypted packet queued for decryption (asynchronous)
- Netdevice brought down and freed
- Packet is decrypted and returned through callback in esp_input_done
- Packet is queued again for process in network stack using netif_rx
Since the device appears to have been freed, the dereference of
skb->dev in get_rps_cpus() leads to an unhandled page fault
exception.
Fix this by holding on to device reference when queueing packets
asynchronously and releasing the reference on call back return.
v2: Make the change generic to xfrm as mentioned by Steffen and
update the title to xfrm
CRs-Fixed: 980550
Change-Id: I265259c5c79efef1d79f31c4f00c6557250434b1
Suggested-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Jerome Stanislaus <jeromes@codeaurora.org>
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Git-commit: 071d36bf21bcc837be00cea55bcef8d129e7f609
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
This patch addresses two issues
a) The original GSO patch had a condition to check
for padding on a non linear skb and the egress
device, but the device name was incorrect leading
to the check always failing. This patch eliminates
the need for the check completely.
b) It is possible that the last frag in a GSO frame
would not be size aligned to a word boundary. In
this and all cases involving a non linear skb
frame we should skip padding. The driver can
expect a non linear packet when Scatter Gather
feature is enabled on the device. This patch
does just that.
Change-Id: Ifea5b1ae26b154bb047044e4bc3ad579d0da7f6d
CRs-fixed: 990751
Acked-by: Ashwanth Goli <ashwanth@qti.qualcomm.com>
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Change the log level from high to medium when userspace calls an
unknown IOCTL on an rmnet data device. This log message is not
very useful and often causes log spam in the serial device
output which may occasionally lead to watchdog timeouts.
CRs-fixed: 1000453
Change-Id: I50e038d838eded30ee8304fefb2c13328eaf9683
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
GPIO35 belongs to the NORTH tlmm block. Fix the base address for
it.
CRs-Fixed: 1008481
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
Change-Id: I76d4c0366a090c4ef6d67df876231bdf50f6dbfa
PMIC bus arbiter v3 supports 512 SPMI peripherals. Add the v3 operators to
support this new arbiter version.
CRs-Fixed: 1001770
Change-Id: Ic36b8e3c01af2fde1827a53c8c52baed240c238e
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Currently, the physical addresses of the SPMI bus arbiter blocks are
mapped to the trimmed address range for each block. Map the entire block
instead.
CRs-Fixed: 1001768
Change-Id: I36f0bd69765d6e47fe76bbccc9550de7056f8640
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Timeout is redundant in qmi_register_ind_cb() and is delaying sending
notification ack back to service registry. Also fix a misleading log.
CRs-Fixed: 1006763
Change-Id: I586e34c542b8dccd6a3b9a50019b3d11b371f46f
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
The number macro blocks need to be set based on the intra refresh mode
else video hardware might see different values which leads to improper
output. Fix the issue by properly assigning the number of macro blocks
based on Intra Refresh mode.
Change-Id: I4830fd3af4cdeb6fcef5f34d5d8dd41d44a73b24
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
VFE hardware needs additional clocks, add them for the specified
chip.
CRs-Fixed: 987962
Change-Id: Ibb7f3477d5030bcb4ae3b28cda5afc612063b2b7
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Fix the offset of the sdc2_pull_ctrl register.
CRs-Fixed: 1006865
Change-Id: I549baca7a69ff777e1a30a95e695cbd530035858
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
Add an option to rwref locks that allow the lock functions
to spin when acquiring the lock. Change completion variable
to use waitqueues for sleep functionality.
Change rwref reference function calls to use locking functions
where code reads or writes the context state.
CRs-Fixed: 988266
Change-Id: Ib2908b2495b1b01a6a130033143a7da8e5c0c231
Signed-off-by: Chris Lew <clew@codeaurora.org>
Update the locking hierarchy to reflect the current and
future use-cases. This helps in avoiding deadlock due
to out-of-order locking scenario.
CRs-Fixed: 988266
Change-Id: Ib40da2ecd413e7712cacc9663394e725ebd64a0a
Signed-off-by: Chris Lew <clew@codeaurora.org>
Change the PMIC names to use PMCOBALT and PMICOBALT.
Change-Id: Ia2c9be4ec36f522968364ebb66190278cfbb9244
CRs-Fixed: 1007932
Signed-off-by: David Collins <collinsd@codeaurora.org>
After driver has received session_end_done from firmware,
it no longer needs to retain the session information, since
firmware has already cleaned up the session. If the driver
sends any further session command to firmware, there will
not be any valid response from firmware. Ensure this by cleaning
up the session as soon as session end is received.
CRs-Fixed: 993591
Change-Id: Ia7517c0e6beab1178d70b72b3f5c0b512b400bd8
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Venus firmware reports the crop dimensions for
each FBD in the extra data buffer. This change is
needed to support the new extra data type -
MSM_VIDC_EXTRADATA_OUTPUT_CROP.
CRs-Fixed: 999551
Change-Id: I3d1aa4a44701192e4bd85bdee29d6f2a49b9e5a7
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Calculate GSI ring length based on the input parameter to
setup pipe API.
Change-Id: I151400624f374262a955a04d211a96c43feb6d98
CRs-Fixed: 996292
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Use IPA driver IPC buffer for IPC logging for IPA USB.
CRs-Fixed: 1005492
Change-Id: If127a18f70cb13f98d8d5443e0c3b617d2601954
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Add IPC logging support for IPA resource Manager.
IPC logging will be stored in the same log buffer
as IPA IPC log.
CRs-Fixed: 1005492
Change-Id: Id2f1a32ee61e894fe78d5efcd76edded19becd0b
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Use IPA driver IPC buffer for IPC logging for IPAHAL.
CRs-Fixed: 1005492
Change-Id: Iee4f6e7b5da3ca27e9ef619bfb2bacc45970d3cc
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
for data path and other frequent log prints, IPA driver is
using a debugfs trigger to enable those.
This change is an optimization to allocate IPC resources only
when needed instead of on boot up.
CRs-Fixed: 1005492
Change-Id: I6e7ac15ea7256c18e4174de56adb532ab6c6b0d0
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Currently we're disabling clocks in the same order in which we enable
them, but some clocks have dependencies and ordering requirements so we
should actually be disabling them in reverse order. Do it.
CRs-Fixed: 1000848
Change-Id: Ie01df24b72a3247a24ab6fbd7a90ec8cfee7236f
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
