Commit graph

569123 commits

Author SHA1 Message Date
Mayank Rana
6f94e66266 usb: phy: qmp: Remove QMP PHY revision based initialization sequence
This change removes QMP PHY revision based initialization sequence
from QMP PHY driver. It also makes mandatory to get this sequence
from devicetree except if qcom,emulation is set.

Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-03-23 21:26:01 -07:00
Vikram Mulukutla
0a9cabdc2a soc: qcom: core_ctl: Add a tracing function
The core control module requires tracing capability. Export
a function that will allow new events to be added in an
extensible fashion without a compile-time dependency.

Change-Id: I807d1ec4a104d8289441512b61e5e26df291525b
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-23 21:26:00 -07:00
Pavankumar Kondeti
6c98c21f9e arm64: topology: Allow specifying the CPU efficiency from device tree
The efficiency of a CPU can vary across SoCs depending on the cache size,
bus interconnect frequencies etc. Allow specifying this from the device
tree. This value overrides the default values hardcoded in the efficiency
table.

Change-Id: Ie9ba69e11317e6eb6462630226355747d1def646
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
2016-03-23 21:25:59 -07:00
Srivatsa Vaddagiri
5796af4921 arm64: topology: Define arch_get_cpu_efficiency() API for scheduler
On a HMP system, scheduler needs to know efficiency factor
(instructions-per-cycle) for various cpus. This is so that scheduler
can estimate bandwidth consumption of tasks on each cpu, based on
their efficiency factor.

This patch defines arch_get_cpu_efficiency() API in ARM64
architecture.  It depends on hard-coded "efficiency" factor for
various cpu types (available in 'table_efficiency' data structure) and
device-tree providing information on cpu-type for every cpu.

Change-Id: Ied43ead650ab85b63c232bec14dde500cbcc0f7a
Signed-off-by: Srivatsa Vaddagiri <vatsa@codeaurora.org>
[joonwoop@codeaurora.org: s/SCHED_POWER/SCHED_CAPACITY/.]
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-23 21:25:58 -07:00
Mark Brown
1ada644087 arm64: topology: Tell the scheduler about the relative power of cores
In heterogeneous systems like big.LITTLE systems the scheduler will be
able to make better use of the available cores if we provide power numbers
to it indicating their relative performance. Do this by parsing the CPU
nodes in the DT.

This code currently has no effect as no information on the relative
performance of the cores is provided.

Change-Id: If025e959b523afa37e75d4c58578a7c5fea7e0b0
Signed-off-by: Mark Brown <broonie@linaro.org>
Patch-mainline: linux-arm-kernel 5/2/2014, 20:38
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
[joonwoop@codeaurora.org: s/SCHED_POWER/SCHED_CAPACITY/.
 fixed a trival conflict in init_cpu_topology().]
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-23 21:25:58 -07:00
Arun Menon
f840d28214 msm: media: Add msm_media_info header to uapi
Add snapshot for msm_media_info video header to
uapi folder. The header file is taken from msm-3.18
kernel at commit - d580948 .

Signed-off-by: Arun Menon <avmenon@codeaurora.org>
2016-03-23 21:25:57 -07:00
Venkat Gopalakrishnan
2f53a15b3e ARM: dts: msm: Drop ufs_variant for ufs controller on msmcobalt
This property is no longer used in 4.4 kernel, hence remove it.

Change-Id: I82dae3d9c230c9e6d71e4b286d5eba684d1511f8
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-03-23 21:25:56 -07:00
Jack Pham
95a8cca7d2 defconfig: arm64: msm: Set USB_GADGET_VBUS_DRAW=500
Set the default amount of current to draw over USB VBUS to 500mA.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:55 -07:00
Jack Pham
b885707413 usb: dwc3-msm: Simplify OTG_STATE_UNDEFINED handling
In commit 48924e2fe107 ("dwc3: Reset USB controller/PHY after psy
connect indication at bootup") the controller initialization path
was removed from dwc3_msm_probe() and is deferred to when actually
needed, which is when beginning peripheral or host mode. This was
to optimize for the HVDCP charger already-connected case in which
case we want to avoid performing controller initialization which
can disrupt D+/D- linestate.

As part of that change, the OTG_STATE_UNDEFINED state was made
to be the entry point for starting controller initialization.
However, apart from that, the handling is identical to B_IDLE_STATE,
and therefore could be consolidated. And now that charger driver
only notifies us when SDP or CDP types, but not when DCP/HVDCP are
connected, the code can be simplified by removing the duplicate code
between dwc3_initialize() and dwc3_msm_resume().

Change-Id: Ife749c864284864098bcbcbdbda096d05397c60e
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:54 -07:00
Jack Pham
40a697724b usb: dwc3-msm: Fix incorrect roles with multiple instances
dwc3_init_sm() uses a static boolean variable which does not
play nicely when multiple instances are in use. For instance
if one controller is configured in host-only mode, it would
set the sm_initialized flag and can force the second controller
to also see ID=0 and enter host mode even if it is a peripheral.

The false ID=0 is actually caused by the init sequence never
actually setting the initial inputs bit, so the state machine
simply sees it as unset and proceeds to the A_IDLE case. Fix this
by setting it to 1 to match the id_state=FLOAT during probe().

Furthermore, there is no longer any use case for the vbus_init
completion since the state machine should only be entered upon
event changes anyway. So removing that can allow us to get rid
of dwc3_init_sm() entirely. Also ensure that sm_work is
unconditionally flushed before processing the initial events.

CRs-Fixed: 974882
Change-Id: I48e361a622bffa62ab7fa4c8d2e6719e66b90076
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:53 -07:00
Jack Pham
7f5ffc4abd ARM: dts: msm: Add dpdm_supply reference to pmi8998_charger
On MSM8996 the PMI8998 charger requires the USB D+/D- to
be in floating state prior to performing charger detection.
Control of this is exposed by the QUSB PHY node and is
referenced by the charger as the dpdm-supply regulator.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:53 -07:00
Jack Pham
7dd9b0b575 ARM: dts: msm: Add extcon to usb3 node on msm8996
The primary USB device now requires an extcon reference
for cable connection notification. On MTP & CDP targets
this is provided by the PMI8994 charger device.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:52 -07:00
Jack Pham
b12e0db7bb power: qpnp-smbcharger: Replace DPF_DMF/DPR_DMR calls with regulator
The USB PHY no longer exports DP/DM control via power_supply.
Instead, use the regulator it exposes to replace the DPF_DMF
with regulator_enable() and DPR_DMR with regulator_disable().
All other operations (e.g. pulsing) are no-ops for now until
suitable replacements are available.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:51 -07:00
Jack Pham
f0a4dfdccc power: qpnp-smbcharger: Become the owner of usb_psy
The USB power_supply object should be maintained by the
charger driver. Since it is now removed from the USB
controller driver, create and register it here. Many
of the calls to set/get_property can be simplified since
there are equivalent state variables we have access to.
PROP_OTG can be removed entirely since that is now handled
by emitting an EXTCON_USB_HOST notification.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:50 -07:00
Jack Pham
ee53d51499 power: qpnp-smbcharger: Add extcon notifiers for USB
Allow charger to expose an extcon device which can emit
notification for USB and USB-HOST cable connection states.
The driver can correspondingly register interest in being
notified of these cable connection statuses.

This is intended to replace the power_supply_set_present()
and power_supply_set_usb_otg() mechanisms currently used.

Change-Id: I6c7cf971f59ac3f3075f5c8f13786306729f25a8
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:49 -07:00
Jack Pham
0e671048de usb: dwc3: msm: Remove usb power_supply
Now that we use extcon for USB and USB_HOST cable connection
notification, it is no longer required to provide the usb
power_supply object in order to receive set property
notifications. Going forward the usb_psy will be maintained
by the charger driver(s) instead.

Since supply type is now also hidden from this driver (i.e.
EXTCON_USB should only be emitted in the case of SDP or CDP)
handling of dedicated charger types can also be removed which
simplifies the code a bit.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:48 -07:00
Jack Pham
55b75e7aa8 usb: dwc3: msm: add extcon support
Add extcon listeners for EXTCON_USB and EXTCON_USB_HOST cable
types to be notified of VBUS and ID notifications respectively.
Upon notification this will start the controller in either
peripheral or host mode.

This replaces the handling previously done in the power_supply
set_property() callback for PROP_PRESENT and PROP_USB_OTG. The
usb_psy will be removed in its entirety following this patch.

Change-Id: I22405a0a8da21b4c373895500d8dc4c91d97bc51
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:47 -07:00
Jack Pham
c8b93defae defconfig: arm64: msm: Enable EXTCON
Enable the EXTCON framework driver. This is used to allow
drivers to notify other drivers about various cable connection
state. For example the charger driver can notifiy USB driver
when a cable is connected or removed.

Change-Id: I07d12466bfe0b951769ec7d86a15af2811dbc390
Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:47 -07:00
Jack Pham
1cd15196ad extcon: Don't register switch class if CONFIG_SWITCH is enabled
On downstream kernels CONFIG_SWITCH may still be enabled
providing the Android switch class functionality. Although
extcon was intended to be the spiritual successor, allow
them to coexist for now, at least until the client drivers
have all migrated.

Signed-off-by: Jack Pham <jackp@codeaurora.org>
2016-03-23 21:25:46 -07:00
Gilad Broner
05df40ec56 ARM: dts: msm: disable UFS LPM modes for MSMCOBALT RUMI
As RUMI platform uses QRBTC-V2 UFS PHY, we need to disable
various LPM modes so that UFS initialization is successful
due to hw limitations.

Change-Id: I7b7efc2fd6f01136a7f737d213e02e3aa078cbda
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
2016-03-23 21:25:45 -07:00
Gilad Broner
9fbeb1c910 ufs: qcom: add dts property to disable LPM modes
Since msmcobalt RUMI uses QRBTC-V2 UFS PHY, there are a few limitations
that must be applied in order to be able to initialize UFS:
1. UFS should remain in PWM-G1 1-Lane and never change its gear, as other
gears are not stable
2. hibern8 enter/exit should be bypassed
3. we should avoid any power change (as in runtime suspend/resume)

Add "qcom,disable-lpm" property to facilitate disabling of these.

Change-Id: I3f1801da1e2bf1ce8ce98f5ab08211683106ae8c
Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org>
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
2016-03-23 21:25:44 -07:00
Subhash Jadavani
3564520a5e scsi: ufs-qcom-ice: add support to print UFS ICE debug registers
We dump out the register information in case of UFS errors and
ICE debug registers are also generally needed to debug these errors.
This change calls into ICE driver's debug ops to print out the
ICE register dump in error scenarios.

CRs-Fixed: 960214
Change-Id: Ifed25208fab588985603bf418b4e77d90d13c440
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-03-23 21:25:43 -07:00
Subhash Jadavani
cd30513be1 scsi: ufs: issue link starup 2 times if device isn't active
If we issue the link startup to the device while its UniPro state is
LinkDown (and device state is sleep/power-down) then link startup
will not move the device state to Active. Device will only move to
active state if the link starup is issued when its UniPro state is
LinkUp. So in this case, we would have to issue the link startup 2
times to make sure that device moves to active state.

CRs-Fixed: 967639
Change-Id: I140560308262b9d5c184b9cac8d530fb384816d4
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-03-23 21:25:42 -07:00
Subhash Jadavani
90e9396422 scsi: ufs: fix deadlock between clock scaling and clock ungating work
There's a deadlock between clock scaling and clock ungating work if hibern8
exit fails while ungating clocks.

ufshcd_exec_dev_cmd() in clock ungating work blocks at taking
"clk_scaling_lock" unless clock scaling work completes which had taken
"clock_scaling_lock" and it will never be released hence this is a
deadlock.

Clock ungating context:
----------------------
-000|__switch_to()
-001|context_switch(inline)
-001|__schedule()
-002|schedule()
-003|rwsem_down_read_failed()
-004|down_read()
-005|ufshcd_get_dev_cmd_tag(inline)
-005|ufshcd_exec_dev_cmd()
-006|ufshcd_verify_dev_init()
-007|ufshcd_probe_hba()
-008|ufshcd_host_reset_and_restore()
-009|ufshcd_link_recovery()
-010|ufshcd_uic_hibern8_exit()
-011|ufshcd_ungate_work()
-012|static_key_count(inline)
-012|static_key_false(inline)
-012|trace_workqueue_execute_end(inline)
-012|process_one_work()
-013|process_scheduled_works(inline)
-013|worker_thread()
-014|kthread()
-015|ret_from_fork(asm)
 -->|exception
-016|NSX:0xF0440E59300(asm)
 ---|end of frame

Clock scaling context:
----------------------
-000|__switch_to()
-001|context_switch(inline)
-001|__schedule()
-002|schedule()
-003|schedule_timeout()
-004|do_wait_for_common(inline)
-004|__wait_for_common(inline)
-004|wait_for_common()
-005|wait_for_completion()
-006|flush_work()
-007|ufshcd_hold()
-008|ufshcd_hold_all()
-009|ufshcd_wait_for_doorbell_clr()
-010|ufshcd_clock_scaling_prepare(inline)
-010|ufshcd_devfreq_scale()
-011|ufshcd_devfreq_target()
-012|update_devfreq()
-013|devfreq_monitor()
-014|static_key_count(inline)
-014|static_key_false(inline)
-014|trace_workqueue_execute_end(inline)
-014|process_one_work()
-015|worker_thread()
-016|kthread()
-017|ret_from_fork(asm)
 -->|exception
-018|NSR:0x2A714C(asm)
---|end of frame

This change is fixing this by moving ufshcd_hold_all() in
ufshcd_devfreq_scale() to the beginning of the function so that
clk_scaling_lock is acquired only after clock ungating completes.

CRs-Fixed: 963407
Change-Id: I83788c3212baeab31cf1bf877ca0aaf9005ca661
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
2016-03-23 21:25:42 -07:00
Patrick Daly
fb86dfdbb0 defconfig: Add iommu tests for msmcolbalt
Create the iommu debugfs files.

Change-Id: I6787adc24f6b155fa1cb71a97d8e191cc22a3061
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-23 21:25:41 -07:00
Patrick Daly
23daa77f24 iommu/arm-smmu: Fix a Null pointer dereference
Introduced by 99afd0531465fdaa95aaf5d0a9b73f7669d0f9c7.
"iommu/arm-smmu: Be explicit about security mechanism"

Internal error: Oops: 96000006 [#1] PREEMPT SMP
[<ffffffc0009f37d0>] arm_smmu_is_master_side_secure+0x14/0x28
[<ffffffc0009f029c>] io_pgtable_free_pages_exact+0x30/0x94
[<ffffffc0009f0388>] __arm_lpae_free_pgtable+0x88/0xf0
[<ffffffc0009f03e4>] __arm_lpae_free_pgtable+0xe4/0xf0
[<ffffffc0009f0410>] arm_lpae_free_pgtable+0x20/0x38
[<ffffffc0009f01cc>] free_io_pgtable_ops+0x24/0x30
[<ffffffc0009f4ce8>] arm_smmu_domain_destroy+0x1c/0xa8
[<ffffffc0009ed0cc>] iommu_domain_free+0x1c/0x34
[<ffffffc0009f35c4>] iommu_debug_device_profiling+0x660/0x6a4
[<ffffffc0009f361c>] iommu_debug_secure_profiling_show+0x14/0x24
[<ffffffc0001c4a2c>] seq_read+0x180/0x3b0

Found when running:
cat /sys/kernel/debug/iommu/tests/client_name/secure_profiling

Add a new smmu_domain variable to track whether the domain belongs to a
master-side or slave-side secure context.

Change-Id: Ib32cc6fb03f863522de10e416007114c6e91776f
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-23 21:25:40 -07:00
Susheel Khiani
2d6a28e2e3 iommu/arm-smmu: Check for static-cb option before requesting TZ
We want to request TZ to change page table format
for non secure context banks only if static-cb
option is enabled. If the option is disabled then
programming of global registers would be done by
HLOS itself and we need not request TZ to change
page table format.

Change-Id: Id2228e6d2ec835e169d679296760256ce0524050
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-03-23 21:25:39 -07:00
Susheel Khiani
20a5dc1e2f iommu/arm-smmu: Request TZ to change page table format to V8L
For targets where we have slave side protection,
global register programming is handled by TZ. And
since it supports V7S page table format only, by
default TZ programs all context bank to permit
V7S format by programming VA64 bit of CBA2R register
as 0.

But if context bank itself is non secure then its
page tables are managed by HLOS where we can
support V8L page table format. So, provide a way
to request TZ to change page table format to V8L
for non secure context banks.

CRs-Fixed: 959535
Change-Id: I1f4d4b98c4f240a8351f791901abdfa78b829973
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-03-23 21:25:38 -07:00
Susheel Khiani
8b39a23e0c iommu/arm-smmu: Add explicit restore_sec_cfg call at SMMU probe
restore_sec_cfg call needs to be made to inform
secure world that device have resumed from power
collapse mode and security settings need to be
relaxed. Accordingly we had a restore_sec_cfg
call in arm_smmu_resume which would be called
from regulator_notifier on regulator enable
event.

But during initial device probe also we need to
read through SMMU global registers like IDR0,
IDR1 to understand hardware configuration of SMMU
and accordingly populate our data structures. We
can't call arm_smmu_resume at this point as we
are still to identify page size of SMMU register
map which we get only through reading IDR1
register.

So make an explicit restore_sec_cfg call at SMMU
probe which would enable us to read through
SMMU global registers. We need this call only
for targets which have slave side protection
mechanism.

CRs-Fixed: 959535
Change-Id: If4e53966edbf4e76a3d03f3a8684563f0ceac13d
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-03-23 21:25:37 -07:00
Susheel Khiani
a6fba6085d iommu/arm-smmu: Make atomic scm call in slave side protection mode
When we have SMMU halt/resume functionality
enabled we try to program MICRO_MMU_CTRL register
which is part of SMMU implementation defined
register space. Now targets which have slave side
protection mechanism, implementation defined
register space of SMMU is protected by XPUs along
with other SMMU global register space. As a result
we would get a fault if we directly try to program
MICRO_MMU_CTRL register.

Instead we request TZ through atomic scm call to
program this register for us. Since we have read only
permission available for these registers we need to
ensure that write operation is requested through TZ.

CRs-Fixed: 959535
Change-Id: Ie257553a25bb11785b69568d8eccbef91d8d18e0
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-03-23 21:25:36 -07:00
Susheel Khiani
84072b90d2 iommu/arm-smmu: Add support for slave side protection
For targets where we have no hypervisor, slave
side protection mechanism is used to provide
buffer protection. Add functionality to make
calls into TZ for mapping/unmapping of buffers.

CRs-Fixed: 959535
Change-Id: I3106a98370a70611f4670aaf1c0f95c9e758a87c
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-03-23 21:25:36 -07:00
Susheel Khiani
b3d402012c iommu/arm-smmu: add option to enable static context bank allocation
To implement slave side protection, programming of
global registers as well as secure context bank
registers is handed over to TZ. Now, instead of
dynamically allocating context banks, TZ allocates
CBs once in pre defined static manner during boot
and this allocation is maintained throughout the
life of system.

Add an option to enable use of this pre-defined
context bank allocation. We would be reading
through SMR and S2CR registers at run time
to identify CB allocated for a particular sid.

CRs-Fixed: 959535
Change-Id: I782470a2e4d2a66be17ed2b965ba52b7917592f6
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
2016-03-23 21:25:35 -07:00
Mitchel Humpherys
c4db2e1dec iommu/arm-smmu: Be explicit about security mechanism
Up until now, the arm-smmu driver has only supported one type of
security mechanism: master-side access control.  However, in the near
future it will be getting support for slave-side access control, at
which point saying a domain is "secure" will be ambiguous.  Make the
distinction explicit by renaming arm_smmu_is_domain_secure to
arm_smmu_is_master_side_secure.

CRs-Fixed: 959535
Change-Id: Ie9bc077fe60d0b97c744fdb5b3f553cc056df27f
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
2016-03-23 21:25:34 -07:00
Patrick Daly
d4d4f015fd defconfig: Add REMOTEQDSS
Enable the remoteqdss driver.

Change-Id: I1885bbe9aecd71dc4fee41fe74ba4a195bb36bbf
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-23 21:25:33 -07:00
Patrick Daly
8c1225d083 soc: qcom: remoteqdss: Update Kconfig and Makefile
Update MSM_REMOTEQDSS to QCOM_REMOTEQDSS per kernel upgrade guidelines.

Change-Id: I6abf84a27f7271181833d0112f1d795354ea7f0c
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
2016-03-23 21:25:32 -07:00
Skylar Chang
5a195b37db cne: Add reference count for Smart Wireless Interface Manager
Add the reference count for Smart Wireless Interface Manager to
know whether there are any process who still has the socket in
question in use or not.
Enable INET DIAG.
Redefine the TCP_FLAG as it gives compiling error when an enum is defined
by a function return.

Change-Id: I1aa9c810fec2e332048c9ef4199ec3f996bc3a75
Signed-off-by: Chinh Tran <chinht@codeaurora.org>
[chiaweic@codeaurora.org: resolve conflicts encountered with port to 4.4]
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-03-23 21:25:31 -07:00
Ameya Thakur
58446132b1 AndroidKernel.mk: Add support for multi kernel tree
We now support building Android in a build tree that contains
multiple kernels. The kernel version to be built is passed in
by the higher level makefiles.

Currently supported structure:
- legacy <Android Root>/kernel
- New <Android Root>/kernel/msm-*

Change-Id: Ibd6c03c019643adfbadc61e46a3dd760930028bb
Signed-off-by: Ameya Thakur <ameyat@codeaurora.org>
Signed-off-by: David Ng <dave@codeaurora.org>
2016-03-23 21:25:31 -07:00
Hanumath Prasad
8caa9abdb2 cpufreq: interactive: use mult_frac in sl_busy_to_laf
Currently the load argument is taken as unsigned long in
sl_busy_to_laf. In case of 32-bit kernels, the use of
unsigned long results in overflows since it is only 32-bits.
And so the cpu_load calculation is going wrong and most of
the times getting reported very low values. Hence use
mult_frac call to avoid overflows when the final result
is expected to be within 32-bits.

Change-Id: Ib9e8bf6e777cd07b141761fb14c80840563b4cd5
Signed-off-by: Hanumath Prasad <hpprasad@codeaurora.org>
2016-03-23 21:25:30 -07:00
Junjie Wu
3eb23fd73c cpufreq: interactive: Use load prediction provided by scheduler
With modification in scheduler, governor now gets predicted
instantaneous demand waiting to run in addition to demand from
previous window for each CPU. Make use of this information since
prediction from scheduler could be more accurate than just looking at
past few windows.

Governor calculates two frequencies during each sampling period: one based
on demand in previous sampling period (f_prev), and the other based on
prediction provided by scheduler (f_pred). Max of both will be selected
as final frequency. Hispeed related logic, including both frequency
selection and delay is ignored when prediction is enabled. If only
f_pred but not f_prev picked policy->max, max_freq_hysteresis period is
not started/extended. This is to reduce power cost of mis-prediction
if it happens.

One use case prediction could dramatically help is when a heavy task
wakes up after sleeping for a long time. With prediction, governor
could ramp up to frequency the task needs much faster than before.

To enable prediction, echo 1 to enable_prediction file in
cpufreq interactive sysfs directory.

Change-Id: I27396785886e43ea01c9000c651c8bd142172273
Suggested-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
2016-03-23 21:25:29 -07:00
Junjie Wu
1a76fe2389 cpufreq: interactive: Delay evaluation of notification by 1ms
Multiple migrations can happen together within short period if
scheduler is re-arranging a few tasks. In this case, it's only useful
to change frequency at the end of all migrations. Delay handling of
scheduler notification by 1ms.

Change-Id: I9ee7b1e93ce57c28919b5609c40dcde9bd14abed
Suggested-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
2016-03-23 21:25:28 -07:00
Junjie Wu
a81be05086 cpufreq: interactive: Use wake_up_process_no_notif to wake up tasks
Scheduler could send a notification to governor each time a task wakes
up. If governor wakes up another task as a response to such a
notification, it could result in endless recursive notifications.

Use wake_up_process_no_notif to ensure scheduler won't send another
notification for speedchange task woken up by the governor.

Change-Id: I697affcbdf79e2ad0cfe843eb880d304960682f4
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
2016-03-23 21:25:27 -07:00
Mayank Rana
56c4d59fc8 USB: Fix checker warning and errors
This change fixes checker reported warning and errors messages.

Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-03-23 21:25:26 -07:00
Mayank Rana
f845a7f24a USB: Add USB BAM2BAM related function drivers and relevant glue drivers
This change adds MSM specific USB function drivers and relevant glue
drivers providing RMNET, RNDIS, DPL, ECM and MBIM functionality with
BAM2BAM IPA mode. This snapshot is taken as of msm-3.18 kernel
'commit 8007444c107a ("Merge pinctrl: qcom: Update gcc_gp1_clk_b_groups
for msm8953")'.

Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-03-23 21:25:25 -07:00
Joonwoo Park
375d7195fc sched: move out migration notification out of spinlock
The commit 5e16bbc2fb ("sched: Streamline the task migration locking
a little") hardened task migration locking and now __migrate_task() is
called after rq lock held.  Move out notification out of spinlock.

Change-Id: I553adcfe80d5c670f4ddf83438226fd5e0924fe8
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-23 21:25:25 -07:00
Joonwoo Park
d96fdc91d1 sched: fix compile failure with !CONFIG_SCHED_HMP
Fix various compilation failures when CONFIG_SCHED_HMP or
CONFIG_SCHED_INPUT isn't enabled.

Change-Id: I385dd37cfd778919f54f606bc13bebedd2fb5b9e
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-23 21:25:24 -07:00
Joonwoo Park
16ecb20600 sched: restrict sync wakee placement bias with waker's demand
Biasing sync wakee task towards waker CPU's cluster makes sense when the
waker's demand is high enough so the wakee also can take advantage
of high CPU frequency voted because of waker's load.  Placing sync wakee
on the low demand waker's CPU can lead placement imbalance which can
lead unnecessary migration.

Introduce a new tunable "sched_big_waker_task_load" that defines the big
waker so scheduler avoid wakee on waker's cluster bias when the waker's
load is below the tunable.

CRs-fixed: 971295
Change-Id: I1550ede0a71ac8c9be74a7daabe164c6a269a3fb
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
[joonwoop@codeaurora.org: fixed a minor conflict in
 include/linux/sched/sysctl.h.]
2016-03-23 21:25:23 -07:00
Joonwoo Park
616e04a51c sched: add preference for waker cluster CPU in wakee task placement
If sync wakee task's demand is small it's worth to place the wakee task
on waker's cluster for better performance in the sense that waker and
wakee are corelated so the wakee should take advantage of waker cluster's
frequency which is voted by the waker along with cache locality benefit.
While biasing towards the waker's cluster we want to avoid the waker CPU
as much as possible as placing the wakee on the waker's CPU can make the
waker got preempted and migrated by load balancer.

Introduce a new tunable 'sched_small_wakee_task_load' that differentiates
eligible small wakee task and place the small wakee tasks on the waker's
cluster.

CRs-fixed: 971295
Change-Id: I96897d9a72a6f63dca4986d9219c2058cd5a7916
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
[joonwoop@codeaurora.org: fixed a minor conflict in
 include/linux/sched/sysctl.h.]
2016-03-23 21:25:22 -07:00
Olav Haugan
b29f9a7a84 sched/core: Add protection against null-pointer dereference
p->grp is being accessed outside of lock which can cause null-pointer
dereference. Fix this and also add rcu critical section around access
of this data structure.

CRs-fixed: 985379
Change-Id: Ic82de6ae2821845d704f0ec18046cc6a24f98e39
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
[joonwoop@codeaurora.org: fixed conflict in init_new_task_load().]
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-23 21:25:21 -07:00
Joonwoo Park
615b6f6221 sched: allow select_prev_cpu_us to be set to values greater than 100us
At present sched_select_prev_cpu_us tunable is restricted to values
below 100us.  Fix this unintended restriction.

CRs-Fixed: 972237
Change-Id: I5eaf9f40468805c396328ca1022baef32acf8de0
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-23 21:25:20 -07:00
Pavankumar Kondeti
fbeb32ce8f sched: clean up idle task's mark_start restoring in init_idle()
The idle task's mark_start can get updated even without the CPU being
online. Hence the mark_start is restored when the CPU is coming online.

The idle task's mark_start is reset in init_idle()->__sched_fork()->
init_new_task_load(). The original mark_start is saved and restored
later. This can be avoided by moving init_new_task_load() to
wake_up_new_task(), which never gets called for an idle task.

We only care about idle task's ravg.mark_start and not initializing
the other fields of ravg struct will not have any side effects.

This clean up allows the subsequent patches to drop the rq->lock
while calling __sched_fork() in init_idle().

CRs-Fixed: 965873
Change-Id: I41de6d69944d7d44b9c4d11b2d97ad01bd8fe96d
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
[joonwoop@codeaurora.org: fixed a minor conflict in core.c.  omitted
 changes for CONFIG_SCHED_QHMP.]
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-03-23 21:25:19 -07:00