Add SOC_REPORTING_READY property which indicates when the SOC
reporting is ready from FG driver. This can be read by healthd
daemon during its start.
Change-Id: I415e322e99bacd61c4e9ac921643d87d3eec4b3e
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Add SOC_REORTING_READY property to indicate if the SOC is ready
to be reported.
Change-Id: I53ac153ba9f7ae81bb0657b17e0e798fd3fe4f48
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Abort any read() operation to unlock the channel mutex.
On channel remote-disconnect notification, the local side should close
the channel.
However, open()/close()/read()/write() operations locks the channel mutex.
The glink rx-abort notification happens only after the remote-disconnect
notification, not as originally expected.
Change-Id: I77f8e6de6f1b5c447a3516380c51db9c7129d2f3
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
This patch enables allocation of 5MB for new diag client
of memshare.
CRs-Fixed: 1100632
Change-Id: Iab69062336966e61683117a17974f46cd8f513aa
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
During system wakeup from suspend by connecting USB cable,
runtime PM framework transitions from enabled to disabled
state during i2c transaction. This causes asymmetric increment
and decrement of device's usage counter which blocks runtime
PM suspend callback.
To avoid this, remove rumtime PM status check on suspend path
to make it symmetric with the resume path. This takes care
of unaccounted increment/decrement of device's usage counter.
Change-Id: I47cfe2cd7d93ba5db57365cf250c600dac22bab1
Signed-off-by: Shrey Vijay <shreyv@codeaurora.org>
Configure the button under the display panel as
a home key for QRD8998HB.
CRs-Fixed: 1103939
Change-Id: I03e4a8e10452ef53d8e35e7cee44bdf51f53483b
Signed-off-by: Jin Fu <jinf@codeaurora.org>
The commit 04a0136aeea5 ("clk: introduce CLK_ENABLE_HAND_OFF flag")
assumes that the first time clock client calls a clk_prepare &
clk_enable, the clocks from that point of time could be on their own.
But there could be use cases which could have impacts due to this
handling. Moving the handoff counts for prepare and enable at unused
tree level.
Change-Id: I7d527571c2eb4d53d58d82126989bd673de12e2d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Some clocks are critical to system operation (e.g. cpu, memory, etc) and
should not be gated until a driver that knows best claims such a clock
and expressly gates that clock through the normal clk.h api.
The typical way to handle this is for the clk driver or some other early
code to call clk_prepare_enable on this important clock as soon as it is
registered and before the clk_disable_unused garbage collector kicks in.
This patch introduces a formal way to handle this scenario that is
provided by the clk framework. Clk driver authors can set the
CLK_ENABLE_HAND_OFF flag in their clk data, which will cause the clk to
be enabled in clk_register(). Then when the first clk consumer driver
comes along and calls clk_get() & clk_prepare_enable(), the reference
counts taken during clk registration are transfered (or handed off) to
the clk consumer.
At this point handling the clk is the same as any other clock which as
not set the new CLK_ENABLE_HAND_OFF flag. In fact no changes to any
clock consumer driver are needed for this to work.
Change-Id: Ib5247f6bceb1f555c03103f061af089755b2de62
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Patch-mainline: patchwork.kernel.org @ 02/11/16, 9:19
Signed-off-by: Taniya Das <tdas@codeaurora.org>
CPU OSM clock is required to be enabled for cpu to be able to scale
frequencies for the CPU.
Change-Id: I5680dc5333c9664e1316c29a91e29231f15eb4f1
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Update WLED configuration to enable HVG_PULL_SWITCH bit to
temporarily pull up Hvgate with larger switch(for pm2falcon)
and enable DEBOUNCE_BYPASS_ILIM bit to remove debouncing for
Ilim. This guarantee stable operation of WLED.
CRs-Fixed: 1102641
Change-Id: I39a1266f4158e71238f374b6cba49e1a8c2b1a3b
Signed-off-by: ansharma <ansharma@codeaurora.org>
Following list of changes have been made
- Update the clock osm to register to common clock framework
- Update clock ops as per common clock framework
- cleanup unused function (clk_osm_setup_osm_was)
- Fix tabs for macro definitions
- Add clocks ids for power and perf clock for clients
Change-Id: I389cc9e93a26a434be752cf74444d6c0985ff36d
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Set ship mode in qpnp_pon_system_pwr_off() API if it has been requested
previously.
CRs-Fixed: 1092969
Change-Id: I6e315eec256f01c143ffc8b463279f2b30e64610
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Upon out of XO shutdown due to remote wakeup, as soon as XO gets
restored refclk is supplied to phy before even refgen current
is stabilized. USB3 controller asserts suspend_n signal asynchronously
for remote wake-up scenario solely based on utmi_linestate switching
from J state(suspend) to K state(resume). As a result phy attempts to
lock PLL since all prerequisites are met but, PLL lock attempt fails
and phy gets stuck. Since GCC_RX1_USB2_CLKREF_EN which was supposed to
control differential(CML) clock output to QUSB2 is a no-op, hence switch
to SE clock by PHY CSR controlled mux upon suspend. This prevents refclk
output to go directly to phy upon XO restore and prevents premature phy
pll locking. Phy PLL actually gets locked when phy driver switches back
from SE clk to diff clk.
Change-Id: Ie5474c42ccdd88df4c101b2113ca8d924eddf037
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Remove the additional unbalanced unlock being called for the
link training mutex. This fixes random crashes seen while
running Display Port connection/disconnection tests.
Change-Id: I2fce80cec72e3bd8b1561fd46fa1a1520cddd294
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
If the calculated link rate based on sink's capabilities exceeds
the maximum supported link rate, do not error out. Instead, cap
the link rate at the maximum supported rate. This fixes instability
issues seen when connecting to sinks at 4K resolution.
Change-Id: I214bb19385f855af61da628fdf1cf7efc5dd08d6
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add support for PHY compliance tests by parsing requests
from the reference sink and generating the requested
PHY test patterns from DP PHY.
CRs-Fixed: 1076516
Change-Id: I290ec786bbe5c45873265ea74290eefcd3d16cb1
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
