Increase the VDD_GFX CPR 710 MHz (Fmax) corner ceiling voltage
from 1024 mV to 1088 mV. This ensures that parts requiring
higher voltages operate correctly.
Also increase the aging reference voltage since it needs to
match the Fmax ceiling voltage.
Change-Id: I0799fe76c7a19d8fd97b6270b403b2994ea09a74
Signed-off-by: David Collins <collinsd@codeaurora.org>
Enable SCHED_AUTOGROUP which enables certain optimizations in the
scheduler for better performance.
Change-Id: Ib099531ed19715e88373d4aee2926205a8eaf9c6
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Add resource manager for retrieving the control paths and layer
mixers. Encoder and CRTC use this to get the hw driver contexts
for those blocks.
Change-Id: Id6789ef24616197a295bcb5687a0de659cc11e5d
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
Add mdp_top block support to hw layer, provides split pipe
control, and interface select. Use mdp_top from intf block
to program interface select.
Change-Id: I15f2070f7d552a6ec11bda0302f362e22ca6e84e
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: Krishna Srinivas Kundurthi <kskund@codeaurora.org>
Modify funnel configuration for modem etm and tpda.
Modify data width for submodules for sdm660.
CRs-fixed: 1111225
Change-Id: I27538435b2c89041ca6c0305eb1405cf75ed59af
Signed-off-by: Amey Telawane <ameyt@codeaurora.org>
Pass the proper VMID value during secure attach. This VMID is used by
the HYP/TZ to maintain the pagetables.
Change-Id: I3b7c27c079b044c9325bcbcb6fa4312e424f3a94
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
BLSP2 UART1 is used as transport for Bluetooth between sdm660 & wcn3990.
Enable it so that Bluetooth can be enabled on sdm660 CDP/MTP/QRD.
Change-Id: Ib5102a96d42213bbeb230f83806b10a397353df8
Signed-off-by: Rupesh Tatiya <rtatiya@codeaurora.org>
SDM660 target supports the bw monitor version 4 includes
the zone counts.
Enable the bw mon4 for the SDM660 target.
Change-Id: I0f8323c6bdc91d859456ddd8a70838cd8e71779c
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
Update cpufreq driver to adapt to opensource clock framework
Opensource clock framework dev_clk_get returns with the
different clock handle for all cpu cores with same clock source
This is different in the existing clock framework where
dev_clk_get returns with the same clock handle for the cores
which shares the same clock source.
Cpufreq driver was compatible with the existing clock
framework but with the opensource clock framework we need
to handle the different clock handles for all the cores
even the clock source is common.
Change-Id: Ic343bc20dc7c8b2ce151a5a2b5f85b43cdd949bf
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
Update vdd-current-level as per latest hardware documentation
and interrupt related properties of sdhc2 for sdm660 QRD.
CRs-Fixed: 1111072
Change-Id: Ica211d68a032d51ab313cce47d2b84137433f18c
Signed-off-by: xiaonian <xiaonian@codeaurora.org>