Commit graph

562925 commits

Author SHA1 Message Date
Karthikeyan Ramasubramanian
82e136e3fd soc: qcom: Add snapshot of SMD driver
This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01 12:22:28 -08:00
Karthikeyan Ramasubramanian
0e15f0e32b soc: qcom: Add snapshot of SMEM driver
This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01 12:22:28 -08:00
Karthikeyan Ramasubramanian
7569d9b420 include: Introduce required header files for SMEM driver
This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01 12:22:27 -08:00
Karthikeyan Ramasubramanian
e51783348f hwspinlock/msm: Add snapshot of remote_spinlock driver
This snapshot is taken as of msm-3.18 commit e70ad0cd (Promotion of
kernel.lnx.3.18-151201.)

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
2016-03-01 12:22:27 -08:00
Runmin Wang
ed8407419b defconfig: msm8996: enable RTB driver
enable RTB driver and Function_Tracer, disable Debug_FS

Change-Id: Icab1df530f320dc287d67a54844942797c2902c7
2016-03-01 12:22:26 -08:00
Rohit Vaswani
7614923a9c lib: iomap: Add MSM RTB support
The ioread* and the iowrite* functions and not inlined and hence
the RTB logs end up containing the ioread and iowrite functions
themselves and not the ones invoking them.

Add RTB support to the ioread*and iowrite* functions so that we can
get meaningful RTB logs.

Note that to avoid multiple RTB logs for ioread* and iowrite*
functions, read*_no_log and write*_no_log macros are added.

Change-Id: I2315d44c4dfbeee6be4a52f21bf4a20dd9508597
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: David Keitel <dkeitel@codeaurora.org>

Conflicts:
	arch/arm64/include/asm/io.h
2016-03-01 12:22:26 -08:00
Xiaogang Cui
01397cdaa2 msm: redefine __raw_{read, write}v for RTB
Redefine __raw_readv and __raw_writev for
RTB support.

Change-Id: Iae7b8e920abc4f23846690d3d1b3d1d933454788
Signed-off-by: Xiaogang Cui <xiaogang@codeaurora.org>
[abhimany: fix trivial merge conflict]
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>

Conflicts:
	arch/arm64/include/asm/io.h
2016-03-01 12:22:26 -08:00
Se Wang (Patrick) Oh
05635f8cd7 trace: rtb: disable RTB in the first panic notifier
As the priority of RTB panic notifier was zero, it was
not guaranteed to disable RTB right after kernel panic.
So RTB log buffer could be flooded with some I/O operations
after panic. By setting the priority of RTB panic notifier
to the highest value, make sure RTB is disabled right after
a kernel panic.

Change-Id: If9efc2ec31efa6aa17e92b2b01e81ab4df6d1730
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
2016-03-01 12:22:26 -08:00
Vignesh Radhakrishnan
7cc3dac353 msm: rtb: Add timestamp to rtb logging
RTB logging currently doesn't log the time
at which the logging was done. This can be
useful to compare with dmesg during debug.
The bytes for timestamp are taken by reducing
the sentinel array size to three from eleven
thus giving the extra 8 bytes to store time.
This maintains the size of the layout at 32.

Change-Id: Ifc7e4d2e89ed14d2a97467891ebefa9515983630
Signed-off-by: Vignesh Radhakrishnan <vigneshr@codeaurora.org>
2016-03-01 12:22:25 -08:00
Matt Wagantall
6a0fccbd29 trace: rtb: add msm_rtb register tracing feature snapshot
This snapshot is taken as of msm-3.10 commit:
 78c36fa0ef (Merge "msm: mdss: Prevent backlight update during
 continuous splash")

RTB support captures system events such as register writes to a
small uncached region. This is designed to aid in debugging, where
it may be useful to know the last events that occurred prior to a
device reset.

Change-Id: Idc51e618380f58a6803f40c47f2b3d29033b3196
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
[spjoshi@codeaurora.org: fix merge conflict]
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
2016-03-01 12:22:25 -08:00
Runmin Wang
f973afee85 defconfig: msm8996: enable memory dump v2 driver
Enable memory_dump_v2 driver

Change-Id: I41c2b31ca291a1db1f3ae7f7e324b0d267b480f8
2016-03-01 12:22:25 -08:00
Pratik Patel
8caa282df8 soc: qcom: memory_dump_v2: write 64-bit address to imem
Use memcpy_toio() to write 64-bit address to imem instead of
writel_relaxed which is causing truncation as its a 32-bit api.

Change-Id: I0c0922e1eeff72bacb788bd70e6381e9c1dcf7fd
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
2016-03-01 12:22:24 -08:00
Vikram Mulukutla
790f2f0864 soc: qcom: memory_dump_v2: Fixup core debug unlock and support ARMv8 scm
Use the right command ID for the core-debug-unlock scm_call
and add support for the new scm_call2 API. This new API
is more aligned to the ARMv8 SMC calling convention.

Change-Id: Ida76f2dc5ea67066e49ffe1e0e04c2056134f381
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-01 12:22:24 -08:00
Andy Gross
c3733bfb6e soc: qcom: Add snapshot of MEMORY DUMP
This is a snapshot of the memory_dump driver as of msm-3.10
commit:

acdce027751d5a7488b283f0ce3111f873a5816d (Merge "defconfig: arm64: Enable
ONESHOT_SYNC for msm8994")

Change-Id: I296a57ab1c491b29911413fdb4abb82fa15137c3
Signed-off-by: Andy Gross <agross@codeaurora.org>
[abhimany: resolve trivial merge conflicts]
Signed-off-by: Abhimanyu Kapur  <abhimany@codeaurora.org>
2016-03-01 12:22:24 -08:00
Runmin Wang
5ad2830ad5 defconfig: msm8996: enable watchdog_v2 driver
Enable watchdog_v2 driver.

Change-Id: I3d017e85da0d9cfddca73cbecf21da96f20d0e14
2016-03-01 12:22:24 -08:00
Runmin Wang
7a3ca9ebf9 defconfig: msm8996: enable SCM and SCM_XPU driver
Enable the scm and scm_xpu driver.

Change-Id: Ic35178a21f192930d0a2b675de72f38980d82b71
2016-03-01 12:22:23 -08:00
Matt Wagantall
ad0aa4184e soc: qcom: watchdog_v2: Increase timeout for forced bites (again)
The amount of time we wait for a reset following an attempted
forced watchdog bite was recently increased from 1ms to 2s. As
it turns out, this is not enough when certain debug features
(ex. cache dumping are enabled) as the secure software executing
in EL3 may take close to 10 seconds to complete collection of
dumps.  Therefore, increase the wait to 10s.

Change-Id: I98ae1bfa49eb236ca56b91dadb6c3a78ee962a74
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2016-03-01 12:22:23 -08:00
Stepan Moskovchenko
5acff0a6d4 soc: qcom: watchdog_v2: Increase timeout for forced bites
Though we configure the watchdog timeout to be only one
tick when deliberately trying to force a watchdog bite,
the watchdog bite interrupt may be processed asynchronously
by the secure environment on a different CPU. Therefore, we
need to increase the amount of time we spend waiting for
the watchdog bite to happen before falling back on other
reset methods, to avoid a race condition between the
fallback reset code and the secure environment itself.

Change-Id: I73de0abbf8cdd77f22374886f4a89b25743b86eb
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2016-03-01 12:22:23 -08:00
Sarangdhar Joshi
67dbe9f83b soc: qcom: watchdog_v2: add support to enable watchdog feature
Currently we disable Non secure watchdog during suspend and
re-enable it during resume. This leaves suspend / resume path
unprotected by Non secure watchdog. There is a feature in
hardware where watchdog freezes automatically when all online
cores are in suspend and unfreezes watchdog upon wakeup event
from low power mode. Set the bit in watchdog control register to
enable this feature and protect suspend / resume path by Non
secure watchdog.

Change-Id: Ibca425a661c74bd1d46513783780ea213a51f87f
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
2016-03-01 12:22:23 -08:00
Vikram Mulukutla
517bb8902a soc: qcom: watchdog_v2: Don't assume phys addresses can't exceed 4GB
Virtual and physical memory allocators may return buffers
that are at physical addresses higher than 4GB. When
passing addresses to TZ, don't assume otherwise. Fix the
code to not truncate down to 32 bits (the assignment operation
u64 = u32 = u64 truncates down 64 bit addresses to 32 bits)
unnecessarily; perform the assignment in two discrete steps
to allow the desc.args[X] field to store the full 64 bit
address.

Change-Id: I7f3139dee27f22c5b713ba8b6221bc3551699f32
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-01 12:22:22 -08:00
Vikram Mulukutla
5862870985 soc: qcom: watchdog_v2: Add support for the new scm_call2 API
The scm library has added support for a new secure world
interface that is more aligned to the ARMv8 SMC calling
convention. Use the new API while maintaining backward
compatibility.

Change-Id: Id5a75936f6c1881add09b3dc9b07abecbda694eb
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-01 12:22:22 -08:00
Andy Gross
25bfca71ad soc: qcom: Add snapshot of Qualcomm watchdog_v2 driver
This is a snapshot of the watchdog_v2 driver as of msm-3.10 commit

acdce027751d5a7488b283f0ce3111f873a5816d (Merge "defconfig: arm64:
Enable ONESHOT_SYNC for msm8994")

Change-Id: I8cd7a84e0cbb45c3ac20d4c84f5603ab5df1edae
Signed-off-by: Andy Gross <agross@codeaurora.org>
[abhimany: resolve trivial merge conflicts]
Signed-off-by: Abhimanyu Kapur  <abhimany@codeaurora.org>
2016-03-01 12:22:22 -08:00
Se Wang (Patrick) Oh
051df5bd9b soc: qcom: add kryo_e76 debugfs node
To disable and enable Kryo hardware errata 76 workaround at
runtime, expose a debugfs interface. Wrote codes using e74/e76
API and data as a starting point.

/sys/kernel/debug/scm_errata/kryo_e76
This allows Kryo errata 76 workaround to be toggled
off or on (on affected devices) by echoing 0 or 1 to the file.

Change-Id: I3d682021aa98eef5421ac2e7578da02f2ea98081
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
2016-03-01 12:22:21 -08:00
Mitchel Humpherys
32b29d83ff qcom: scm: Be careful with side-effects from is_scm_armv8
Currently, when deciding which version of scm call to make in scm_call2,
we check the scm_version variable.  However, the scm_version variable is
only initialized as a side-effect of calling is_scm_armv8, which isn't
called anywhere in scm_call2.  So if someone makes an scm_call2 before
is_scm_armv8 has been called then they could get the wrong scm version.
Fix this by calling is_scm_armv8 at the top of the scm_call2
function (and bailing out if it's not v8 since scm_call2 only supports
v8 forward).  Similarly for scm_call2_atomic.

Since is_scm_armv8 caches its result the performance overhead of calling
on every invocation of scm_call2 should be negligible.

Change-Id: I46d2423ae2e4b5204fc5eefa1c6660c3c95a95b0
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
2016-03-01 12:22:21 -08:00
Matt Wagantall
17b27dfb0e soc: qcom: add scm-errata driver
This driver exposes a debugfs interface intended for advanced
system debugging/profiling usecases where it may be desirable
to enable or disable certain hardware errata workarounds at
runtime, via an scm call.

Presently, a single debugfs node is implemented:
  /sys/kernel/debug/scm_errata/kryo_e74_e75
This allows Kryo errata 74 and 75 workarounds to be toggled
off or on (on affected devices) by echoing 0 or 1 to the file.

Change-Id: I6edf39757416130a7b716dcdab1a601f27dfac5a
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2016-03-01 12:22:21 -08:00
Matt Wagantall
99a2064db2 soc: qcom: scm-xpu: add support for XPU errors that are fatal by default
The existing scm-xpu implementation makes an unconditional scm
call at boot. The assumption was that such errors would be non-
fatal by default, and so a desired behavior could be achieved
by controlling whether the driver was compiled.

On recent targets like msm8996, XPU errors are treated as
fatal by default. To support cases where it may be desirable
to treat them as non-fatal, the driver must be changed to
make the appropriate scm call based on a new Kconfig choice.

Change-Id: Ibb55c062937f130c13538f049582575d9a6f52ad
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2016-03-01 12:22:21 -08:00
Matt Wagantall
1106cef201 soc: qcom: Add snapshot of scm-xpu driver from msm-3.10
This snapshot is taken as of msm-3.10 commit:
  e3a3f66e47 ("Merge "soc: qcom: pil-q6v5-mss: Do not free memory
  allocated to modem pil")

When compiled, the scm-xpu driver makes a single scm call at boot
to enable treatment of XPU errors as fatal.

Change-Id: Id33c2b73f4ed7ba8a07c5affebbe66eb5eba7951
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2016-03-01 12:22:20 -08:00
Se Wang (Patrick) Oh
b8708eb232 qcom: scm: Support register x6 to pass the session id
Non-atomic scm call which could be interrupted, trustzone will store
the session id in a register(x6) which will be used when trustzone resumes
the call.
To avoid x6 being used by compiler, HLOS now uses it to send a zero before
making scm call.
This is the same change as in the 32bit scm call.

Change-Id: If7a3ee28bdbf22acf447531603819a6f4f1603ca
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
2016-03-01 12:22:20 -08:00
Vikram Mulukutla
eb590b4075 soc: qcom: scm: Add LMH specific mutex lock
It is required on some hardware that the Limits Management
secure API be executed in mutual exclusion with certain
other hardware-accessing drivers. Provide a mutex to achieve
this.

Change-Id: Ie0db516e335c29b79e959a0a6e6fb76231af6bf4
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
2016-03-01 12:22:20 -08:00
Abhimanyu Kapur
14c22b6394 soc: qcom: Add SCM driver snapshot
This is a snapshot of the scm driver as of
msm-3.14 commit:

3bc54cf86bdc7affa7cd4bf7faa3c57fe8f8819d (Merge "msm:
camera: Add dummy sub module in sensor pipeline")

Change-Id: Ida15e7da1a8c92e96b4f59feecb4d9dbaf667273
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-01 12:22:19 -08:00
Rohit Vaswani
fa7fb120e4 Revert "arm64: kill flush_cache_all()"
This reverts the upstream commit 68234df.
This is required internally for certain use-cases like flushing cache
before reboot to ensure all the data is available in the ramdump.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-01 12:22:19 -08:00
Rohit Vaswani
155800d0a8 Revert "arm64: Remove unused macros from assembler.h"
This reverts commit d3127afa71.
This is required for flush_cache_all to work.
2016-03-01 12:22:19 -08:00
Sanrio Alvares
b04cd45a04 pinctrl: qcom: msm8996: fix control register offsets for SDC
Fix control register offsets for SDC1 and SDC2 pingroups

Change-Id: Ib373d17d512aeed64c16b5831ac20e03ab43ffe0
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
2016-03-01 12:22:19 -08:00
Sanrio Alvares
1d8e586037 pinctrl: add and update new functions as per msm8996v3
Per the new msm8996v3 design add newly added gpio functions
and update positions of existing ones.
Add gpio bindings documentation.

Change-Id: Id2ccd471afe1d8e43ff625c1c24fdbf666342cd8
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
2016-03-01 12:22:18 -08:00
Sanrio Alvares
854cfa66f0 pinctrl-8996: remove inapplicable copyright
The GPLv2 copyright statement includes an attribution
to Sony which was accidentally copied from another file.
Since the 8996 pinctrl driver does not leverage code
from sources besides the Linux Foundation,
clean-up the copyright text accordingly.

Change-Id: I324088aea2abde4fe34769a63d4ab55b35e13b81
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
2016-03-01 12:22:18 -08:00
Sanrio Alvares
57188700dd Pinctrl: add gpio function and pingroups
Based on the upstream change add gpio functions and
pingroups to msm8996 soc file

Change-Id: Iffc92a84d31b02efe29319dbdbb65c870c959cfd
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
2016-03-01 12:22:18 -08:00
Abhimanyu Kapur
97f4ae4764 drivers: pinctrl: replace thulium with msm8996
Use appropriate SOC name. Also replace all
instances of thulia with kryo.

Change-Id: Idd9acaae0688b7c125b85462bd99d01a3303fd09
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
2016-03-01 12:22:18 -08:00
Rohit Vaswani
28030d6a68 defconfig: arm64: Add msm_defconfig and msm-perf_defconfig
Currently they are the same as the upstream arm64/configs/defconfig.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-01 12:22:17 -08:00
Rohit Vaswani
626a834282 Documentation: Snapshot of msm devicetree bindings from msm-3.18
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-01 12:22:17 -08:00
Rohit Vaswani
eb9d5a1557 arm: DTS: qcom: Snapshot of all 8996 Device Tree Files
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
2016-03-01 12:22:17 -08:00
Larry Bassel
dd25b38679 arm64: provide dma cache routines with same API as 32 bit
The APIs __dma_inv_range() and __dma_clean_range() were
not exported by the third party patch. Since the functions
starting with underscores are not to be directly used by drivers,
related functions without the underscores are provided
which have the same name and functionality as the 32 bit APIs.

Change-Id: Ie0e681614307d9d9a19e58cacfb9b5dff4528977
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>

arm64: add defines for dmac_*_range for compatibility with arm32

An earlier patch created defines for dma_*_range APIs to be
compatible with arm 32 bit, however it appears
these API names have not (at least yet) appeared there, so
revise the names to dmac_*_range, which is defined
for arm 32 bit so that there is one name defined
for both architectures.

Change-Id: I6456c02bad73fb54a874dc9925d3d43d9b8be2f2
Signed-off-by: Larry Bassel <lbassel@codeaurora.org>
(cherry picked from commit 0930bab0db67cc0d91e52e385e3e061871c6be05)
2016-03-01 12:22:16 -08:00
Abhimanyu Kapur
3f5d1d7afe msm: Move dts into a subdirectory
This makes locating our files less convoluted, since the
arch/arm/boot/dts directory is now quite bloated. So
move the dts into a "qcom" subdirectory.

The dtb output objects will still remain in the usual place,
out/arch/arm/boot/dts.

Change-Id: I9147b76c5385d77b5e350e2daa623747034dc96e
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
(cherry picked from commit 850759efa7e7b99fed479c8875439bfcfa06a340)

Conflicts:
	arch/arm/Makefile
	arch/arm/boot/dts/Makefile
2016-03-01 12:22:16 -08:00
Colin Cross
4e9b16cdb2 ARM: convert build of appended dtb zImage to list of dtbs
Allow CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE_NAMES to specify
a space separated list of dtbs to append to the zImage,
and name the resulting file zImage-dtb

Change-Id: I36d9108a2349bdbb373e95076dcb1417d8c7dce6
Signed-off-by: Colin Cross <ccross@android.com>

(cherry picked from commit 1307afc31753a515832702ff17e788de4f6f5d7c)
2016-03-01 12:22:16 -08:00
Alex Ray
6312904460 ARM64: add option to build Image.gz/dtb combo
Allows a defconfig to set a list of dtbs to concatenate with an
Image.gz to create a Image.gz-dtb.

Change-Id: I0dc3935e57f01b517aa64eda0c27b0101e9ea3b2
Signed-off-by: Alex Ray <aray@google.com>
(cherry picked from commit 082d89f7f2ae529e2d7b50f6259e4430472cf4ed)
2016-03-01 12:22:15 -08:00
Hanumant Singh
f443059ffd arm64: Mask out 16KB granule in MMFR register
Memory model feature register specifies the supported
page granules. Some ARM cpus may have support for
16KB granules.
However currently we donot support 16KB pages sizes.
Explicitly mask off that capability if advertised by
the cpu.

Change-Id: I7daf3f179a5ce103aec7cf103ac198cf64800543
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
2016-03-01 12:22:15 -08:00
Matt Wagantall
453d9d37ed arm64: entry: style cleanup for ARM64_REG_REBALANCE_ON_CTX_SW
The style used by 4fe343f94858 ("arm64: entry: add support for
CONFIG_ARM64_REG_REBALANCE_ON_CTX_SW") is inconsistent with other code
in the same file. Clean this up by using tabs instead of spaces, and
lower-case instead of upper-case instructions. No functional change
is expected.

Change-Id: Ia0d27e8b96fbde18f1c77f0728205a8e4109c114
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2016-03-01 12:22:14 -08:00
Se Wang (Patrick) Oh
dbd6607ac7 arm: kernel: Ignore KASan errors from unwind_frame
When a process A unwind the stack frame of process B,
the stack of B can be modified and updated in other CPU
concurrently. So KASan could examine stack address with
out of date shadow mask value. To avoid this incorrect
KASan report, disable KASan during unwinding a frame of
a different task.

Following is the Kasan error log for the reference.

==================================================================
BUG: KASan: out of bounds access in unwind_frame+0x9c/0xf8 at addr ffffffc0462b76f0
Read of size 8 by task Signal Catcher/1282
page:ffffffbac7bdb260 count:0 mapcount:0 mapping:          (null) index:0x0
flags: 0x0()
page dumped because: kasan: bad access detected
Call trace:
[<ffffffc00008c010>] dump_backtrace+0x0/0x250
[<ffffffc00008c270>] show_stack+0x10/0x1c
[<ffffffc001b6e628>] dump_stack+0x74/0xfc
[<ffffffc0002dd7c4>] kasan_report_error+0x2b0/0x408
[<ffffffc0002dd9f8>] kasan_report+0x34/0x40
[<ffffffc0002dda78>] __asan_report_load8_noabort+0x14/0x20
[<ffffffc00008b984>] unwind_frame+0x98/0xf8
[<ffffffc00008ba14>] walk_stackframe+0x30/0x48
[<ffffffc00008bba4>] save_stack_trace_tsk+0x178/0x254
[<ffffffc0003a5bc4>] proc_pid_stack+0xf0/0x198
[<ffffffc0003a11b0>] proc_single_show+0xe8/0x130
[<ffffffc000330e0c>] seq_read+0x524/0xaf0
[<ffffffc0002e9c74>] vfs_read+0x120/0x270
[<ffffffc0002eb208>] SyS_read+0xec/0x198
Memory state around the buggy address:
 ffffffc0462b7580: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 ffffffc0462b7600: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>ffffffc0462b7680: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
                                                                ^
 ffffffc0462b7700: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 ffffffc0462b7780: 00 00 00 00 00 00 00 00 00 00 f1 f1 f1 f1 00 00
==================================================================

Change-Id: I0e35e6721417fa7a5bffb41be67443cd906e256a
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
2016-03-01 12:22:14 -08:00
Vince Leung
a1efe43c52 arm64: entry: add support for CONFIG_ARM64_REG_REBALANCE_ON_CTX_SW
Add support for re-balancing register rename pools on context
switches, for a potential performance boost on some ARM64 targets.

Change-Id: I7577c11fac566ae91a210787c70b23591bfbd693
Signed-off-by: Sanrio Alvares <salvares@codeaurora.org>
2016-03-01 12:22:14 -08:00
Matt Wagantall
486155f53e arm: psci: drop info prints seen during cpu hotplug to pr_debug
These message are printed every time a CPU in hotplugged out,
resulting in log noise and hurting hotplug latency. Silence them
by default, by dropping them to pr_debug.

Change-Id: I21632c1dbf54342b5980a82ab7389713e943bf6c
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2016-03-01 12:22:14 -08:00
Matt Wagantall
c69f235b45 arm: cpuinfo: drop L1 cache type print from pr_info to pr_debug
This message is printed every time a CPU in hotplugged in,
resulting in log noise and hurting hotplug latency. Silence
it by default, by dropping it to a pr_debug.

Change-Id: I05b643a90abc17e0134830874555e79138237261
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
2016-03-01 12:22:13 -08:00