Upstream kernel has deprecated the use of arch_counter_get_cntpct() and the
drivers are expected to switch to arch_counter_get_cntvct.
Switch to using arch_counter_get_cntvct().
Change-Id: Ie5c9236ad34ea61a375a4a3ae1f1d91fda0a9ccf
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Snapshot of rpm status drivers as of msm-3.18 commit
e70ad0cd5ef
Change-Id: Ibceaa8f948e203c39e3df55b135c0a394f39ca5f
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
IPA headers building is a logic related to H/W.
As such, migrating this logic to IPAHAL (H/W abstraction
layer) of IPA driver and adapt the core driver code to use
it. New internal S/W API is added to access IPAHAL for
headers building.
CRs-fixed: 989231
Change-Id: I2cec6c6f9fe7aea0e2276b01133f8c3505b9919f
Signed-off-by: Amir Levy <alevy@codeaurora.org>
Set the recommended high bit bank value for A540 that
will be programmed into registers by the kernel and/or the
user mode driver.
CRs-Fixed: 994759
Change-Id: Ib3006067e184bf97adf75971ab96b2c673909eba
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
Add clocks, regulators needed for CSID, CSIPHY, CCI camera nodes,
correct pinctrl nodes for camera sensor.
CRs-Fixed: 1011110
Change-Id: Ieee68a709a1f56d53bd2746fa28fbd76195270b0
Signed-off-by: Viswanadha Raju Thotakura <viswanad@codeaurora.org>
of_mpm_init(..) is now directly called into the pinctrl-msm.c
driver and therefor it is not needed to be present in the irq-msm.c.
This also helps us to not have target specific compatible string
names attached everytime we add new SOC.
Eventually we will remove irq-msm.c altogether.
CRs-Fixed: 1007342
Change-Id: I904ee0b08079972b181f53fdc5a6022871da74e8
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Even though CONFIG_PAGE_OWNER and CONFIG_DEBUG_PAGEALLOC are enabled
they won't add any debugging information until
CONFIG_PAGE_OWNER_ENABLE_DEFAULT and CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT
are selected as "y".
Another option is to enable/disable them through the kernel
commnad line but since we have two defconfigs(perf and debug) for
the products it will be easier to use the CONFIG_xxx options to
toggle these options.
CRs-Fixed: 1006743
Change-Id: I35602327d75945c35126ce2d657803d786a44121
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Since this commit 48c96a3685 ("mm/page_owner: keep track
of page owners") doesn't enable the page_owner by default
even though CONFIG_PAGE_OWNER is enabled.
Add configuration option CONFIG_PAGE_OWNER_ENABLE_DEFAULT to
allow user to enable it by default through the defconfig file.
CRs-Fixed: 1006743
Change-Id: I9b565a34e2068bf575974eaf3dc9f7820bdd7a96
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
USB DIAG function driver updates dload_cookie with USB PID and serial
number to avoid port-hopping for DIAG port with bootloader. Now
composite_driver doesn't get updated strings as android.c is
deprecated and configfs is used. Hence use composite device based
strings to find required serial number.
CRs-Fixed: 1010715
Change-Id: I076928436a8b1b4d1c3ee7e48db9b3314ec1fc05
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
The diag dload memory region is part of IMEM. USB Diag driver
queries this DT node for the memory address to access and update
USB PID and serial number. Hence add qcom,msm-imem-diag-dload node
on msmcobalt.
CRs-Fixed: 1010715
Change-Id: I2144bacc11190b92d14b00480dd538e27d13c3e1
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Enable the kernel client API for the service locator and notifier.
Do not enable it on perf builds for performance reasons.
CRs-Fixed: 999530
Change-Id: Iddb5e882e1324e0382359109b86ebcaa26b3d851
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
This reverts commit 3b1bda734d ("spmi: pmic_arb: use
handle_fasteoi_irq handler")
PMIC interrupt are not aligned to be used as fasteoi, this
is because
* most of the PMIC interrupts are threaded and are configured as
ONESHOT. Fasteoi handlers do not support ONESHOT semantics
* There is a chance of losing edge interrupts that trigger while
the handler is running. This is because fasteoi handler signals
EOI after the handler is run. So edge interrupts that trigger
while the handler is running get acknowledged without being
handled.
CRs-Fixed: 1001770
Change-Id: I622fd971201b6c0001212a696c3d12aea409c11b
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Need to proxy vote for NOC AHB/AXI clocks before turning on video
core clocks.
CRs-Fixed: 1007809
Change-Id: I4b68c0e658316b2958d8c9536c3e80e01faf55a4
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
The IOMMU test framework has been updated to add support for dummy
platform devices for testing purposed. Add some for 8996 and cobalt.
CRs-Fixed: 1003233
Change-Id: I65e7fe7d8f94ba3ac6a3d9030f15fd5a0b97c188
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Always create the KERNEL_OBJ symlink for legacy reference
support when using the new directory style. Earlier the
generation relies on another make target that requires it.
Also solve a minor issue where the make @(hide) was incorrectly
used within a shell command.
Change-Id: Ie1b74b6a3eac563ee34865655b046f71411aca65
Signed-off-by: David Ng <dave@codeaurora.org>
The IOMMU test framework relies on the `iommus' property, and we
currently rely on these methods for making that happen:
(1) Clients enabling their DT nodes.
(2) We put an `iommus' property in our IOMMU DT nodes themselves.
The problem with (1) is that clients aren't always ready during early
chip validation. The problem with (2) is that it results in us
recursively mapping into the SMMU when we try to do cache maintenance on
our page table memory.
Fix these problems by introducing a dummy driver with associated device
tree bindings that will do absolutely nothing other than wait for the
SMMU driver and IOMMU test framework to slurp it up.
CRs-Fixed: 1003233
Change-Id: I6a5802aff5bab99d29c6ed9d953a203cbd8015bb
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The command ids do not have separate pointer payload and would
return error. If error is returned without waiting for any
subsequent driver operation like a timeout handling to complete,
it would result in synchronization issues and potential crashes.
Ignore input validation for sof freeze/unfreeze command ids.
CRs-Fixed: 1002547
Change-Id: Ifbecd46f8e3f8e93d846da3dfc72f7ef70687589
Signed-off-by: Krishnankutty Kolathappilly <kkolatha@codeaurora.org>
Qseed3 is supported on VIG pipes only, driver should skip
enabling it on non-VIG pipes. Changes adds support to skip
programming Qseed3 on non-vig pipes.
Change-Id: Ie3d3889cc6c35011f239468ddf465c553a6b1c97
Signed-off-by: Sushil Chauhan <sushilchauhan@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Add IPC logging to IPA WAN driver.
IPC logging will be stored in the same log buffer
as IPA IPC log.
CRs-Fixed: 1005492
Change-Id: I69f3536e297eae8453370b44f66ec0f520f16cd5
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Add IPC logging to IPA MHI driver.
IPC logging will be stored in the same log buffer
as IPA IPC log.
CRs-Fixed: 1005492
Change-Id: I31acc2008800d213cc69003f9781fee04b5935aa
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Use IPA driver IPC buffer for IPC logging for IPA ODU.
CRs-Fixed: 1005492
Change-Id: Ibc5ee5145dee3980ddca3d9922663eb96420d011
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
There is a possibility that ipa_q6_clnt handle is used
after it is freed espcially in scenarios where the handle
is freed on service exited notification. Make a change to
not clean up the handle when service is exited instead
do it as part of BEFORE_POWERUP processing only.
Change-Id: I789cdec6f056b17a605f3454e6cd5702542c454f
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
When sending a SG packet, frag descriptor length is not updated
and as a result IPA HW will stall. Make a change to update
descriptor length to the size of fragment.
Change-Id: Ie742148fe3b04677365a7247a89c2bed412e4d31
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
When AP is going to suspend, there is a possibility that
IPA clock is released twice due to sps_release_resource being
called from 2 different contexts. Make a change to protect
sps_release_resource to make sure IPA clock is released
only once.
Change-Id: I2d7d74e48ce80aa18cab2d42191db8d5edb4a076
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
Using a workqueue for initializing QMI functionality
can result in race conditions with cleanup operation
during SSR handling because of scheduling delays.
Make a change to not to use workqueue and initialize
the QMI functionality as part of probe itself.
For polling state, there is a possibility that pipe is
disconnected during switch between poll mode interrupt
mode. This can result in queueing switch_to_intr_work
work multiple times till the pipe is connected and there
is some activity. Make a change to check if the ep is
valid before queuing the work.
Change-Id: Id5a5128edb379308fa91b53062b6773af1b6de18
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
In local client and local service communication, getting the reference
count for local xport_info pointer fails with -ENODEV and returns
without sending the resume tx message which blocks the communication.
Check and remove the reference get logic for local xprt_info.
CRs-Fixed: 1009471
Change-Id: If11cd577d30c22d79544f4668e08ccf269237236
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
Add SMMU support for WLAN. Config it as stage-1 enable by default.
Change-Id: I70db6555d236857c5a8d62a337afdc9fec22c97f
CRs-fixed: 1009865
Signed-off-by: Yue Ma <yuem@codeaurora.org>
Expose a separate MDP capability to expose index of the interface
WB block.
Change-Id: I757329e68af439701b8f065c99a6a4b0c390cba2
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Enable closed-loop CPR in order to exercise the VDD_GFX CPR
controller hardware.
Change-Id: Id4beb16d0324ec9c3d62d6d1ead664e215acaaf1
CRs-Fixed: 1010331
Signed-off-by: David Collins <collinsd@codeaurora.org>
Update these CPR closed-loop configurations parameters based upon
the most recent hardware guidelines: the per-corner voltage
adjustments, the fused adjustment corner mapping, and the CPR
count mode. Also, add place holder 0 uV per-fused-corner
open-loop voltage adjustments.
Change-Id: I50231b6c219e6a54379f6b94a23486a320ade09e
CRs-Fixed: 1010331
Signed-off-by: David Collins <collinsd@codeaurora.org>
These scm calls may take a long time to complete on TZ side,
switch to non-atomic calls.
Change-Id: If98ef69e2474f1c50670c2605afe9769a4e0fb39
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
Signed-off-by: Andrey Markovytch <andreym@codeaurora.org>
MSMCOBALT parts with CPR fusing revision 1 and above will have
their open-loop voltage fuses blown assuming new lower reference
voltages. These lower reference values allow for fusing parts
with lower open-loop voltages than was possible before. Update
the driver in order to use a different set of open-loop fuse
reference voltages for MSMCOBALT CPR revision 0 vs revisions
1 to 7.
Change-Id: I2d38454fce77a895f0aaf18e01f7d0c9f3c64692
CRs-Fixed: 1009268
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add SVS2 frequencies to the ufs_axi_clk_src and
ufs_ice_core_clk_src clock sources on MSMCOBALT.
CRs-Fixed: 1010329
Change-Id: I01210f48d32d7d6cb32f4977e52fb46acd33b1ba
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Use Kyro2xx Silver as the cpu name for the silver cluster.
CRs-Fixed: 1007822
Change-Id: I23800a58459b0d9b15168cbef409374495e59ee1
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
If Intra Refresh mode is enabled during encode, then
enable constrained intra refresh property on firmware.
Without constrained intra refresh enabled, Intra Refresh
mode will not be effective.
CRs-Fixed: 1001217
Change-Id: Id326c73f78f3fadb5193a1e840f295d764fb013b
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Add the BCR register for the gcc_ufs_axi_clk and
gcc_blsp1/2_ahb_clk clocks.
CRs-Fixed: 1005036
Change-Id: I8cd2403bed66141c99ccf8b9c57e59b936c1d90e
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
The DSI RCGs exported by the MMSS clock controller (MMSS-CC)
can be sourced out of the DSI PLL which is outside the MMSS-CC. Set up
these external clock sources to point to the DSI PLL clocks.
CRs-Fixed: 1000756
Change-Id: I2d2e651ba554812198d721892e14ca1a61a34027
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Add in device tree into for Cobalt CDP and MTP to enable haptic
function.
CRs-Fixed: CRs-Fixed: 1004941
Change-Id: Iead32e33e13b302baf541fa23e47a2f44846b0ff
Signed-off-by: Chun Zhang <chunz@codeaurora.org>
Signed-off-by: Jing Lin <jinglin@codeaurora.org>
Enable support for Synaptics touchscreen drivers.
CRs-Fixed: 1004396
Change-Id: I285e0ba20c0a51c17152ae0f01e80c76ecfc8d16
Signed-off-by: Alex Sarraf <asarraf@codeaurora.org>
Add voltage and current specs for regulators for the
Synaptics driver.
CRs-Fixed: 1004396
Change-Id: Ic4d659776d1e2388554978020f52330bbee818ae
Signed-off-by: Alex Sarraf <asarraf@codeaurora.org>
Enable the kernel client API for the service notifier and locator.
Do not enable it on perf builds for performance reasons.
CRs-Fixed: 999530
Change-Id: Ib9eb162544eb4f7271912896c2567e574bd75157
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
