Use the exclude_idle attribute of the perf events to avoid reading
PMUs of idle CPUs. The counter values are updated when CPU enters
idle and the saved value is returned when the idle CPU is queried
for that event provided the attribute is set in the perf_event.
Change-Id: I61f7a7474856abf67ac6dfd9e531702072e108a5
Signed-off-by: Patrick Fay <pfay@codeaurora.org>
Current code doesn't restart perf after hotplug and power collapse
which makes monitoring in low power modes difficult. This patch adds
support for the hotplug notifier events and creates a common path for
the power collapse and hotplug events.
Change-Id: I52e6978b1c104fd78bc42e4600ceb111b47b3e11
Signed-off-by: Patrick Fay <pfay@codeaurora.org>
Allocating new secure pages has very high latency. Ensure that the page
pool is completely empty before allocating new pages, splitting large order
pages as required.
Change-Id: I1353c5d9bdfd5c525c0c781c524630577c84b95e
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Using GFP_COMP to create compound pages prevents split_pages from being
used to split an order > 0 page into order 0 pages.
Required for future changes to the system_heap allocation algorithm.
Change-Id: I5ab82f717bb003e074124e1ffae3f112c405bc2b
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
A separate heap will be used for the preallocation feature.
Also remove an associated ion_buffer private flag.
Change-Id: I8df74307d4c3461198de0a58f6b8ec7c8bef1f12
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
compat ioctl manages differences between the size of 'unsigned long'
between 32bit and 64bit userspace/kernel.
Change-Id: Ia9030bcb6b404b080cb8bebb91ca7bf03c5f3e05
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Enable clock gating of venus core, when the core is in idle
state. HLOS can do this using the Clock Gate 4.
CRs-Fixed: 1048319
Change-Id: Iaa1ed5c24f07b8e18efc35de4f6ae6edea3b9f55
Signed-off-by: Chinmay Sawarkar <chinmays@codeaurora.org>
Clients may use dma_mmap_coherent to map buffers allocated through
dma_alloc_coherent() to userspace. Support this.
Change-Id: Ibf1f086be4c6692479c11cb4585954c5d3c91707
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Clients may have additional mappings in an iommu domain which are not
managed by arm_iommu_create_mapping. As such, it is important that
arm_iommu_create_mapping only use the iova region specified by the client.
However, the current implementation rounds the size of the region up to a
256K boundary (on arm64).
Change-Id: I88ddd98a76b39e3e9126d78da8e725491f2a5b32
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Enable CONSTRAINED_INTRA_PRED for all the following intra refresh mode
- CYCLIC, ADAPTIVE, CYCLIC_ADAPTIVE, RANDOM
and disbale when intra refresh mode is set to NONE.
Change-Id: Ifda5783f7bf33ba20a3ee3749410560f7864a4f3
CRs-Fixed: 1049420
Signed-off-by: Karthikeyan Periasamy <kperiasa@codeaurora.org>
These registers need to be set everytime ARM9 is powered up.
Some may need to be set before ARM9 begins execution.
Hence setting these, before the FW is loaded by PIL.
CRs-Fixed: 1048319
Change-Id: I1d207635b0dd516bbff2007b1a45f5cc038d350e
Signed-off-by: Chinmay Sawarkar <chinmays@codeaurora.org>
Output buffer size will be finalized to driver at start streaming.
Hence set this value to FW in start streaming.
CRs-Fixed: 1049617
Change-Id: I1697139a0c7cf84e20d3a8c3747a1e96f765139a
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
Signed-off-by: Abdulla Anam <abdullahanam@codeaurora.org>
Signed-off-by: Karthikeyan Periasamy <kperiasa@codeaurora.org>
The quirk setting to enable source split always was added along
with the multirect changes from MDP rev 3.0. But there is no
special requirement for enabling it with multirect as the source
split behavior remains the same. Source split is required only
when the layer lies in both the LM. Enabling source split with
partial update, when updating only one LM causes MDP hang due to
invalid configuration. Fix the configs by removing the unnecessary
always source split quirk setting.
Change-Id: Iadaafa64d2c1908b04498d0a88dd612dbc36dae8
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
qusb2 phy programming sequence on msmcobalt v2 platform requires
one extra register write to initialize the phy.
Change-Id: Id2e764210e3ca9e12a3d8299bf0c585958bbd7c8
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Vote for AHB bandwidth after clocks are enabled. For bandwidth
voting clocks need to be on. Set the memory retention flags for
certain hardware clocks to save power, memory does not need to
be retained for these clocks since the driver reinitializes the
jpeg hardware whenever the clocks are turned on.
CRs-Fixed: 1044777 1044373
Change-Id: Ib8e0ede7e237eb6c43f67e98a3b335067a4a74fc
Signed-off-by: Rajakumar Govindaram <rajakuma@codeaurora.org>
Signed-off-by: Gautham Mayyuri <gmayyuri@codeaurora.org>
There is no point of checking whether a currently running task should be
migrated off this cpu if the task is pinned to the cpu.
Change-Id: I33e5ddb318200535c3563f5670059144e0f5eba8
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Rather than defining QoS clock references at the fab
which can create unwanted clock/gdsc toggles, define
QoS clocks at the affected node instead.
Change-Id: I15a01a772198e0383b1b73052e2d0c4160bf389f
Signed-off-by: David Dai <daidavid1@codeaurora.org>
