Commit graph

569959 commits

Author SHA1 Message Date
Mayank Rana
1e08f835b4 ARM: dts: msm: Add qcom,msm-imem-diag-dload node on msmcobalt
The diag dload memory region is part of IMEM. USB Diag driver
queries this DT node for the memory address to access and update
USB PID and serial number. Hence add qcom,msm-imem-diag-dload node
on msmcobalt.

CRs-Fixed: 1010715
Change-Id: I2144bacc11190b92d14b00480dd538e27d13c3e1
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
2016-05-03 15:53:16 -07:00
David Keitel
4886a36698 defconfig: arm64: msm: enable service notifier and locator for msmcortex
Enable the kernel client API for the service locator and notifier.
Do not enable it on perf builds for performance reasons.

CRs-Fixed: 999530
Change-Id: Iddb5e882e1324e0382359109b86ebcaa26b3d851
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-05-03 15:53:03 -07:00
Abhijeet Dharmapurikar
7753ddba59 Revert "spmi: pmic_arb: use handle_fasteoi_irq handler"
This reverts commit 3b1bda734d ("spmi: pmic_arb: use
handle_fasteoi_irq handler")

PMIC interrupt are not aligned to be used as fasteoi, this
is because
* most of the PMIC interrupts are threaded and are configured as
  ONESHOT. Fasteoi handlers do not support ONESHOT semantics

* There is a chance of losing edge interrupts that trigger while
  the handler is running. This is because fasteoi handler signals
  EOI after the handler is run. So edge interrupts that trigger
  while the handler is running get acknowledged without being
  handled.

CRs-Fixed: 1001770
Change-Id: I622fd971201b6c0001212a696c3d12aea409c11b
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-05-03 15:52:50 -07:00
Weiyin Jiang
9847f9ca84 ASoC: msm: audio-effects: misc fixes in h/w accelerated effect
Adding memory copy size check and integer overflow check in h/w
accelerated effect driver.

Change-Id: I17d4cc0a38770f0c5067fa8047cd63e7bf085e48
CRs-Fixed: 1006609
Signed-off-by: Weiyin Jiang <wjiang@codeaurora.org>
2016-05-03 15:52:37 -07:00
Puja Gupta
4e023df9c5 ARM: dts: msm: Venus PIL clock voting update for MSMCOBALT
Need to proxy vote for NOC AHB/AXI clocks before turning on video
core clocks.

CRs-Fixed: 1007809
Change-Id: I4b68c0e658316b2958d8c9536c3e80e01faf55a4
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
2016-05-03 15:52:20 -07:00
Mitchel Humpherys
a93a2d5cc2 ARM: dts: msm: Add IOMMU test device nodes for 8996 and cobalt
The IOMMU test framework has been updated to add support for dummy
platform devices for testing purposed.  Add some for 8996 and cobalt.

CRs-Fixed: 1003233
Change-Id: I65e7fe7d8f94ba3ac6a3d9030f15fd5a0b97c188
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
2016-05-03 15:52:08 -07:00
David Ng
93cc3fa659 AndroidKernel.mk: Enforce KERNEL_OBJ generation
Always create the KERNEL_OBJ symlink for legacy reference
support when using the new directory style.  Earlier the
generation relies on another make target that requires it.

Also solve a minor issue where the make @(hide) was incorrectly
used within a shell command.

Change-Id: Ie1b74b6a3eac563ee34865655b046f71411aca65
Signed-off-by: David Ng <dave@codeaurora.org>
2016-05-03 15:51:56 -07:00
Mitchel Humpherys
c28b11f041 iommu/iommu-debug: Add dummy driver for standalone testing
The IOMMU test framework relies on the `iommus' property, and we
currently rely on these methods for making that happen:

  (1) Clients enabling their DT nodes.

  (2) We put an `iommus' property in our IOMMU DT nodes themselves.

The problem with (1) is that clients aren't always ready during early
chip validation.  The problem with (2) is that it results in us
recursively mapping into the SMMU when we try to do cache maintenance on
our page table memory.

Fix these problems by introducing a dummy driver with associated device
tree bindings that will do absolutely nothing other than wait for the
SMMU driver and IOMMU test framework to slurp it up.

CRs-Fixed: 1003233
Change-Id: I6a5802aff5bab99d29c6ed9d953a203cbd8015bb
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
2016-05-03 15:51:43 -07:00
Mitchel Humpherys
7c01b51556 defconfig: arm64: msm: Enable IOMMU debug tracking
CONFIG_IOMMU_DEBUG_TRACKING enables some convenient debugfs files for
debugging IOMMU issues.  Enable it.

CRs-Fixed: 1003233
Change-Id: Ic36aaa86b7799c962a1128d16f0ec670698e8570
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
2016-05-03 15:51:32 -07:00
Krishnankutty Kolathappilly
1caba4ba88 msm: cpp: Ignore input validation for sof freeze/unfreeze command ids
The command ids do not have separate pointer payload and would
return error. If error is returned without waiting for any
subsequent driver operation like a timeout handling to complete,
it would result in synchronization issues and potential crashes.
Ignore input validation for sof freeze/unfreeze command ids.

CRs-Fixed: 1002547
Change-Id: Ifbecd46f8e3f8e93d846da3dfc72f7ef70687589
Signed-off-by: Krishnankutty Kolathappilly <kkolatha@codeaurora.org>
2016-05-03 15:51:19 -07:00
Abhijit Kulkarni
1ee06a053c msm: mdss: Skip setting up Qseed3 for non-vig pipes
Qseed3 is supported on VIG pipes only, driver should skip
enabling it on non-VIG pipes. Changes adds support to skip
programming Qseed3 on non-vig pipes.

Change-Id: Ie3d3889cc6c35011f239468ddf465c553a6b1c97
Signed-off-by: Sushil Chauhan <sushilchauhan@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2016-05-03 15:51:07 -07:00
Skylar Chang
9620d3accc msm: ipa3: rmnet_ipa: add IPC logging to common buffer
Add IPC logging to IPA WAN driver.
IPC logging will be stored in the same log buffer
as IPA IPC log.

CRs-Fixed: 1005492
Change-Id: I69f3536e297eae8453370b44f66ec0f520f16cd5
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-05-03 15:50:53 -07:00
Skylar Chang
4ab1f7ac6e msm: ipa3: mhi: add IPC logging to common buffer
Add IPC logging to IPA MHI driver.
IPC logging will be stored in the same log buffer
as IPA IPC log.

CRs-Fixed: 1005492
Change-Id: I31acc2008800d213cc69003f9781fee04b5935aa
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-05-03 15:50:42 -07:00
Skylar Chang
49d9d205a1 msm: ipa: odu: change IPC logging to common buffer
Use IPA driver IPC buffer for IPC logging for IPA ODU.

CRs-Fixed: 1005492
Change-Id: Ibc5ee5145dee3980ddca3d9922663eb96420d011
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-05-03 15:50:30 -07:00
Sridhar Ancha
6e2f3e3917 msm: ipa: Fix to accessing ipa_q6_clnt handle
There is a possibility that ipa_q6_clnt handle is used
after it is freed espcially in scenarios where the handle
is freed on service exited notification. Make a change to
not clean up the handle when service is exited instead
do it as part of BEFORE_POWERUP processing only.

Change-Id: I789cdec6f056b17a605f3454e6cd5702542c454f
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
2016-05-03 15:50:14 -07:00
Sridhar Ancha
a1cc74cd14 msm: ipa: Fix to update the descriptor length in SG scenario
When sending a SG packet, frag descriptor length is not updated
and as a result IPA HW will stall. Make a change to update
descriptor length to the size of fragment.

Change-Id: Ie742148fe3b04677365a7247a89c2bed412e4d31
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
2016-05-03 15:49:56 -07:00
Sridhar Ancha
615ca55d1c msm: ipa: Fix to release IPA clock during ap suspend
When AP is going to suspend, there is a possibility that
IPA clock is released twice due to sps_release_resource being
called from 2 different contexts. Make a change to protect
sps_release_resource to make sure IPA clock is released
only once.

Change-Id: I2d7d74e48ce80aa18cab2d42191db8d5edb4a076
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
2016-05-03 15:49:40 -07:00
Sridhar Ancha
7d371f05d0 msm: ipa: Fix to QMI initialization and polling state
Using a workqueue for initializing QMI functionality
can result in race conditions with cleanup operation
during SSR handling because of scheduling delays.
Make a change to not to use workqueue and initialize
the QMI functionality as part of probe itself.
For polling state, there is a possibility that pipe is
disconnected during switch between poll mode interrupt
mode. This can result in queueing switch_to_intr_work
work multiple times till the pipe is connected and there
is some activity. Make a change to check if the ep is
valid before queuing the work.

Change-Id: Id5a5128edb379308fa91b53062b6773af1b6de18
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
2016-05-03 15:49:29 -07:00
Arun Kumar Neelakantam
983ca3d58a net: ipc_router: Fail to send resume_tx for local communication
In local client and local service communication, getting the reference
count for local xport_info pointer fails with -ENODEV and returns
without sending the resume tx message which blocks the communication.

Check and remove the reference get logic for local xprt_info.

CRs-Fixed: 1009471
Change-Id: If11cd577d30c22d79544f4668e08ccf269237236
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
2016-05-03 15:49:14 -07:00
Vijay kumar Tumati
492cb2ef7c msm: camera: Avoid uninitialized variables
Initialize variables with default values.

Change-Id: Ie615ef440ab613f0b4f0601500188068440c29fe
Signed-off-by: Vijay kumar Tumati <vtumati@codeaurora.org>
2016-05-03 15:49:03 -07:00
Yue Ma
ec4d9af2e7 icnss: Add SMMU support
Add SMMU support for WLAN. Config it as stage-1 enable by default.

Change-Id: I70db6555d236857c5a8d62a337afdc9fec22c97f
CRs-fixed: 1009865
Signed-off-by: Yue Ma <yuem@codeaurora.org>
2016-05-03 15:48:52 -07:00
Runmin Wang
9f53b1a0e7 ARM: dts: msm: Remove the duplicated RTB dt entry
Remove the duplicated RTB in msmcobalt dt file.

CRs-Fixed: 1009810
Change-Id: Ief99a7af7e3f8147469b1b5a68da973ab26a988b
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
2016-05-03 15:48:42 -07:00
Jeykumar Sankaran
2a5c5c6266 msm: mdss: Add mdp capability to expose writeback interface index
Expose a separate MDP capability to expose index of the interface
WB block.

Change-Id: I757329e68af439701b8f065c99a6a4b0c390cba2
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2016-05-03 15:48:30 -07:00
David Collins
e038c54c80 ARM: dts: msm: enable VDD_GFX closed-loop CPR for msmcobalt
Enable closed-loop CPR in order to exercise the VDD_GFX CPR
controller hardware.

Change-Id: Id4beb16d0324ec9c3d62d6d1ead664e215acaaf1
CRs-Fixed: 1010331
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-05-03 15:48:21 -07:00
David Collins
e35c15c00b ARM: dts: msm: update VDD_GFX CPR parameters for msmcobalt
Update these CPR closed-loop configurations parameters based upon
the most recent hardware guidelines: the per-corner voltage
adjustments, the fused adjustment corner mapping, and the CPR
count mode.  Also, add place holder 0 uV per-fused-corner
open-loop voltage adjustments.

Change-Id: I50231b6c219e6a54379f6b94a23486a320ade09e
CRs-Fixed: 1010331
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-05-03 15:48:10 -07:00
Andrey Markovytch
ab2b3d7aba PFK: ice: change to non-atomic scm calls
These scm calls may take a long time to complete on TZ side,
switch to non-atomic calls.

Change-Id: If98ef69e2474f1c50670c2605afe9769a4e0fb39
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
Signed-off-by: Andrey Markovytch <andreym@codeaurora.org>
2016-05-03 15:48:01 -07:00
Hardik Kantilal Patel
3dec6d1c5e defconfig: msm: Enable config parameter for regulatory database.
Enable config parameter to statically compile regulatory
rules database.

CRs-Fixed: 1007515
Change-Id: Iae73d82f6797b8d0628a3f5a31a916d0a43206df
Signed-off-by: Hardik Kantilal Patel <hkpatel@codeaurora.org>
2016-05-03 15:47:51 -07:00
David Collins
3ed9b4708b regulator: cpr3-mmss-regulator: update reference voltages for msmcobalt
MSMCOBALT parts with CPR fusing revision 1 and above will have
their open-loop voltage fuses blown assuming new lower reference
voltages.  These lower reference values allow for fusing parts
with lower open-loop voltages than was possible before.  Update
the driver in order to use a different set of open-loop fuse
reference voltages for MSMCOBALT CPR revision 0 vs revisions
1 to 7.

Change-Id: I2d38454fce77a895f0aaf18e01f7d0c9f3c64692
CRs-Fixed: 1009268
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-05-03 15:47:41 -07:00
Deepak Katragadda
20c533311a clk: msm: clock-gcc-cobalt: Add SVS2 frequencies for some UFS clocks
Add SVS2 frequencies to the ufs_axi_clk_src and
ufs_ice_core_clk_src clock sources on MSMCOBALT.

CRs-Fixed: 1010329
Change-Id: I01210f48d32d7d6cb32f4977e52fb46acd33b1ba
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-05-03 15:47:31 -07:00
Runmin Wang
c7a8725fa7 edac: cortex: Update the CPU name
Use Kyro2xx Silver as the cpu name for the silver cluster.

CRs-Fixed: 1007822
Change-Id: I23800a58459b0d9b15168cbef409374495e59ee1
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
2016-05-03 15:47:19 -07:00
Arun Menon
44369392b0 msm: vidc: Set constrained intra refresh property
If Intra Refresh mode is enabled during encode, then
enable constrained intra refresh property on firmware.
Without constrained intra refresh enabled, Intra Refresh
mode will not be effective.

CRs-Fixed: 1001217
Change-Id: Id326c73f78f3fadb5193a1e840f295d764fb013b
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
2016-05-03 15:47:07 -07:00
Deepak Katragadda
ffb7a2d754 clk: msm: clock-gcc-cobalt: Add clock reset support for additional clocks
Add the BCR register for the gcc_ufs_axi_clk and
gcc_blsp1/2_ahb_clk clocks.

CRs-Fixed: 1005036
Change-Id: I8cd2403bed66141c99ccf8b9c57e59b936c1d90e
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-05-03 15:46:54 -07:00
Oleg Perelet
f5a5a7c798 msm: kgsl: Disable ISENSE CGC
Disable GPU ISENSE clock gating as workaround of ISENSE HW issue.

CRs-Fixed: 973565
Change-Id: If54caf008c654f488986a279bd19bea97457dc2c
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
2016-05-03 15:46:43 -07:00
Aravind Venkateswaran
58ace0e386 ARM: dts: msm: setup external clock sources for DSI clock on msmcobalt
The DSI RCGs exported by the MMSS clock controller (MMSS-CC)
can be sourced out of the DSI PLL which is outside the MMSS-CC. Set up
these external clock sources to point to the DSI PLL clocks.

CRs-Fixed: 1000756
Change-Id: I2d2e651ba554812198d721892e14ca1a61a34027
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-05-03 15:46:30 -07:00
Chun Zhang
b1c169bae4 ARM: dts: msm: enable haptic on Cobalt CDP and MTP
Add in device tree into for Cobalt CDP and MTP to enable haptic
function.

CRs-Fixed: CRs-Fixed: 1004941
Change-Id: Iead32e33e13b302baf541fa23e47a2f44846b0ff
Signed-off-by: Chun Zhang <chunz@codeaurora.org>
Signed-off-by: Jing Lin <jinglin@codeaurora.org>
2016-05-02 12:14:46 -07:00
Alex Sarraf
d8cb43eefc defconfig: Enable Synaptics touchscreen
Enable support for Synaptics touchscreen drivers.

CRs-Fixed: 1004396
Change-Id: I285e0ba20c0a51c17152ae0f01e80c76ecfc8d16
Signed-off-by: Alex Sarraf <asarraf@codeaurora.org>
2016-05-02 12:14:33 -07:00
Alex Sarraf
5def72b807 ARM: dts: msm: Add Synaptics regulator voltage and current for msmcobalt
Add voltage and current specs for regulators for the
Synaptics driver.

CRs-Fixed: 1004396
Change-Id: Ic4d659776d1e2388554978020f52330bbee818ae
Signed-off-by: Alex Sarraf <asarraf@codeaurora.org>
2016-05-02 12:13:57 -07:00
Oleg Perelet
8972d5e96e msm: kgsl: Explicitly set ISENSE clock rate for A540.
On A540 ISENSE clock rate is controlled by GPU driver.

CRs-Fixed: 973565
Change-Id: Iab40cff01b6e65db51a4b793572714d2059a78ad
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
2016-04-29 14:41:49 -07:00
David Keitel
7ea155dd2d defconfig: arm64: msm: enable service notifier and locator
Enable the kernel client API for the service notifier and locator.
Do not enable it on perf builds for performance reasons.

CRs-Fixed: 999530
Change-Id: Ib9eb162544eb4f7271912896c2567e574bd75157
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
2016-04-29 14:41:38 -07:00
Vijay kumar Tumati
11eb50a115 msm: camera: Avoid uninitialized variables and add null checks
Initialize variables with default values and add null check to
avoid crashes.

Change-Id: I3357d504b624b0af2f0710ee237ec13d4460c6bc
Signed-off-by: Vijay kumar Tumati <vtumati@codeaurora.org>
2016-04-29 14:41:27 -07:00
Sungjun Park
4ccef09c65 defconfig: enable slimbus feature for msmcobalt
Enable slimbus drivers for WCN3990 chipset on msmcobalt.

Change-Id: Icc2d037f4312cee62e51ae2ea5c94c8384fa7a79
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
2016-04-29 14:41:16 -07:00
Sungjun Park
44d1c507ee ARM: dts: msm: Fix BT LDOs level for msmcobalt
Fix Bluetooth regulators voltage level to constraint values
from msmcobalt pmic driver.

Change-Id: I26887d1baab9e9dd45c98442fedd5c919dbd7309
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
2016-04-29 14:41:06 -07:00
Sungjun Park
691e4b776e ARM: dts: msm: Enable blsp1_uart3_hs for msmcobalt
Enable blsp1_uart3 for WCN3990 for msmcobalt to use high
speed UART driver for bluetooth HCI interface.

Change-Id: I5c220e4a6225a34b686cbbfdccd0a2329143af86
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
2016-04-29 14:40:56 -07:00
Sungjun Park
ff1e9f6532 bluetooth: Add slimbus driver for WCN3990
For WCN3990, it supports slimbus slave interface
to receive/send audio data such as FM audio, bluetooth
SCO, bluetooth A2DP data, etc.

Change-Id: I6c64debd0c9b43ea5ebf55a58f1f4b06cdc9bd4e
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
2016-04-29 14:40:44 -07:00
Venkat Gopalakrishnan
400a20450f ARM: dts: msm: Define SDC2 tlmm pins for msmcobalt
Add the pinctrl config entries for SDC2 tlmm and card detect
gpio pins.

Change-Id: Ib4137780625fd35968aa920abde973b007754682
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-04-29 14:40:33 -07:00
Stephen Oglesby
0f02e45668 ASoC: wsa881x: Remove support for wsa881x 1.x chip revision
On kernel version 4.4, support for wsa881x v1.x can be dropped
as it will not ship with any products using this version.

CRs-fixed: 1008341
Change-Id: I7a8c28602d6c66b876b1e413791850bcaefdea98
Signed-off-by: Stephen Oglesby <soglesby@codeaurora.org>
2016-04-29 14:40:22 -07:00
Christian Borntraeger
9194c460b8 mm/debug_pagealloc: ask users for default setting of debug_pagealloc
Since commit 031bc5743f ("mm/debug-pagealloc: make debug-pagealloc
boottime configurable") CONFIG_DEBUG_PAGEALLOC is by default not adding
any page debugging.

This resulted in several unnoticed bugs, e.g.

    https://lkml.kernel.org/g/<569F5E29.3090107@de.ibm.com>
or
    https://lkml.kernel.org/g/<56A20F30.4050705@de.ibm.com>

as this behaviour change was not even documented in Kconfig.

Let's provide a new Kconfig symbol that allows to change the default
back to enabled, e.g.  for debug kernels.  This also makes the change
obvious to kernel packagers.

Let's also change the Kconfig description for CONFIG_DEBUG_PAGEALLOC, to
indicate that there are two stages of overhead.

CRs-Fixed: 1006743
Change-Id: I52c36765837cc873877b9398371ffd840d485a81
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Git-commit: ea6eabb05b26bd3d6f60b29b77a03bc61479fc0f
Git-repo: git://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
2016-04-29 14:40:10 -07:00
Trilok Soni
1b1799f498 defconfig: msmcortex: Enable various debug features
Enable various debug features like debugobjects,
sched debugging, page table dump, pid in the contexidr
to aid in debugging kernel crashes.

CRs-Fixed: 1006741
Change-Id: I7b992495fd98b4fdd08ea4b9a933b580d86a0a7d
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
2016-04-29 14:39:58 -07:00
Satya Durga Srinivasu Prabhala
9dc9260310 drivers: GICv3: Add isb() before mb() per GICv3 requirement
commit 0df0dc1c3f0f ("drivers: GICv3: Add mb() after the read of the
IAR1_EL1 and other registers") added mb() for ICC_IAR1_EL1,
ICC_PMR_EL1 and ICC_SGI1R_EL1. But, as per the GICv3 requirement,
an "ISB" or other context synchronization operation must precede the
"DSB" to ensure visibility of System register writes.

Change-Id: I519530cb9c7008aacbad1319f9159887f599dc9b
CRs-Fixed: 1004222
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2016-04-29 14:39:45 -07:00
Chandan Uddaraju
0030d5f8d5 msm: mdss: update header file with DP audio APIs
The current header file supports hdmi and audio interaction
using the exposed APIs. Update the common structures and the
APIs to support display port and hdmi interaction
with audio codec driver.

CRs-Fixed: 1009284
Change-Id: I3962fd0cbc278c403584e767611f11d841e14d4e
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2016-04-29 14:39:37 -07:00