clock_debug_mux is required for the 'measure' functionality of the clock,
register using the clk_register_debug for the same.
Change-Id: I95b64ddd3ef3d869cf3b8ad2b4210ea78ba8f5fa
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Common Clock Framework(CCF) already has a clock ops hook `debug_init` which
could be used for the debugfs clock measure functionality. Remove the APIs
from the CCF and update the 'debug_init' clock ops to the clock types which
require the measure functionality.
Change-Id: I0c01f72a9d1d1caa1b1ab73a800401c2cbc3216c
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The 'measure' functionality is a debug feature which allows the user of
clocks to allow measuring the frequency of a given clock using the ring
oscillator.
Move 'measure' code to a new clk-debug file to support the functionality.
Change-Id: I229721f17d232a4ff69b5cf416b43d22fee5b72e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Update the diag header with latest log, message
and event information to match the list maintained
by the peripherals.
CRs-Fixed: 2020864
Change-Id: Icbed01bb4f90fb7d72fe7517ee6964d799f1d48e
Signed-off-by: Chris Lew <clew@codeaurora.org>
MI2S ports supports multiple bit formats for Rx and Tx paths.
Add new mixer controls for supporting bit format for Rx and
Tx paths of all 4 MI2S ports in MSM8998 target. The bit format
for the MI2S ports will be used to setup Backend DAI configuration
through fixup function.
Change-Id: I1b9d154c900c9f9cf12ae7b279dc41b61af15faa
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
As per the hardware documentation, configure S2 reset type for
KPDPWR_RESIN PON configuration to DVDD_HARD_RESET. Since KPDPWR
S1/S2 timer and S2 reset type is configured by bootloader for
the internal devices, HLOS doesn't need to configure it again.
Hence remove it.
CRs-Fixed: 2017642
Change-Id: I000953dba1fd138c1dbcbb94e15f95ac78a07acd
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
On MSM8998 there is a HW bug that could lead to chip damage if
the 3.1V rail (normally provided by PM8998 LDO24) is turned on
while the 1.8V (LDO12) rail is off. A simple workaround is to
ensure that LDO12 is turned on prior to LDO24. Achieve this by
making pm8998_l12 the parent-supply of the pm8998_l24 regulator.
Change-Id: I091d47dbd640943f762f50798d3f009fbacedeeb
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Change the initcall level of qpnp-misc driver from module_init()
to subsys_initcall() so that the misc devices can be available
earlier. This helps the clients to access the registers under
misc peripheral sooner without a probe deferral.
Change-Id: Ie5df2cb9cf6842c59ec6f00ac9123994111f207b
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Frame request should only be accepted between SOF and EOF,
otherwise pingpong buffer will be switched before VFE configure
the correct buffer, which causes pingpong mismatch. Rejecting
all the request after EOF will make sure pingpong buffers are
written correctly and hardware have enough time to be configured.
Use a bool value to indicate if vfe is in correct region to
accept frame request. Set this value at SOF irq and reset it
at EOF irq.
CRs-Fixed: 1108472
Change-Id: Ibc8689a07aaf508cd706e532f9e2e764da8b4c37
Signed-off-by: Junzhe Zou <jnzhezou@codeaurora.org>
Parse the whole length of vfe intf to the validate function to avoid
the situation that the lower 8bits pass the validation while intf is
crafted to a large value which can cause buffer overflow later.
CRs-Fixed: 2008469
Change-Id: I0de19ec36d73918ab2f38eb7ba1f833c02a3face
Signed-off-by: Junzhe Zou <jnzhezou@codeaurora.org>
Add mutex lock to protect an active rotator session from being closed.
Without the lock, this can happen if a rotator closing IOCTL is
called from a separate thread.
CRs-Fixed: 2006159
Change-Id: I927a0c626bdae5ef149e12979ec4befdbac1b7f7
Signed-off-by: Benjamin Chan <bkchan@codeaurora.org>
While in DRP the legacy cable detection may fail. When a legacy cable is
detected the legacy input current limits are enforced by hardware.
Always assume a legacy cable since the legacy cable detection will
fail in some cases. Manually enforce the legacy input current limits to
ensure USB stability and compliance. As a side effect, non-legacy 22k
ohm and 10k ohm Rp adapters will be current limited to legacy standards.
To realize this:
- Set a limit of 100mA as soon as type-c is connected and remove that
limit once PD is confirmed.
- If PD is not confirmed:
- SDP: Use 100mA vote until USB PHY updates it to 500/900mA
- CDP: Use 1.5A vote
- DCP: Use 1.5A vote
- HVDCP: Use 3A vote
Change-Id: I049a7ee2099acd9e58df1b9417847daec4854af5
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
While in DRP the legacy cable detection may fail. Legacy cable
detection is essential to preventing CC OV damage.
Always assume a legacy cable since the legacy cable detection will fail
in some cases. As a side effect, non-legacy HVDCP adapters will stay at
5V if they have a 10k ohm Rp.
To realize this:
- Remove disallowing PD based on the legacy bit being set. That bit set
or unset is not reliable and it is safe to try PD.
- Remove the workaround which tries to fix legacy cable being set
incorrectly at boot. That bit set or unset is not reliable.
Change-Id: I37879866592f63906a7c688f51c309b4e2fee48d
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Currently to override the ICL the self-clearing ICL override bit is
used. The problem with this bit is that it is self-clearing and a
separate register needs to be read to get the override status.
Furthermore, the hardware will automatically clear this bit on USB
removal.
A new ICL override bit was added in PMI hardware revision 2.0. This bit
is not self-clearing, and can be set prior to USB insertion. Use this
new bit.
Change-Id: I30a601b6aacba3c404ebdfb82e529504a694a048
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Currently AICL will be rerun whenever PD requests a voltage increase.
While this works in most cases it can become problematic if PD requests
the same voltage twice, and the ICL may fall to ICL_MIN.
Since the voltage requests originate in the userspace it would be less
error prone to allow the userspace to rerun AICL instead. Do it.
Change-Id: Id190564e28bcffd72a1de70fa1327fce3e40299e
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
When APSD_START_ON_CC_BIT is set both VBUS and CC must be attached
before APSD runs. This eliminates all issues related to slow plugin.
Unfortunately this means that if CC is re-asserted anytime after APSD
finishes, then it will rerun again.
Fix this by disabling APSD_START_ON_CC_BIT right after CC is asserted,
and enable it after USB removal.
Change-Id: I27d3727647635b78392b925f0881dc3a4ef41623
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
A client vote can be enabled or disabled. Add an API which allows
consumers to check the enable/disable status of a client vote.
Change-Id: Ic4e9224c19e63fb88216da0cb775994e3e87c1f7
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Update mdp caps to enable concurrent write back feature
along with the QoS settings required.
Change-Id: Ie8368fb327e908a549877b06da0fed5917fc3788
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Some panels have low escape clock requirements based on which the
host escape clock should be configured. Add support to configure
host escape clock based on the panel escape clock. By default, the
host would be configured for an escape clock of 19.2MHz.
Change-Id: If791ffb4d49dd97424366042ee35bd4ecda5c185
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
Enable the laser sensor on the msm8998.
CRs-fixed: 1051771
Change-Id: Ie929092504ceb40bff283817e98b6cb0c4c05714
Signed-off-by: Wei Ding <weiding@codeaurora.org>
Laser sensor is connected using CCI interface.
Add support to configure and enable laser
sensor driver.
CRs-fixed: 1051771
Change-Id: Ia9eab96862b1c2a657d40272867f015a0a91e0ed
Signed-off-by: Bikas Gurung <bgurung@codeaurora.org>
Switching to micro-USB mode in PBS might cause charger FSM
to stuck, update the micro-usb mode switch sequence to reset
FSM and move charger FSM into micro-USB mode.
CRs-Fixed: 2017880
Change-Id: I6e4484e9a83494f81dad0d9cdbd815b62d67c9af
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
In the current implementation before triggering BTA,
DSI SW waits for extra time to skip display blanking period.
Add an additional check for active line count to ensure that
BTA is always triggered during display active region only.
Change-Id: Ife67f5a38fa9e8df6f8431e9d2b0179c207adeb2
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
ESD feature is enabled on the nt35597 truly panel on sdm660 to
check the panel status periodically.
Change-Id: Id354c900a784b1bf239595fd31a244c064066987
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
For some panels, escape clock needs to be updated for checking
the panel status periodically. Update the panel init sequence
to increase the escape clock.
Change-Id: I4a154d30e829c80587b3207ddc754aace927ab1c
Signed-off-by: Ashish Garg <ashigarg@codeaurora.org>
The CEA extension block in the EDID data contains a field which
specifies whether the sink supports basic audio. Ensure to read
this field in addition to the audio data blocks to decide if
audio should be routed to the sink or not.
CRs-Fixed: 2014586
Change-Id: I556d4bc0b2c95bdf7fd24fd11eafb96394bf03af
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
DP sink specifies the maximum per-lane link rate and the maximum lane
count that it supports as part of its capabilities. This would limit
the maximum data transfer rate that can be supported on the link. Use
this information to filter the list of EDID modes to include only the
ones that can be supported with the maximum possible link rate.
CRs-Fixed: 2018514
Change-Id: I4bc3a339935a49081bd45cb778737116d99ee7c2
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Incorporate the 2016-10-31 updates to the internal regulatory
database for South Korea.
Change-Id: I310bb8609c2298832e976e38ebe6b816c6faa5d0
CRs-Fixed: 2020241
Signed-off-by: Srinivas Girigowda <sgirigow@codeaurora.org>
Increase the strength of camera mclk0 on msm8998 HDK.
Change-Id: I9804d26265f074e1696f9b324ac8973100bb0a0e
Signed-off-by: Wei Ding <weiding@codeaurora.org>
Do asynchronous driver probing of TZ log driver to improve
the device boot-up time.
Change-Id: Ic972be12f820787db1a5bc957b109461354875fb
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
The frequency value that is calculated in Hz can be of a large value to
cause unsigned integer overflow. DCVSh though fetches the final
frequency value in HZ in a unsigned long variable, the intermediate
variable used in the estimation is unsigned integer. This will result in
a wrong frequency value being reported to userspace and clients.
Fix the overflow by using a unsigned long datatype for the frequency
computation.
Change-Id: I4bba53b9f5bd243c4aaaf67a831ce77ef231b38f
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
On MSM there is NOC time-out in case the 11AD device wake-up
latency exceeds 6.7ms.
In order to guarantee fast wake-up in 11AD BL, set USAGE_8
bit 0, which prevents deep sleep in BL.
In addition, to shorten the wake-up time in operational FW,
mark the FW to set T_POWER_ON to 0, by setting BIT 1 of USAGE_8
register.
Change-Id: Ic1084f0ba1a226723818f7e4a7b1d81ce30bb31f
Signed-off-by: Maya Erez <merez@codeaurora.org>
For "fast" stage 1 mappings add support to either force a buffer to
be mapped as coherent through the DMA_ATTR_FORCE_COHERENT DMA
attribute, or to force a buffer to not be mapped as coherent by
using the DMA_ATTR_FORCE_NON_COHERENT DMA attribute.
Both the DMA_ATTR_FORCE_COHERENT and DMA_ATTR_FORCE_NON_COHERENT DMA
attributes override the buffer coherency configuration set by making
the device coherent.
Change-Id: I465a88ee568fb6cd8206c26a62cbf02ac40328fa
Signed-off-by: Liam Mark <lmark@codeaurora.org>
Add guard in KMD to prevent hvx clk from being disabled when it
is not enabled.
CRs-Fixed: 2015469
Change-Id: I713a0f9a43e554753cc323451733f74afcafb034
Signed-off-by: Junzhe Zou <jnzhezou@codeaurora.org>
