'us' can overflow and can potentially cause unexpected wakeup.
Change it to uint64_t.
Change-Id: I943cbc9d62268ca073e388c287e3b180c0eaa8e3
Signed-off-by: Girish S Ghongdemath <girishsg@codeaurora.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Enable Secure Processor Communication (spcom) driver for msmcobalt.
Change-Id: I1196bc5495b08126adbcbdb7e4d7a65a4a08609b
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
This driver supports communication with secure processor subsystem
over glink transport layer.
The communication is based on using shared memory and interrupts.
This driver exposes interface to both kernel and user space.
Change-Id: Iec5fc78c8370002643b549e43015c06b09d8ab8b
Signed-off-by: Amir Samuelov <amirs@codeaurora.org>
It is possible that 'root' variable is used uninitialized. This
change avoids usage of uninitialized usage of the variable.
Change-Id: I9a3bd941a23736cb003f209cf6dde84fd859e9e6
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
It is possible that the 'tail' variable is used without initialization.
This change fixes uninitialized variable usage.
Change-Id: Idbd7d52797af2eeffcece19249055d5099a7fdb1
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
It is possible that the 'in' variable is used without
initialization. This change fixes uninitialized variable usage.
Change-Id: If26733110b29ec1c1150f1da50efa0c1ac6c2796
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
The DRAM size used for codec WCD9335 is incorrect, this is causing the
dumps to be wrong. Update the DRAM size for WCD9335 as per the memory
map.
CRs-fixed: 929517
Change-Id: Ie4815b4cedf429b0d7045b84381d945bde62d5ce
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
Since the underlying codec can have different memory map, it is possible
the starting offset and size for DRAM can be different as well. This
causes the collected dumps to be incorrect on some platforms. Fix the
ramdump collection to obtain DRAM offset and size from CPE services
which is aware of the codec being used.
CRs-fixed: 929517
Change-Id: I6a592d8f97da117d1e58154460cd0b8f3cbf62c7
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
During irq_disable, mdp_lock is held and intr status is checked and
cleared if any. If a new irq is triggered from another CPU at the
same point, it would ideally be waiting on mdp_lock held by the other
CPU. And when the mdp_lock is released after clearing the irq, mdp_isr
is executed and at this point, clks might have been disabled. To avoid
it, protect the clk_ena variable with mdp_lock and also check for the
clk_ena status and skip irq handling when it is disabled.
Change-Id: Ic71d2b6f877ca3510a0d0fa593a8a0c17e93d8f3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
According to the latest hardware guidelines, only L2 and L3 cache
HMSS ACC settings need to be programmed based upon the level of
their voltage supplies. Update the apc0_pwrcl and apc1_perfcl mem_acc
regulator devices to adhere to this requirement.
Change-Id: I94032f6fbe5920a8d446c58c763afa29705e527a
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
On few recent targets APSS L2 memory is moved to APC domain which were
earlier on Mx domain. This can cause inrush current while bringing up
huge memories like modem and adsp.
To mitigate inrush current, bring up comparatively lesser memory in
size(for eg MDP memory) before bringing up huge memories like modem or
adsp. This way MDP memory introduce an intermediate load on MX rail.
During boot, gdsc driver will set MEM and PERIPHERAL bits. This driver
makes sure that dependent subsystems are powered up. Once done, call
gdsc_allow_clear_retention() API to allow retention of MDP memories.
Change-Id: I54011eb1b6cc38b2c33a67b8b9cc5eaadbd42c6a
Signed-off-by: Arun KS <arunks@codeaurora.org>
Soundwire hardware has two banks for configuring soundwire
slave ports. After playback is stopped, disable soundwire slave
ports in both banks to avoid any port collisions during the start
of next playback on other slave device.
Change-Id: I5cfd1d985a1ca5fd7b4020d7e14697642f207501
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
In case of independent dual DSI configuration, the GLBL_TEST_CTRL
register for both the DSI PHY should be set to 1. This change adds
proper check to handle this case.
Change-Id: I6c16c1a359541ea0d3c5430a331f47b55e4bd8cc
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Add all cpu notifiers in CONSOLE_FLUSH_ON_HOTPLUG config
flag to avoid hotplug latencies and by default config
CONSOLE_FLUSH_ON_HOTPLUG flag is disabled.
Change-Id: I389f207d8faf84cfd4267d52213e40a47a43774d
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
Current code does not reflect the correct panel information
when user space request the panel info and fps data
after the fps update when using the clock method.
This change fixes the code, so further calls to get
the screen info have the correct panel data, as it
is done for vfp method already.
Change-Id: I2cae33cad02f43a9b887c8bdc55aca876e47a99a
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Set the GPIO based on the flag parsed from DTSI. To enable the
switch gpio set the flag and to disable set inverse of the flag.
Change-Id: Iddbe654f2cc6c7e2c5815798099f88d2154d76d5
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
On smart panels, Early Clock Gating (ECG), is initiated when current
frame transfer is finished and no new frame update is queued. To track
these two different states, driver maintains the state machine
for HW transfer and SW's new frame update. Currently SW state machine is
cleared only after HW transfer has started. Now in normal scenarios SW
state should be cleared before HW is finished and if there is no new
frame update queued then ECG will be initiated. However due to CPU
scheduling, thread that needs to clear SW state got preempted. In the
meantime HW finished the transfer and updated its state machine in the
interrupt context. Since at this moment SW state wasn't cleared, ECG
was not initiated. Avoid this situation by clearing SW state before HW
transfer is started.
CRs-fixed: 941832
Change-Id: I44828c6077eb8729162127b521f4fd4add2e3bcb
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
This change enables clock update method as default for sharp
WQXGA panel for changing refresh rate of panel.
Change-Id: I08f1a4ee446318174824dbd26dcf9682dbabddc9
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
It is possible to change the refresh rate of the panel by
changing the byte clock and pixel clock to the required panel supported
frequency. This change adds support to program dynamic refresh
registers and trigger the dynamic refresh interrupt. Once the current
frame is done, hardware ensures that the change in clock frequency is
taken effect within the vertical blanking period.
Change-Id: I3a1e0eb478c34111e94f977088c20e9a50c4ef25
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Populate the AFE topology for the RTAC
voice and device structures which allows
retrival of AFE topologies for RTAC
clients.
Change-Id: Ib47e6b04cdfe7146315a800a3f54f9932d54cadc
Signed-off-by: Ben Romberger <bromberg@codeaurora.org>
vsync_handler added in lp2 (doze_suspend) power
state enables the vsync on hardware. That can lead
to unclocked register access because device can go
in pm_suspend in this power state. This change blocks
the vsync_handler processing in lp2 power state.
Change-Id: I4386baa6bc2f8303928edade79108b4983f66f42
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Expose the bandwidth limits and status of bandwidth
limit request to the userspace through sysfs entries.
Change-Id: I697138546689e8d9943c3e5ff47ae6a924b8ddfb
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
WCD9335 can transport data to and from device through I2S and I2C.
Update the change to support I2S/I2C interface.
Change-Id: Ifdec293510adf685410a4fb6ef6a3e939c4ee04b
Signed-off-by: Deven Patel <cdevenp@codeaurora.org>
Add support for NT35950 4K DSC command mode panel. This panel
support DSC with 3:1 compression ratio.
Crs-Fixed: 922330
Change-Id: I6b0c2913851ec948ae84931396276c929bf63b7f
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
struct kgsl_mmu is a static member of struct kgsl_device so we can
use the usual container_of trick to get the device from a mmu
pointer rather than carry around an unneeded back reference.
Change-Id: Ic0dedbad7ff22e598b03d980dfbb738374ed5a7a
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
The MMU code does most of its magic by way of device specific MMU
and pagetable functions. Add macros to make it easier for developers
to verify that hooks exist before calling them.
Change-Id: Ic0dedbadf74682adebec1a973384e1d3bbf4f79e
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
a5xx_post_start() is currently only used for either an A530 workaround
OR preemption. If neither are allocated then memory is allocated in
the ringbuffer for no reason and it confuses everybody.
Change-Id: Ic0dedbad7615ba0593da5eb701cc5943877883f4
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reduce the VDD_GFX CPR max aging adjustment from 25 mV to 15 mV.
Aging characterization has shown that at most 15 mV of additional
supply voltage is required as the device ages.
Change-Id: Ia96ff89afea16df6bfae9471a65dbf1a421b3f45
Signed-off-by: David Collins <collinsd@codeaurora.org>
Reduce the VDD_APCC CPR max aging adjustment from 25 mV to 15 mV.
Aging characterization has shown that at most 15 mV of additional
supply voltage is required as the device ages. Also lower the
open-loop adjustment for each corner by 10 mV (except for
apc1_vreg) for CPR revisions 3 - 7. The open-loop voltage had
previously been increased by the 25 mV max aging adjustment
amount to ensure that there was room for the closed-loop voltage
to increase based upon aging. The lower open-loop voltage allows
for LDO operation at a lower voltage which saves power in some
scenarios.
Change-Id: I9951fa60999673896c81447341b06d683dbcf285
Signed-off-by: David Collins <collinsd@codeaurora.org>
The vsync_retire worker registers for vsync_handler and
removes it when client requests power_off. It may
possible that vsync_handler is removed from list
through two different contexts. One from worker thread
and other from ctl_stop_sub call. Such race condition
can lead to list corruption. Ideally, ov_off should
wait for retire worker flush before calling ctl_stop
to avoid such race condition.
Change-Id: I7d68d67d1fe1df07e568a5f40db745ce155d7d14
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This support is needed to enable GSO (Generic Segmentation
Offload).
Change-Id: Ib6e7a5a5f3139697e0b6c68782134377a7bb2dc6
Signed-off-by: Ravi Gummadidala <rgummadi@codeaurora.org>
Save mdp/rotator buffers' smmu domain and DMA
direction information for debugging purpose.
Change-Id: Ica05a90e7a139e8d2259f669530aea75d86c93e9
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
In OBS, enable/disable UART IRQ during power management operations
to allow the device to enter low power modes.
Change-Id: I8479d6bc867c4ecb34adf83cd62b01f6fb60fef8
Signed-off-by: Naveen Kaje <nkaje@codeaurora.org>
Add sysfs node s3d_mode for stereo 3d support,
configure vendor info frame when 3d mode is set and
current video mode can support it. Output edid_3d_modes
in sysfs node in correct format.
Set 1 to s3d_mode will enable side by side, 2 for top
bottom, 3 for framepacking, 0 for 2d.
Change-Id: I634da4ffbd4e7994113d805c3c8facef3c9a5a25
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Disable idle pc during unblank, because LPM could introduce
big delay from waiting for DSI DMA.
Change-Id: Id11bf3f3015fa1ea4b22d1e1c2abd380cd8b65a2
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
If there are concurrent sysfs reads of snapshot binary
there can be a race condition where the snapshot data
is prematurely free'd by one reader while the other reader
is still reading it. Fix this by proper refcounting using
an atomic.
CRs-Fixed: 902816
Change-Id: I7a156c3a22f5475df0394ae30328d0fd6140f3da
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Move the qcom specific device tree files to the arch/arm/boot/dts
directory, and add a symlink from arch/arm64/boot/dts/qcom to said
files.
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
MHI driver stack logging to the private IPC log buffer can be quite
expensive from a MIPS perspective. Enable such MHI logging
if and only if such logging is desired in defconfig.
Change-Id: I4a16eedc2424d250129b1b44a91d1fa32be399f5
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Certain corner cases have been identified in the MHI core power management
state machine whereby the driver state can go out of sync with the
device.
The cases are as follows: During in MHI resume operation the device
is not guaranteed to be fully recovered from LPM as the framework
requires. This causes RPM suspend to potentially be invoked
on a device which is still going through a resume state.
During RPM suspend action, if said action is cancelled a timing
window exists where previously cached commands are not played back
to the device. This causes a rotting command issue, when said commands
are never acknowledged causing a non recoverable timeout error on the
client channels.
During an RPM suspend operation, a timing window exists where
the device may be transitioning to M2 when the M3 is set. This causes
a device error which is non recoverable except by a full reset.
CRs-Fixed: 856202
Change-Id: I232365ba77b02b9aec87fef4cecc3d991243afe2
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Do a read after write for M3 to flush the write to the
device.
Change-Id: I0cf8c8a9dcf3599614351e1289f4b56a0fe32289
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Initialize the transaction status return code for the client
to a known value.
CRs-Fixed: 836433
Change-Id: I8023bd29b6ce36f69dfc3d2844803696eacadeb1
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Eliminate race condition whereby the device could go into
a low power mode before the host has finished initializing.
CRs-Fixed: 836441
Change-Id: I9957e87b1bfe956963c1f74f0a02d6714e9afcbe
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Initialize the client interrupt moderation capabilities to enable
correct marking of TRE moderation flags.
CRs-Fixed: 850216
Change-Id: Ic7a51fd1f089a847f225f23202183033352d0761
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
Replace dma_to_virt and virt_to_dma with mhi_p2v_addr and mhi_v2p_addr
Change-Id: Ibda473254040cbd1f5fdf9eb463c14996d5fe12a
Signed-off-by: Andrei Danaila <adanaila@codeaurora.org>
