The mmc host needs to perform at its peak when clock scaling
is disabled, hence switch the frequency to max.
CRs-fixed: 981387
Change-Id: Ie959b8e565ee2dad53cdd9d913bcb8696519d7ca
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
CMDQ shutdown path calls blk_cleanup_queue, which changes queue_lock
from driver lock to it's original request_queue lock.
Hence during above shutdown process if below sequence is exercised
as well then may see below spinlock bug.
a) Some process say iozoneA has already acquired queue_lock (which
is md->lock).
b) adb reboot has been issued and CMDQ driver has completed calling
blk_cleanup_queue which switches the queue_lock from md->lock to
q->__queue_lock.
c) ProcessA tries to release queue_lock but finds an unbalance that
the lock is already released
Hence remove blk_cleanup_queue and instead make sure there are no
active_reqs in flight by mmccmdqd before this kthread is exited.
Callstack:
<6> BUG: spinlock already unlocked on CPU#6, iozone/4391
<6> lock: 0xffffffc06ab8be80, .magic: dead4ead,
.owner: <none>/-1, .owner_cpu: -1
[ffffffc0420e3b28] __delay at ffffffc00031a328
[ffffffc0420e3b38] __const_udelay at ffffffc00031a304
[ffffffc0420e3b58] msm_trigger_wdog_bite at ffffffc0004476cc
[ffffffc0420e3b68] spin_bug at ffffffc0000e4554
[ffffffc0420e3b98] do_raw_spin_unlock at ffffffc0000e47a0
[ffffffc0420e3bc8] _raw_spin_unlock_irq at ffffffc000db3ee0
[ffffffc0420e3be8] blk_queue_bio at ffffffc0002ff1e4
[ffffffc0420e3bf8] generic_make_request at ffffffc0002fd210
[ffffffc0420e3c58] submit_bio at ffffffc0002fd328
[ffffffc0420e3ca8] submit_bio_wait at ffffffc0002f5768
[ffffffc0420e3d00] compat_sys_call_table at ffffffc00008e000
[ffffffc0420e3d18] submit_bio_wait at ffffffc0002f574c
[ffffffc0420e3d38] __blkdev_issue_flush at ffffffc00030043c
[ffffffc0420e3da8] blkdev_issue_flush at ffffffc000300494
[ffffffc0420e3dd8] ext4_sync_fs at ffffffc0002597a4
CRs-fixed: 953541
Change-Id: I769cc25c14b6d873f64a898d6b73f33cc59d9c5d
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Due to recent DDR52 lower bus speed mode in clock scaling,
there is a mismatch between the clock frequencies used by
the devfreq framework and the MMC driver. Due to this, SDCC
clock is sometimes running at DDR25 and ICE clock is running
at 100MHz causing the power regression. Fix this mismatch by
initializing the frequencies properly during MMC resume based
on the current ios.clock.
CRs-Fixed: 974940
Change-Id: I09fe888d0fbd1fde3f6a6f32806315ddbb5bf6e1
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Some eMMC vendors violate eMMC 5.0 spec and set REL_WR_SEC_C
register to 0x10 to indicate the ability of RPMB throughput
improvement thus lead to failure when TZ module write data to
RPMB partition. This change will check bit[4] of EXT_CSD[166]
and if it is not set then change value of REL_WR_SEC_C to 0x1
directly ignoring value of EXT_CSD[222].
CRs-Fixed: 866059
Change-Id: Ibd12c94ad691eca1fa3ea2049b750a6e98178678
Signed-off-by: xiaonian <xiaonian@codeaurora.org>
Signed-off-by: Pavan Anamula <pavana@codeaurora.org>
Some controllers doesn't have any limitation on the memory
it can address. Hence, the bounce limit parameter must be taken
based on the device dma_mask.
Currently it is set to BLK_BOUNCE_HIGH, which may cause bouncing
of memory higher than this limit. Use dma_mask as the limit for
queue bounce parameter to avoid this unncessary memory bouncing
in the block layer.
CRs-Fixed: 964435
Change-Id: I0955438a540ca9adf5bcd3a0dbf9201a5ef456a5
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
For any commands, that are sent during tuning sequence
CRC errors are expected. But if SDHCI_NEEDS_RETUNING flag
is set, then it will recursively do the tuning and gets
stuck in tuning. Fix this by not allowing the re-tuning to
happen while it is already in tuning process.
Change-Id: I9cc39f03a01c34f2f5639d4c20776fd575c25231
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Make sure we don't peek the block layer queue and act on it when
block queue is stopped. The block queue will be stopped when mmc
block is suspended, wait till it is properly resumed before pulling
new requests.
Change-Id: Ifc369687c13dae904271e8f92d3604edbd667d82
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
It seems that when we are configuring sdiowakeup_irq, we are
receiving a spurious interrupt which sets sdio_pending_processing
state to true.
Now, if the sdio card is physically connected but wifi not enabled
in that case suspend functionality will be broken sdhci_msm_suspend_noirq
will return -EBUSY if sdio_pending_processing is set to true.
Thus fix it by setting this flag to false after we have disabled
sdiowakeup_irq.
CRs-Fixed: 957968
Change-Id: I755b0b5602345ad6bf557c6055b9057012de0797
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
There are many valid WMI commands with only header without any
additional payload. Such WMI commands could not be sent using
the debugfs wmi_send facility. Fix the code to allow sending
of such commands.
Change-Id: I581e099db5d2ee81be4345101aa54352b1d9564f
Signed-off-by: Lior David <qca_liord@qca.qualcomm.com>
Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Git-commit: 69218a48005d0c93b8e9ec483f42ead481a43034
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
CRs-Fixed: 1015627
Signed-off-by: Maya Erez <merez@codeaurora.org>
Add a check on cmdq_host->ops to avoid NULL pointer
dereference, if sdhci_dumpregs is called before
initializing cmdq_host->ops structure.
Change-Id: Idd1794e162c7a53cc63504e15e6e490481f104a3
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Change mdelay to udelay to fix 100sec waiting timeout
bug in sdhci_reset. sdhci_reset is intended to only
wait for 100msec.
Change-Id: I6b5c9b10daf7cd8a7faf16ac6bdb09c5079a39e9
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
If during early boot register dump is called, then
there could be a NULL pointer dereference since mmc_host
structure might not be populated with cq_host info.
Thus fix this by using sdhci_host to get cq_host structure info
in sdhci_msm_cmdq_dump_debug_ram.
Change-Id: Ieaca7887001daabd4a6a0b05f7b0048dc11bbeee
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
cmdq_halt and cmdq_disable gets called from cmdq_irq in case
of error. Thus add cmdq_disable_nosync and unhalt support
in cmdq_halt_poll which can be called from irq context.
Change-Id: I172e0e29a5584f02dd96c8af5ea1b97dc8c46083
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
No need to call post_req if it's a DCMD request
completion.
Change-Id: Id11165967e316b1e556aaeb6d67bd18844cee6e1
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
In case of error, software may power cycle/reset both
controller and card. Thus even if auto bkops is enabled,
mmc_set_ios can be used to power-off/power-on.
Fix this by removing this condition from mmc_set_ios.
Change-Id: I88a610ecbcc4036ac8ba99bc54706243b40db391
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Currently cmdq discard requests are not using same
softirq completion path as other cmdq request. So there
is no way to detect any error and handle it in case
of error of DCMD requests.
Make cmdq discard requests use blk_complete_requests
which complete via softirq completion path.
Change-Id: I1e03c81bc6fee8266cf1c86bada015e548770d7a
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This does following:
1. Adds support to handle multiple cmdq software requests timeout.
Currently we schedule error handling work for the first timedout
request. We requeue all pending tasks, knock off all tasks from
device queue and reset card and controller as part of this, then
for all other software requests timeout, if it comes while executing
error work, we return BLK_EH_NOT_HANDLED.
This fixes BUG_ON in case of multiple requests timesout together.
2. Current code resets CQE, power cycle the card and requeue all the
requests in case of any error.
3. mmc_blk_cmdq_err work takes care freeing up all resource allocation
like clk and rpm hold, in case of reset_all.
4. Currently we were never clearing error CMDQ_STATE_ERR in case of any
error. This patch takes care of this bug.
Change-Id: I83d483c11fe2d7f2e462086cc3c0932057304c0d
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
[subhashj@codeaurora.org: fixed compilation error]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This patch does following-
This adds an API(mmc_cmdq_hw_reset), for RESET_ALL
of SDHCI, power cycle mmc card and
reintialize it, which enables cmdq as well(if supported).
This acquires claim_host before calling mmc_power_restore.
mmc_power_restore should be called with claim_host acquired,
since this function is required from non-claim-host context in
cmdq error handling.
Change-Id: I31c4449dead1d4ad4e10a4822cce2298ec5fb4b6
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts, dropped some changes
related to mmc_do_hw_reset]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Call mmc_/cmdq_post_req with tag number instead of
mrq. This is needed in error handling as part of multiple
request error handling.
Change-Id: I175432639d28378ec74669e31deb4d1667c49bb8
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This adds WA to handle few CQE error which
can cause HALT to fail or can give CQTERRI info
as NULL.
Like - currently there is a HW bug that in
case of ADMA error CQE will not stop and CQTERRI
register will not be updated with any valid values.
Halt will also most likely fail in case of ADMA error.
Thus possible WA for this is to disable CQE,
do reset_all and requeue all the requests in flight.
Change-Id: I5aaddbb7bec1de7dbc959144dc2f1a5ad16789ff
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Add a check in mmc_cmdq_ready_wait to not pull any
requests in case if CQE is disabled and card is not suspended.
This means that CQE must be in error state and so mmc_cmdq_thread
should stop issuing requests.
Change-Id: I0c5e6556d3d881f1a675db4fff4f995de024ddf8
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
There could be a case where after platform device (sdhci_msm)
suspend, (where external gpio to IRQ is configured for wakeup
in case of sdio) external gpioIRQ is raised before
system suspend is completed.
To solve this problem we use a flag to signal
sdhci_msm_suspend_noirq to abort suspend with -EBUSY signal.
Change-Id: I82617d5a02674af24d330601e41fb3c20278f672
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This patch adds following helper API/info -
1. cmdq_halt_poll to halt the controller using polling
method. This is to be mainly used in case of an error
from cmdq_irq context.
2. Adds num_cq_slots & dcmd_cq_slot info to
mmc_host structure. This can be useful info
for mmc host structure like in case of handling
of multiple error requests
3. Adds CMDQ_STATE_CQ_DISABLE for cmdq host.
In case of an error if halt also fails, CQE error handling
code will disable CQ. So block layer needs to know
- to not pull any requests in such case.
Change-Id: I8e9a8d5094db82336917fcca4361ce84316c34ef
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
cmdq_irq should be handled before clearning error interrupt.
Because in case of an error CQE needs to be halted/disabled
in cmdq_irq, before we clear the error interrupt.
Otherwise, CQE might start processing other requests whose
doorbell is set, even in case of error in previous completed
request.
Change-Id: I8c77ca08dcf440293844120c1b59d2dada84bac5
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This change reverts the following gerrits as they cause the
timeout issues with Hynix cards. Also, the latest code supports
sleep/awake through CMD5 and hence MMC_PM_KEEP_POWER need not be
set for Hynix eMMC cards.
edcf5be "mmc: host: add detect vops chain"
09287cb "mmc: sdhci-msm: configure MMC_PM_KEEP_POWER for SDIO"
7cf603a "mmc: schci: add support for MMC_PM_KEEP_POWER in eMMC"
c085820 "mmc: core: set MMC_PM_KEEP_POWER for certain Hynix mmc cards"
CRs-Fixed: 947299
Change-Id: If863771191ee7c2b717d5817f4a88e4ad936653a
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Configure the controller to send the QSR at 1 clock period.
This would send SQS(CMD13) when no data transfer is in
progress. This decrease in the polling period increases the
performance of the device.
CRs-fixed: 891366
Change-Id: Ic2807c6334a778b5f0c89fb605c6923a44f7624a
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
When mmc request timeout occurs (eg. card is not responding), it is
possible that devfreq update poll interval ended and devfreq update
started. Update context takes devfreq lock and block on
__mmc_claim_host(). Error handling flow (same context that executes mmc
request) tries to suspend clock scaling, the flow is trying to take devfreq
lock while holding (and not releasing) mmc host. Although it is
incrementing devfreq_abort counter, but it is not enough to cause devfreq
update context to release devfreq lock, because the context scheduled out
from execution.
This patch wakes up devfreq update context, it causes to break polling loop
waiting for mmc host exclusive access (because devfreq_abourt countr > 0),
so devfreq lock will be released and clock scaling may be successfully
suspended.
Change-Id: I3d1e7b38d7d281594b49d8452198ed4c1e550b73
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>
When in SVS2 on low load scenario and there are lots of requests
queued for CMDQ we need to wait till the queue is empty to scale
back up to Nominal even if there is a sudden increase in load.
This impacts performance where lots of IO get executed in SVS2
frequency since the queue is full. As SVS2 is a low load use case
we can serialize the requests and not queue them in parallel
without impacting other use cases. This makes sure the queue gets
empty faster and we will be able to scale up to Nominal frequency
when needed.
Change-Id: Idbe7e939e01327061dfa5de93c0eaed59b910592
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
When we do blk_end_request, request pointer may get freed.
Therefore cache request_queue pointer and tag value at start itself
instead of dereferencing already freed request_queue pointer.
Change-Id: I35def3ef6a260ebe78e92874ac121aca529f00cf
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
After reading ext_csd, the host is not claimed while
doing unhalt if the card is in CQ mode. This may race
with RPMB context which tries to halt and disable CQ
in the card. This may unhalt the controller while RPMB
is still going on, resulting in software request timeout
for RPMB commands that are supposed to be sent in
legacy mode with controller in halt state.
Fix this by claiming the host till the unhalt is done
in mmc_ext_csd_open() so as to prevent race with RPMB
context.
CRs-Fixed: 935719
Change-Id: I6d2738b21c3cd44c8fb6c99f63291059d5b18ee1
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
If an RPMB request is the last request to be done before shutdown,
then the card will be already switched to legacy mode as part of
RPMB request handling. Later, in the shutdown handler, we get this
error if we try to switch to legacy mode again.
mmc0: failed to switch card to legacy mode: -74
CRs-Fixed: 935717
Change-Id: Ie75ba225412d0fecce9c98f07334b570a6cd5772
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
The lower bus speed mode to be used during clock scaling may
vary based on the target. Hence, add a new dtsi property to
define this bus speed mode.
Change-Id: If8e2d125b8246ca479f816a475940bb357138297
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
Add support for DDR52 bus-speed mode during clock scaling.
The reason for this change is DDR52 can be supported at SVS
mode.
Change-Id: I68e5fca57ae5cbc154f5dd7001df368900cb3f57
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
By delaying the QoS vote removal, there is some improvement
in performance in single threaded use cases.
Change-Id: I80545486057c55c697b72b56d57e2ea47cff86b9
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
* Removed spinlock as it was not locking against anything
* Removed conversion of interrupt status to error number
as it is not used by API client, and in case several bits are
set only 1 error is ever handled and the rest get lost.
Instead pass to the client the complete status.
* Removed redundant includes, variables
* vops structure is returned after performing a lookup in the DTS.
There's no need for that as we already know the structure
to return.
* Other minor corrections
Change-Id: I6d2549ce04c9e4b19fdd8fe3dfee03d83bfd9d77
Signed-off-by: Gilad Broner <gbroner@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts, dropped ICE & UFS
driver changes as they are already present]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This adds external GPIO wakeup support to sdhci-msm driver
for sdio cards.
Change-Id: Ic3e280b975d293ea8adadadafecfa8115fe5f428
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
This removes disabling of clock-gating for qca6574
& qca9377. Now since async card interrupt support for
sdio card has been added(3c5351c0643a), re-enable
clk-gating support for sdio cards.
Change-Id: Ib497556f10c9c6576a3e0a3592f6755c8725370c
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
SD host controller have asynchronous interrupt support
capability to detect card(sdio) interrupt
even when clocks are gated(to save power).
This patch add support and enable this capability/feature to
of SD host controllers for sdio cards.
Change-Id: Ic1945355a19ebfdb3bd000bf8138d8001cea53f6
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
[subhashj@codeaurora.org: fixed merge conflicts & compilatione error]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
This removes direct enabling of MMC_CAP2_ASYNC_SDIO_IRQ_4BIT_MODE
capability from sdhci-msm driver.
This capablity needs to be enabled based on reading HOST_CAPABILITIES
register.
Change-Id: I74c2877d5906ee9e2180fdb8d50167af6d03b3af
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
This change adds support for new drive strength.
Before this change sdhci-msm supported only 3 types of drive
strength, starting from eMMC version 5.0 there is additional
drive strength.
Change-Id: Ib0bf945560107ec732e7ffeb7653d271d8d91c2f
Signed-off-by: Talel Shenhar <tatias@codeaurora.org>
[subhashj@codeaurora.org: fixed minor merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Add mmc_get_card() to make sure host is resumed before sending pon
command. Also, add mmc_put_card() after completing pon command so
that it can release the host and also vote for runtime suspend.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Change-Id: I52f4d854388a608c6a09e55a693e3b36bd801fd8
Commit 66a7393a3ba9685d1eddfbce72e3ef8f4848f19f ("mmc: block: ensure CMDQ
is empty before queuing cache flush") added a workaround for particular
vendor's eMMC devices. Workaround was to wait for all the outstanding
requests to finish up before queuing the flush request. Now detailed
root cause analysis from vendor shows that original issue can happen only
if DCMD command is sent to device too quickly (within less than 6
microseconds) after completion of previous small sector (less than 8
sectors) read operations. Hence with this change, we are fine tuning the
previous workaround such that it would almost have no impact on the storage
benchmark performance numbers.
Change-Id: I1df1c5d7bbcd7b526236651077b7dade2626cb30
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
eMMC runtime suspend first puts the CMDQ to halt and then sets the card
state to suspended after sending out sleep command. If new requests get
queued after halting the CMDQ but before the card state has changed to
suspended then command queue thread will not be woken up again until
some new requests are queued to request queue. And if new request gets
queued, we will remain in this state forever. Fix this issue by kicking
the CMDQ thread after the suspend completion.
Change-Id: I37a03d9a75acf2ab3ebda57da87e246b449abf18
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
eMMC CMDQ is pretty latest feature and we may continue to see issues
due to HW & SW immaturity. To debug these issues, we should have the
host controller register dumps along with current SW state from rampdumps.
This change adds the BUG_ON to crash the system in case of eMMC related
command timeouts.
Change-Id: Ib832aef6eb9ef3941fbe9e73852929c835e97847
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Some devices might stop responding to new commands if device cache flush
is queued to host controller while host controller is still processing
outstanding requests.
To workaround this issue, we are making the cmdq thread to wait for all
the oustanding requests to be finished before queuing cache flush command
on host controller.
Change-Id: I15387734f51ca4cadfc9e11270f14d8a0806a00f
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
[subhashj@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
The current code has some compilation errors when compiling for
single core configurations. This fixes those errors.
Change-Id: Idd1d1bab343cf5cf1e35f229d913d16a7854f358
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Disable power management features for SDIO as the current code is
not ready to enable it.
Change-Id: I234ebf6cc46d2a3b70bf9ba3f94b4b1abc1acd44
Signed-off-by: Pavan Anamula <pavana@codeaurora.org>
