Horizontal porch values for DSI were set incorrectly when
Frame-Buffer Compression(FBC) is enabled. This fixes incorrect
DSI clock frequency calculations when FBC is enabled.
Change-Id: Iba9c3fc193148e3dcb31f1c11a37ae120e8707d1
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
The scm library has added support for a new secure world
interface that is more aligned to the ARMv8 SMC calling
convention. Use the new API while maintaining backward
compatibility.
Change-Id: I152cf98a9a434430ce7e615227b252c6bd9a12e8
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Clean up the ad lock and bl_lock to avoid potential deadlock, and
remove no longer needed code for assertive display, including extra
AD parameter setup triggered by backlight change, auto backlight mode
support. Also change the AD backlight linearization LUT from 8 bit to
12 bit values and upgrade the mapping from point to point mapping to
piecewise linear mapping.
Change-Id: Iac4e3de0f96f24ece4220dc740d781324265ffa8
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
MDP was dividing the porch values for Frame-Buffer Compression(FBC) by
the compression ratio incorrectly. Only the x-res needs to be divided.
This fixes the mismatch of timing values between DSI and MDP.
Change-Id: I8c57d807ac9d2b451031641da7971b4c33a66a36
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
WFD Buffers are not getting freed as the WRITEBACK
TERMINATE ioctl is returning early. Remove early
return such that writeback terminate executes and
free the buffers.
Change-Id: I1d5b419ad2dcf863ade1be21c0fbe7d944317005
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
In the QDCM tool, toggling from DCM state to DTM state fails
because system unblank doesn't happen successfully. The root
cause of the issue is at the DCM_BLANK, the overlay_off is called
before setting the panel_power_state to OFF, due to which
overlay_off doesn't suspend properly. Therefore, rearrange the
order to fix the problem.
Change-Id: I130fe711dc0d679d8205d22a9027d1c179ed49d5
Signed-off-by: Zohaib Alam <zalam@codeaurora.org>
While updating refresh rate through dynamic fps node,
clock calculations are still needed for the slave controller
and enablement of clock for slave controller is not needed.
This change fixes clock updation of slave controller with
dynamic fps feature enabled.
Change-Id: Ibabe9bddba0633cc9a3441207f39a2f3fa7a8f71
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Update the panel info node with dynamic fps feature parameters
for userspace to use. Also, expose minimum and maximum refresh
rate supported by the panel through panel info node.
Change-Id: I0f540faf8fabf951d03f2211e4fbbc9a7e71f457
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Return positive value (number of bytes sent or received) and 0
for failed cases for DSI command Tx and Rx functions for
consistency reason. Also update the return values of the APIs
that are dependent on the tx/rx functions.
CRs-Fixed: 704825
Change-Id: I6e8862c6987ee581f3baa7dce40da4e701cfaa2e
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Currently, for long read response commands, we expect padding
bytes from the panel. However, there might be some panels which
do not support this. Hence, avoid padding bytes during DSI commands
rx and do honest request for reading bytes from the panel. Also due
to this issue, during multiple read requests (expected rlen > 10),
there is possibility that we end up reading same data byte multiple
times and storing it in the rx buffer. Add support to skip the
duplicates by updating the rx data buffer properly.
Change-Id: I2e482924f7275b63d023c947f4a4f27678522e5a
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Currently, for long read response commands with rlen less than
8, there are padding bytes being expected to be sent by the panel.
However, there might be some panels which do not support extra
padding bytes. Due to this, the read response might not be stored
in the first byte of the rx buffer.
The RDBK_DATA_CTRL register is available from DSI6G v1.1.0 and
above. Make use of this register to check the number of bytes
returned by the panel. Based on this, calculate the offset of
the first valid byte of the response in the rx buffer. For
targets which do not have this register, calculate the offset
based on the software state of the read length variable.
Change-Id: I94d3f6d7a453f925bdfd967cdb23cf6aab1ac3a8
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
The minimum value of parameter for Maximum Return Packet Size
command before DSI command rx should be 1. Avoid any DSI read
commands with rlen value of zero.
Change-Id: Ieaf8d3f478047e726888f29db2838dbb7196d57a
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Update the programmable fetch start line register during variable
refresh rate (VRR) operations. This is needed since the vertical
front porch value changes when there is a change in fps. Also, do
not perform fetch start configuration during boot up when
continuous splash screen is enabled. The feature will be enabled in
LK. This is needed for proper VRR operations until first suspend
resume.
Change-Id: I5c82bc520da53db958ad0fad4217f00d92a25cae
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Expose dsi phy registers as well, as part of the debugfs
interface in addition to the dsi controller registers.
Change-Id: I49c8723e9f650137990df31b099c67e3b08907a3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Fix potential stack corruption issue which is possible
due to different datatype for arguments used in callee
and caller function.
Change-Id: I564f62af7574c8eaa3ac8f55de0f0732223cae42
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Enable interrupt usage and use it by default. Redefine
command data structure to reduce call stack. SW mode
and panel read function have been added for debugging.
Change-Id: I5eb9e5ad2df8e1cd8af868f5aa9ededafb3307f1
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
DSI PLL 1 leaks current after a phy s/w reset. Add support
to re-program the PLL 1 registers and correctly turn it off.
Change-Id: I9184951d0d095b188ade13faff8d834fa9bd5010
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
For DSI 6G fill the irq information at correct place so as
to avoid the crash and also call irq disable soon after
requesting for irq.
Change-Id: Icbf6f24fc6d938f1943f124f3d7368187743b36d
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
With dynamic refresh feature enabled in immediate clock
update mode, update the mipi frame rate as well to the
new rate.
This is required for calculating sleep time for retire
fence count to be accurate.
Change-Id: I9fa9b420df8f1496d0bb4dab3d3ee50d35630394
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Flush the MDP and DSI timing registers during variable refresh rate
operation for 8916/8939. Also, there is no need to wait for vsync
interrupt before programming the timing registers due to their
double buffer nature.
Change-Id: Ia349729069bd49f0c40ce41cccefdfb67cafe44c
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
[abhimany@codeaurora.org: minor confict resolution]
[abhimany@codeaurora.org: INIT_COMPLETION fixups]
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
Shutdown the audio session while booting up if already started
as part of continuous splash screen.
Change-Id: I0db7edba6dd3726721d827c0375574fb77809b93
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Correct the cont-splash-enabled device tree node name as per
standards for dt compliance.
Change-Id: I05779770bea7186800556fa40a918e793d6bf528
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Allow audio playback if secure content is not being played
regardless of HDCP status.
Change-Id: I3b651f95c4097fe187b15d1bb17fbbd2ee20254a
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Currently, when changing the refresh rate dynamically, the same
DSI PLL0 registers get updated as we dont use the PLL1. This
change avoids programmaing of second controller.
Change-Id: I599787f25fe3f197c426e38c0a02fa367ec2732e
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Since DSI status checking is purely DSI operation, it's not
necessary to acquire ov_lock in case of video mode, otherwise
this function could block other overlay functions, therefore
introducing extra delay.
CRs-fixed: 714531
Change-Id: I5051ff3495d516b405cd3bf5dc32ea712187975e
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Add MDSS version check and enable MISR free run mode.
Change-Id: I8a07ff5926eb82f1ac27851d16400570c017485c
Signed-off-by: Anusha Koduru <kanusha@codeaurora.org>
Enable continuous splash screen for HDMI interface
when it is configured as primary. Enable the regulators, clocks
and gpios at probe to vote for them. If resolution change has
happened, power off the HDMI to clean the obsolete resolution
data and setting. If resolution has not changed, do not re-program
same settings for smoother display.
Change-Id: I45e76ffce8f0654673a8fb19b683c783a18e229b
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Fix logic to avoid timing engine flush in the first
commit when continuous splash is enabled.
Change-Id: I12b4969e9ec1ca421fa9b72cabbe9fee7d6061fb
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
If there is a video mode controller enabled and other
controllers non-video mode, current display driver apply
the bw fudge factor only to the controller that it is
video mode.
This change will apply the fudge factor to all the
controllers enabled if any of those is video mode to
fix some of the underruns observed in the video interfaces.
Change-Id: I0d01477dc45edbef2a25ccd540aa06b3c43073a4
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
reset the init phase and phase step registers to default
when the pixel extension are not calculated in userspace.
Change-Id: I876f1628fb46901a07deb1b97a4ab55f924612b0
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Cleanup MDP controller and mixer setup in case panel resolution
has changed. The obsolete resolution settings need to be cleaned
and setup with new resolution data for proper display.
Change-Id: I8df3c19cb5e872e05a585ed0d4df2e5c4d0c9624
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
MDPv1.5 and MDPv1.8 has danger safe LUTs and control setting
register under MDP register space. These LUTs and control
settings can be different for each pipe for MDPv1.7. It makes
"panic-ctrl-offsets" configuration also optional for VIG, RGB
and DMA pipes. This change handles the danger safe signal
programming for such MDP version.
Change-Id: Icf0e4a732d7372493d1166579b90a7c2df7ae126
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
With MDSS idle power collapse feature enabled, it is possible that
the runtime suspend callback for MDP device to be called when there are
no display updates. This results in MDSS GDSC to be turned off in idle
screen usecases, and would subsequently be turned back on upon the next
update. However, toggling GDSC can be an expensive operation and should
only be done when it is expected to be off for a substantial time. To
achieve this, enable the runtime autosuspend status for the mdp device.
Change-Id: I6e4127efe7b01d7e164b0763d34995c82c2e8be9
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
The scm library has added support for a new secure world
interface that is more aligned to the ARMv8 SMC calling
convention. Use the new API while maintaining backward
compatibility.
Change-Id: I9edb4fc11982dca2f7bdf76a3075a99f4cbe9990
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Current code assumes when Dual DSI configuration is used that width will
be twice the left panel resolution. This may not always be the case and
should instead look at the configuration to get this information.
Change-Id: I5c2ac608f46d7c0ce1acbffe002d69fca44afaf7
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
When continuous splash is enabled, avoid timing
engine flush in the first commit.
Change-Id: I11e7f86c910aa4dcaea3fcd72ec24cbbea450db2
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
In ferrum DSI has an irq line which is different from mdp.
Add support for irq handling this case. It makes use of
utility functions provided by mdss.
Change-Id: Ia6dca1050957f4755b7547f4c1a08ace913c2ac7
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict,
removed IRQF_DISABLED flag]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Change irq interface provided by mdp from exporting symbols to
function pointers. This will help in making mdp3 work with dsi 6G.
Change-Id: I07a2acf56b75a2a6d83c0522d38efe3754bb8765
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
[cip@codeaurora.org: Moved mdss_util.c file location]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Bandwidth vote needs to be enabled for DCS commands to be sent
during static screen on command mode panels.
Change-Id: I267c910dac9610b230f0138909c0dc8ca5797f11
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
Add support for ARGB1555 and ARGB4444 formats in
mdp.
Change-Id: I6000316d177d9988eabcca8f43131e3a9f636961
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
The strength settings for DSI phy are configured using two
board specific parameters. Currently, one of those parameters
is not configured for DSI-0 which results in DCS read failures.
Fix this by correctly configuring these strength settings for
DSI-0.
Change-Id: Ibeafe8655137112e7bffba13a1851ce98810bfeb
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
With MDP idle power collapse feature enabled, MDSS GDSC gets turned off
whenever there are no updates sent to the panel which results in all
hardware registers getting reset. These hardware registers need to be
restored whenever on the next udpate. Currently, this restore
functionality is only supported for command mode panels. However it is
possible that there could be additional framebuffer devices that may be
active (such as a writeback device) in conjunction with the primary
panel. In such cases, if idle power collapse happens, then these control
paths may not get correctly restored leading to unexpected behaviors.
Fix this by preventing MDP idle power-collapse when such panels are
active.
Change-Id: I226e72086bb6232ae452a999d961c80f2841f833
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Continuous splash screen buffer is reserved in
target dtsi file for MSM8994 target. FB driver should
parse this memory handle using "linux,continuous-region"
to get the splash screen buffer address and size. This
avoids usage of "qcom,memory-reserve" entry which forces
user to provide duplicate information.
Change-Id: Ice6cddf6c71a2de9adf15a763434a310e07a3da6
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Most likely root cause of ping-pong timeouts is a pipeline hang in the
display controller. These pipeline hangs can happen due to bad frame
configuration and if this bad configuration persists every frame then
ping-pong timeouts will flood the console with warning logs and may lead
to watchdog bite. Fix this by reporting ping-pong timeout only once every
bad configuration.
Change-Id: I1dc7a729f10e70e2bed947dd72713c0adfe96942
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
dcs-cmd-by-left flag can be set without partial update being
enabled. Therefore remove partial update checking during
parsing dcs-cmd-by-left.
CRs-Fixed: 698733
Change-Id: I3e81ecc95e80a2d2bc970d8d9350cfc7736d1a29
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Use Interface or Writeback layer mixer MISR for Writeback CRC
capture and remove to avoid underrun during primary
and HDMI CRC capture in case of timeout.
Change-Id: I78e51fd28fb0157864a7a350cc652a917cc66347
Signed-off-by: Anusha Koduru <kanusha@codeaurora.org>
When queuing new parameters to rotator, need to ensure that current work
is done before reconfiguring pipe parameters, otherwise there may be a
mismatch on parameters with the buffers programmed once work is
scheduled.
Change-Id: I258aedca82bb10498d0ef4cbaa697a29c3c34a99
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
If pixel extension is enabled by scaler, and layer content is
deinterlaced, the modifications to the layers region of interest
to be used by mdp hw has already been modified. We should not
further changing these values.
Change-Id: I2c528b54ce07e90b66b56ef008b73b78e4227c9d
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
MDP_SOLID_FILL request does not require any data fetch on the bus,
so do not consider it in the optimal bandwidth logic.
Change-Id: I7ddfde78d94a42cfeba6aa0af7e805eba95bc699
Signed-off-by: Sushil Chauhan <sushilchauhan@codeaurora.org>
