In cases of EDID read or parser failures, driver should expose
a default resolution to other modules to continue with the HDMI
initialization. So during bridge chip initialization sequence
update the default resolution.
Change-Id: Ia6a7f8b4d9e3f1650b9c11aafc118a2662801ba0
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
The helper function linear_map would take the integral part
of the calculated map, thereby causing issues with getting
the same value after consecutive map and inverse map calls.
For ex: linear_map(21, out, 255, 4095) would translate to
*out = 21 * 4095 / 255 = 337, whereas inverse case
linear_map(337, out, 4095, 255) would translate to
*out = 337 * 255 / 4095 = 20
Changing linear_map from ((in * out_max) / in_max) to a more
precise ((2 * (in * out_max) + in_max) / (2 * in_max)) for
incorporating rounding in the integral mapping.
Change-Id: I15cd8aa1326813ce3cb3a426cbb4e78374623c72
Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
If auto refresh mode is enabled in LK, then it needs be disabled
when kernel loads. Otherwise it might cause display corruption,
when in kernel display again configures tearcheck block.
Change-Id: I0b4dddee25e39cea4f32b8afd537993ad64ea812
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Switch on the mdss clocks while enabling vsync irq.
Since mdss clocks are refcounted and irq is asynchronus
there can be case as clocks are off and irq is triggered.
This change will add a refcount while enabling irq so that
clocks are on when irq is triggered.
Change-Id: I90728f6d94b9d846b2c805a68ee49a6ef2a8ffc3
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Rotator clock and BW votes are updated on each rotator request
during same session. This is not required because rotator source
and destination does not change during session. Ensure that
rotator clocks are on throughout session such that extra overhead
of rpm calls are avoided.
Change-Id: I7a74aa2b8d8556b1d8ee4c52f871b9ebb149764a
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
For dual DSI panels, DFPS mode switch configuration through
sysfs is not properly enabled for the second DSI interface.
Fix this by initializing the mode switch update variable.
While changing the DFPS mode, idle-time should be disabled
and the device should be configured to default FPS. Add
these checks when DFPS mode switch is initiated.
Change-Id: Ib9e67f20758e2fb1c72a747c31109364db1d1160
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
In the current implementation DSI PHY revision is read once
DSI PHY initialization is complete. But this needs to be done
before initializing PHY, so that correct PHY initialization
sequence can be executed.
Change-Id: I6f0cd59d63d0a8c0a5d47284f2e86e72f37d099f
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Currently, DBA (Display Bridge Abstract) related functionality
is being used in DSI files. Carve out DBA related functionality
into a new file which serves as a utility module and can be used
by any MDSS driver.
Define CEC on/enable functions in DBA (Display Bridge Abstract) so that
clients can enable disable CEC based on other dependent CEC modules.
Separate out CEC abstract data with CEC driver data and initialize and
release corresponding modules properly.
Change-Id: I84f53d99547dcd4ce0b8275401b03ed8e96e14d5
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
In command mode static screen usecase if DSI PHY was clamped and
then MDSS was reset by power collapsing it, in that case reconfigure
DSI PHY regulator while coming out of power collapse. This will avoid
DSI PHY stuck issue when there are two independent displays running.
Change-Id: I6c33244c332d97522b66cbb9191fce0a268bf9f4
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
In dual dsi case, if we do DSI PHY sw reset for one DSI controller
then it will reset the DSI PHY regulator also. Since DSI PHY
regulator is shared among both the DSI controllers, it might cause
side effects on the other DSI controller if that is active. So only
reset DSI PHY lane and PHY HW as when one of the DSI controller is
still in active state. Also avoid reconfiguring DSI PHY regulator in
dual dsi case if the other DSI controller is active.
Change-Id: I5ad1251c89e8ad3f521c4e5c11607494e14143cf
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
There can be unclocked register access during DSI FIFO empty
error recovery case in command mode, so enable DSI core clocks
prior to doing SW reset.
Change-Id: Ic48561b979f1a13304dc2fa29f8008e8ff63c8ca
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Sending BTA or other panel check status commands to the
panel, when panel is off might lead to abnormal
behavior. Since client can poll for the panel status
anytime, add necessary checks to avoid sending commands
when panel is off.
Change-Id: I95acc3df464d0a4640b79963b5701fcde79646d5
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
The log message which is only active in modem build is missing
an argument causing build error. This commit fixes it.
Change-Id: I7e66c34c22e13a0063af93cbf725cfd9c24ffb99
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
HDMI driver has compilation issue in 32-bit mode due to incorrect
type casting. This patche fixes the same.
Change-Id: Ie620b1059f37b858beadf61ff8e100312b1bb988
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
The SSC frequency and PPM values are currently hardcoded in the
DSI PLL driver. Add DT properties to specify the SSC frequency
and SSC PPM values for DSI SSC feature.
Change-Id: I0faed9f48694f7407c6855b067ffa4510d7e3fdd
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
In overlay start, currently there is a check that if
splash handoff is pending then fail the overlay start
for that particular fb. Remove this check as this is
not required anymore. HAL should take care that it
calls fb open (for HDMI) only after splash cleanup is
done.
Change-Id: Ie20bd778ba8df2bd54c3804870ad4e8bb45702b8
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
There are two places where the backlight can get updated. Currently, the
sysfs notification only happens in mdss_fb_set_backlight. If the backlight
is restored during the first display commit, the backlight update occurs
in mdss_fb_update_backlight. This change adds the sysfs notification in
update_backlight.
Change-Id: Iffa1e4f0aa0cdc8babb1b6683d3175795f4b4d27
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
CRs-fixed: 949146
Update mdp capabilities with pipe index, type,
handoff status and display interface number information.
Change-Id: I3ff1c66cb20bb1a45a67eb952d7cdaa7e360d377
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
In the current implementation DSI controller version is used to
determine which PHY enable sequence should be used. But this will
fail in case of platforms where DSI controller version is same as
older platforms but PHY version is new. So change the version check
to be based on PHY version instead for controller version.
Change-Id: I636a6442e84f1bd549b6a125cfb991402e53c796
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
When exiting low power state (LP1 of LP2), ensure that the intf_stopped
flag is reset for the secondary ctl as well, otherwise it may result in
the display corruption for that ctl path.
Change-Id: I2ac9cff00e25a3cae6999e33c9f5a7a959413277
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Pipes present in destroy and cleanup list are considers
as used pipes during layer validation. This assumption
is wrong. Async update should not be supported for such
pipes because they are not stagged in current draw cycle.
These pipes should also go through destroy cleanup process
if any layer validation fails during the atomic ioctl check.
Change-Id: I11ba16db40634e32e7f55af4e19f6cb42530b1f4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
The vsync handler in display thread holds ov_lock followed by
offlock. And the DSI status check thread for cmd mode panel holds
offlock followed by ovlock, causing a clear deadlock scenario.
Fix it by acquiring ov_lock before offlock in DSI status check
thread.
Change-Id: I54ef54b5ca7e4c87e909c510b28ff7770bb20a3b
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add sysfs node to provide a custome EDID to HDMI driver to
address some special requirements from user applications like
switching to a custom EDID in cases where sink doesn't support
EDID or DDC line to read EDID.
Change-Id: I75726e28722aa128cfc315b3b1b0e97e9a9cde56
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Current driver has various optimizations to skip pipe reprogramming if
certain layer parameters are not changed. However if mixer layout changes
then we need to reprogram all the staged pipes on that mixer. This
scenario can happen when partial update is enabled on a topology with
split layer mixers. Add a logic to find if the mixer layout is changing
between two consecutive updates and if it does, force reprogramming of
all the staged pipes.
CRs-fixed: 946164
Change-Id: I16caa4bb8b9587b804d6543d0bd340df970784ba
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Create a new CEC abstract module which is hardware independent and
interacts with other modules. Make hardware dependent CEC a separate
module and integrate with CEC abstract module. This makes it easy
to integrate multiple CEC hardwares without disturbing other modules
interacting with the abstract module.
Change-Id: I0cf4973e567fe82a1b714c03ae8b18508521260e
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Implement qseecomm API to send command to TZ to enable/disable
encryption based on hdcp status. Enable encryption when hdcp
part 1 is successful and disable it when cable is disconnected
or authentication fails.
Change-Id: Ia5e1a5927dad36abc3093b16638879be823c84df
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Do not schedule link work periodically to check for new message
or authentication status. Hardware automatically poll sink for
the same. Once new message is available or sink indicates
re-authentication required, isr is triggered. Queue link check
work from isr to avoid unnecessary software polling.
Change-Id: I83c71f5151aa077e863b6578a89f6515f6497159
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Provide user an option to let the HDCP2.2 authentication
run on main thread. Avoid processing on module threads
thus avoiding any scheduling delays. The user may choose
to switch to this mode based on its requirements.
Change-Id: I76ec4a18f0fc52e99bbe76b6707511d3af6151f3
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Clear DDC line if scrambling and Rx status polling is still
going on. Check for all scrambling and Rx status errors and
stop polling in error cases. This needs to be done before
new hdcp authentication session is started to avoid any
authentication failures because of ddc line being busy.
Change-Id: I90957410172ca206d435a5549d689ada222f84db
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
In current implementation there are two entries in DSI
panel specific dt file for specifying panel timing parameters.
But in case only one entry is specified in panel dt, then if the
first entry is not there in dt, driver is returning failure
and because of this the second entry is not getting parsed at all.
Update the parsing logic so that driver parses both the entries
to get proper dsi panel timing parameters.
Change-Id: I1774421fd9686de123cb669a745ac110fe8667da
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Update the hdcp related information when hdcp is started
and not before that. Updating hdcp information depends on
some modules which may not be ready during boot-up resulting
in hdcp failure. Update hdcp information on user thread to
make sure that kernel has completed boot-up and dependent
modules are ready.
Change-Id: I159ec55dbe3d6f109a97a15c2f22d96694727133
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
The cnss common kernel module export symbol to WLAN host
driver for ROME based wlan module. Add kernel config
flag CONFIG_CNSS to make this module compilation only
for ROME based target.
Change-Id: Ia352f0b561f3ec5a53f0d48fd849e43caf4e44a2
Signed-off-by: Sarada Prasanna Garnayak <sgarna@codeaurora.org>
Update PERCPU_SECTION and RW_DATA_SECTION to align to L1_CACHE_BYTES
instead of hard coded 64 bytes since L1_CACHE_BYTES could get
updated to more than 64 bytes cacheline size.
Change-Id: I0bc1f0420675cf65e958c53a230357918f05aabc
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Clocks should be enabled and running at proper rates before
powering on hdmi transmitter. In fast plug in/plug out of
hdmi cable cases or fast suspend resume cases, there can be
a race condition related to enable/disable of clocks and
hdmi power on/off. Make sure, in such corner cases, hdmi
transmitter core is not being programmed to avoid any
possible un-clocked register access issue.
Change-Id: Ide3db0d0947f4bb5deee26aee95111be27523924
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
CPP RX FIFO empty status is not checked for payload start code and
trailer. A continuous counter must be used across the payload
instead of separate check for CPP RX FIFO empty status for
stripe and plane based. Ensure that CPP RX FIFO empty before
writing the second payload.
Change-Id: I11d0f77798addf4d654122e346dc6ec736a47113
Signed-off-by: Krishnankutty Kolathappilly <kkolatha@codeaurora.org>
Observed camera module drivers doing invalid buf done's on
vb2 buffers even after the buffers are cleaned up from
the vb2 queue, Hence adding WARN_ON to identify the clients.
Change-Id: Iaca6fc7c481d7c06cd15e94fbbf9aebe2cc7e110
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Remove support for ADV7533 from automotive dragonboard file as dragonboard
should boot up with native panel by default
Change-Id: Id0444a8edaf645a56b68ccd039ee6250d188822e
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
Add cma and migrate trace events to enable CMA allocation
performance to be measured via ftrace.
Change-Id: I1e471e9e21f1a14ce2ed167d8515ccb5f83eb88c
Signed-off-by: Liam Mark <lmark@codeaurora.org>
Currently Vdd scaling max frequency variable is not initialized,
which leads to wrong aggregation of thermal cpu scaling max frequency
request especially during KTM boot up mitigation. Initialize low
temperature scaling max frequency variable to UINT_MAX at
probe function.
Change-Id: I0220b9390cac33d40af0e4419d7451553ba6c5b5
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
Add support to read display ID string from device tree. The string
could be empty if it's not defined in the device tree.
Change-Id: I70584a1e20b7394145e40d83a2af7775f0117506
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Add support to report display ID back to user space through
panel_info node.
Change-Id: I0d711400b02f441bce17b27bd747034bd5b61b1a
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Since driver could support four displays running concurrently, adding
one more display id for setting up panel destination.
Change-Id: I0999b3787e1a329538d6513fc3c9a43a3da9999a
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
The ndx variable of dsi control structure needs to be configured
correctly in the early stage of probe. Otherwise, subsequent function
could dereference to a wrong value.
Change-Id: Icdcdf6713271af25c5135702d8479f5213909560
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
In case of dual DSI configuration if any of the DSI
controller is using bridge chip(HDMI) then consider that
as secondary display or else consider DSI1 controller as
secondary always. This change takes care of this assumption.
Change-Id: Ia24c45de2af41144e76b102232b7481ca5c5acf2
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
In the current implementation, DSI0/DSI1 device is always mapped
to frame buffer-0. For dual DSI configuration, we need to
register both the DSI devices to different frame buffers. Add driver
and dtsi support to register DSI device on primary/secondary
frame buffer at runtime based on the DSI configuration.
Change-Id: Iac872723711c5d0264088c4f3b53d1385fd9ffe0
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
For some platforms due to HW limitation timing db property
can not be a shared property, so making this property as interface
specific for MDSS, instead of shared.
Change-Id: I6e1a482dd23f475c332200f857494a7c848c58c1
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
If timing db(Double Buffered) property is enabled, then MDP FLUSH
bit needs to be set in order to push the data to video interface.
Currently this property is used as a shared property for both DSI
interfaces. But in case of chipsets where there is no FLUSH bit
defined for the secondary DSI interface, this will cause issue.
So moving the property to each controller specific instead of shared.
Change-Id: I25913867da41ca2fb2848ab96f5be5d9228a8f63
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
qseecom_send_modfd_cmd_64 converts non-contiguous ION memory fd to
scatter-gather physical address list, and supports up to 512 SG list
entries. Now, 512 is not enough if client wants to send large data
in a fragmented system. In this change, if SG list entry number is
larger than 512, we will allocate a new contiguous kernel buffer,
then save all SG entries into this new buffer.
Change-Id: Id90eefb98b63bf16db755dae8e1482e448090f47
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
Configure the new IPA-interrupt register to get
the IPA-HW irq, also change the tag process to
be compatible to 64 bits platform.
Change-Id: I29a8805cacc8d8df2f0e60ee8e1d2243c718d248
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
