Allow to set volume in ASM for the loopback driver. Without the
get() function the corresponding volume mixer control is
failing to set volume.
CRs-Fixed: 1034862
Change-Id: I621dd9de3a8d4a0f4102227989e1dd17638c20ea
Signed-off-by: Surendar karka <sukark@codeaurora.org>
- Add fwu_go_nogo function in synaptics_fw_update.c
- Add BTN_TOUCH support in synaptics_i2c_rmi4.c
- Add List check in synaptics_i2c_rmi4.c
Change-Id: I8cb776d5b3d20bdee5036cfe0dbcb9bbaa8bf6bd
[amaloche@codeaurora.org: Subject modified from "v1.1"
- Removed reg_access & fw_updater files due to improper license
- Modified commit text to reflect file changes]
Signed-off-by: Amy Maloche <amaloche@codeaurora.org>
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
(cherry picked from commit 6ec6c2cb2b8fce021f48dbfaf326cdd99c9fd9d5)
Signed-off-by: Abinaya P <abinayap@codeaurora.org>
kryo perf events are specific to MSM8996 soc. So build
this file only when MSM8996 is enabled.
Change-Id: I95aacab201d51ffb4eb8e94d2e400578cab37fc8
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
Existing CPE(Codec Processing Engine) driver supports single session.
Add support for two sessions with different sampling rates.
CRs-fixed: 1022917
Change-Id: Ifbcb1bf8c418a4b3c787f68392aa141207dddde5
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
New battery module is used on QRD msmcobalt SKUK device, add the battery
data for it.
Change-Id: I4a1888fb2302572720260ffea200e5fe6d79a7ba
Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Currently video driver handles all FW errors such as
SYS_ERROR, SESSION_ERROR and timeouts as non-fatal.
This suppresses FW issues and makes it difficult to
root cause. Hence treat FW errors as Fatal based on
dtsi entry.
When FATAL error occurred, print FW messages by default.
CRs-Fixed: 1037031
Change-Id: Ifffceb30e9abcaced977438526ceeef4e7f9324e
Signed-off-by: Praneeth Paladugu <ppaladug@codeaurora.org>
The gcc_usb_phy_cfg_ahb2phy_clk clock will be managed by RPM.
There is no need to model it in the linux clock driver or to
control it from the USB driver.
Change-Id: I05641c2d532ada36623da1e1cc687c90bc4ee906
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
USB qusb2 and ssusb qmp phy drivers are not required to
manage gcc_usb_phy_cfg_ahb2phy_clk clock. It will stay
always ON except when in XO-shutdown. RPM will manage
this clock.
Change-Id: I92647d8ba53bb498b1048ea920a25c04441f6e10
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
dwc3 USB driver is not required to not manage gcc_usb_phy_cfg_ahb2phy_clk
clock. It will stay always ON except when in XO-shutdown. RPM will
manage this clock.
Change-Id: Icc33e63a52b3c5ce83ef2fc56d68eae20278cac0
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Query buffer from buffer manager based on buf index.
This allows modules to provide a buffer associated
with a particular request and avoids a wrong buffer
from being returned.
CRs-Fixed: 1018651
Change-Id: I206f3fa334d96e9f57fcbd985922a436ed701ff3
Signed-off-by: Krishnankutty Kolathappilly <kkolatha@codeaurora.org>
Signed-off-by: Hariram Purushothaman <hariramp@codeaurora.org>
Support a new OSM sequence which optimizes the number of
instructions required to program MEM-ACC settings and
the APM configuration of the CPUSS. This frees up sufficent
space to implement the DxFSM workaround.
CRs-Fixed: 1043040
Change-Id: I9499497cb558efcf3c73e7145ce65d3f129be696
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Program architectural register 6 with the address of the SPM
core count hysteresis register and architectural register 7
with the up and down core-count SPM hysteresis values. The
sequencer uses this information to ensure stable operation
when CPU retention or power-collapse and cluster collapse
LPMs are enabled.
CRs-Fixed: 1045435
Change-Id: I5e41ce376c694736128ceb051db86f93467fdaea
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Since LowSVS and SVS frequencies share the same ACC settings,
map any frequency in the LowSVS to SVS range to the same ACC
level. By doing so, the OSM device need only support 3 levels
instead of 4 thus saving sequencer instruction space. Also,
update the ACC setting to ensure bit 31 of the last ACC register
in each cluster is set when running at LowSVS/SVS frequencies.
CRs-Fixed: 1021659
Change-Id: I322b9b57ec89f5cdc75336d83010ff89a6bb5726
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Define the APM threshold voltage to be used by the OSM device
to determine the correct APM supply selection for different
DCVS setpoints.
CRs-Fixed: 1021656 1030444
Change-Id: Iebeb45eaa2503bd5be19f00938d0dbec1163c5a5
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add support to determine the APM threshold corner via open-loop
voltages in the VDD regulator OPP table. The threshold corner
is used by OSM to determine the APM supply for each DCVS setpoint.
The crossover corner is used by OSM to request a specific voltage
during the APM switch transition.
CRs-Fixed: 1021656 1030444
Change-Id: Iac04f6db8e85b3651a33b6c9bff667365cae891d
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add support for a corner whose open-loop voltage corresponds to the
VDD supply voltage required during an APM switch transition. This
corner is requested by OSM hardware to the CPRh controller when
the VDD supply must be set to a specific voltage to ensure a stable
APM switch procedure. Define a crossover corner of 880 mV for both
VDD_APC CPR devices.
CRs-Fixed: 1021656
Change-Id: Icf4b640ec2c330b0d9721d3494297e2d8445c9b6
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add support to scale reverse thresholds on VADC_TM refresh
peripheral for voltage measurements such as vbatt, vph_pwr,
thermistor channels, PMIC die temperature.
VADC_TM refresh uses one interrupt for high and low threshold
notification. Update the sequence to check the respective
sensors status for high/low threshold crossing for the VADC_TM
refresh and notify the clients on a threshold crossing.
Change-Id: I070b537e14b505bc247f2f5e6a0e125f1d0fbb81
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Currently, maximum value for VIDC_VIDEO_LTRMODE contrl is set to
LTR_MODE_PERIODIC which is not supported. By limiting it to
LTR_MODE_MANUAL, the control value will stay with in supported range.
CRs-Fixed: 1046755
Change-Id: I85b8ac6dc847343d42cb2f6466137bf43fc1b7c1
Signed-off-by: Amit Shekhar <ashekhar@codeaurora.org>
Add support to IPA USB when IPA SMMU is enabled.
IPA USB will create a mapping for USB registers and
USB data structures for GSI.
CRs-Fixed: 1046497
Change-Id: Ib177606acdfa9b3826c929578d1c8094242f90cd
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Stage 1 SMMU enablement on IPA requires that the USB
driver pass physical and virtual addresses to IPA for
addresses that GSI hardware will write to. Update the
connection params for GSI channels to pass this info
to IPA driver.
Change-Id: Ibeedeef900b069b3a113b2daabf461797f28287b
Signed-off-by: Devdutt Patnaik <dpatnaik@codeaurora.org>
Add support to IPA USB APIs for SMMU.
CRs-Fixed: 1046497
Change-Id: Ifca675f308b59913743baf2e59dc3ed515a5b974
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Commit f1e7f0a724f6 ("android: binder: Disable preemption while holding
the global binder lock.") re-enabled preemption around most of the sites
where calls to potentially sleeping functions were made, but missed
__alloc_fd(), which can sleep if the fdtable needs to be resized.
Re-enable preemption around __alloc_fd() as well as __fd_install() which
can now sleep in upstream kernels as of commit 8a81252b77 ("fs/file.c:
don't acquire files->file_lock in fd_install()").
BUG=chrome-os-partner:44012
TEST=Build and boot on Smaug.
Change-Id: I9819c4b95876f697e75b1b84810b6c520d9c33ec
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/308582
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Reviewed-by: Riley Andrews <riandrews@google.com>
Git-repo: https://source.codeaurora.org/quic/la/kernel/msm-4.4
Git-commit: c267ff1d548ed1bdad6a08f1c70776c5e60d569e
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Vikram reported that his ARM64 compiler managed to 'optimize' away the
preempt_count manipulations in code like:
preempt_enable_no_resched();
put_user();
preempt_disable();
Irrespective of that fact that that is horrible code that should be
fixed for many reasons, it does highlight a deficiency in the generic
preempt_count manipulators. As it is never right to combine/elide
preempt_count manipulations like this.
Therefore sprinkle some volatile in the two generic accessors to
ensure the compiler is aware of the fact that the preempt_count is
observed outside of the regular program-order view and thus cannot be
optimized away like this.
x86; the only arch not using the generic code is not affected as we
do all this in asm in order to use the segment base per-cpu stuff.
Change-Id: I781dc34fdf52823fd34f4bb93872f85847076c66
Cc: stable@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Fixes: a787870924 ("sched, arch: Create asm/preempt.h")
Reported-by: Vikram Mulukutla <markivx@codeaurora.org>
Tested-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Git-commit: 2e636d5e66c35dfcbaf617aa8fa963f6847478fe
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Link: https://lkml.org/lkml/2016/5/16/190
[vmulukut@codeaurora.org: merge conflict fixups]
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
