1. Voltage regulator changes for rear camera
and eeprom.
2. Gpio changes for rear camera and eeprom.
Change-Id: Ie59a748d016211d5ddbab2593ec310a313690f9e
Signed-off-by: Shankar Ravi <rshankar@codeaurora.org>
When creating a context allocate an ID but don't populate the slot
with the context pointer until we are done setup up the rest of the
process. This avoids a race if somebody tries to free the same
identifier before the create operation is complete.
Change-Id: Ic0dedbadca5b4cc4ce567afad48a33078b549439
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Dumpeti Sathish Kumar <sathyanov14@codeaurora.org>
RPM expects resource-id of each type of regulator to start from
0. Update the resource-id of SSC regulator accordingly.
Change-Id: Id9721e5b96df08a1090914b968c93436d15169a9
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Currently, there is a possibility that read buffers are
not initialized but diag ends up marking buffers busy and
stops reading from peripheral, which leads to port loss.
Also reset the in_busy variable for the buffer that reads
the data from smd channel when diag smd state is closed.
CRs-Fixed: 1093989
Change-Id: I1990d0ded5a212c9185c149ac297a3630d64bc59
Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
There is no need to call handle_sys_error if it is
called already. So check the core state to return
if it is not in valid state.
CRs-Fixed: 1072500
Change-Id: Iaa77ea31f29190dcf35b4bfc4913b8eec0d638b0
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
If either instance state or core state is invalid, then
we should fail and return error from qbuf and prepare_buf.
CRs-Fixed: 1072500
Change-Id: I0efc3125b2c204dafbc90d011a4e9ad3fb1c1ba2
Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
Add actuator src and flash src of camera0 node for
support focus and flash function on msm8998 qrd skuk board.
Change-Id: I92ed864aedfdd38c8670e08fb35a6545e8abb142
Signed-off-by: Pengfei Liu <pengfeiliu@codeaurora.org>
Remove msm_bus bandwidth vote from DT for msm8998
as WLAN FW will take care of it.
CRs-Fixed: 1094917
Change-Id: Ied5dcb9e3283dc2ec7f5fd6f03465b070f989d8b
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
Fix the GPIO settings by changing output of GPIO78 to 0 to flip
the on board AUX switch, and furthermore, setting the function
of GPIO38 to gpio. These updated GPIO settings enable flip plug
orientation to work by fixing the AUX switch and the PHY lane
configuration.
Change-Id: I0da80a4f524ba84cf6740521f6b1bfe63a85de38
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
CRs-Fixed: 1062508
Fix the PHY programming sequence for flip plug orientation by
ensuring that the correct PHY_MODE and LANE_MODE values are
selected, depending on the orientation and link rate
respectively.
Change-Id: I6e74c20c509b7007a86df9d99894a9a6c0baa946
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
CRs-Fixed: 1062508
Current clock driver requires that before enabling
the core clock after power collapse, the set rate
must be called. Ensure this sequence by always calling
the set rate for the mdp core clock before enable.
Change-Id: I872f18235b0b1685dfdee3de99827d031077a012
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Modify ACD_EXTINT_CFG so that ACD calibrates every time OSM toggles
full freq signal. This is recommended by hardware guidelines to
prevent ACD from mitigating when CPU clock frequency is boosted.
CRs-Fixed: 1088429
Change-Id: I07856ea8b332dbf12654fdd0b5d5518355f1c350
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add mem-acc threshold and crossover voltage properties to the
VDD_APC0/1 CPR devices and a matching mem-acc crossover voltage
to the OSM device. Update the APM threshold voltage
to 800 mV for both clusters.
CRs-Fixed: 1088429
Change-Id: I747fd7665401803998b2824ace6dedbc5797b17f
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add support for configuring the highest memory accelerator
(MEM ACC) threshold voltage. This threshold voltage is used at
runtime to determine which CPRh virtual corner to program into
the OSM sequencer registers in place of the fixed MEM ACC
configuration specified in the OSM LUT.
CRs-Fixed: 1088429
Change-Id: Ida29eaca139c1ddd6439d11a8bd51526366f2a34
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add support for configuring the memory accelerator (MEM ACC)
threshold voltage and the MEM ACC crossover voltage.
The threshold voltage is used to restrict the floor to ceiling
voltage range of all corners so that they cannot cross the
the MEM ACC threshold voltage due to CPR operation. The
crossover voltage is set when switching the MEM ACC
configuration.
If specified, the APM and MEM ACC crossover voltages are added
to the array of corners after all true corners. If both are
specified, then the APM crossover corner is added before the MEM
ACC crossover corner (i.e. last corner = MEM ACC crossover and
second to last corner = APM crossover).
CRs-Fixed: 1088429
Change-Id: I2b9b746071579ba9d4bcdcfb6cb755ca08a73182
Signed-off-by: David Collins <collinsd@codeaurora.org>
Grabbing the mutex should not be done from netlink_sock_destruct() but
from netlink_release()
CRs-Fixed: 1094434
Change-Id: I69ae0d8589a0878b9758619893848afc272179c5
Signed-off-by: Eric Dumazet <edumazet@google.com>
Patch-mainline: linux-netdev @ 11/26/16, 04:54
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
We want a generic way to insert an RCU grace period before socket
freeing for cases where RCU_SLAB_DESTROY_BY_RCU is adding too
much overhead.
SLAB_DESTROY_BY_RCU strict rules force us to take a reference
on the socket sk_refcnt, and it is a performance problem for UDP
encapsulation, or TCP synflood behavior, as many CPUs might
attempt the atomic operations on a shared sk_refcnt
UDP sockets and TCP listeners can set SOCK_RCU_FREE so that their
lookup can use traditional RCU rules, without refcount changes.
They can set the flag only once hashed and visible by other cpus.
CRs-Fixed: 1094434
Change-Id: Ib4967b801cc5b48c8ac4793b7a03fbfafba2234a
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Tom Herbert <tom@herbertland.com>
Tested-by: Tom Herbert <tom@herbertland.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Git-commit: a4298e4522d687a79af8f8fbb7eca68399ab2d81
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[subashab@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
Add support for addtional performance cluster speed bins. Speed bin
fuse 2 and 3 devices can run with a quad core CPU fmax of 2.361 GHz and
single core CPU fmax of 2.457 GHz.
CRs-Fixed: 1086294
Change-Id: I08c3b8bc7e4d40c80be588f05b9439b339f46afc
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
