In some cases, updating fps need both porch and clock
update. Add support to update both porch and clock settings
for a given resolution to attain required fps.
Change-Id: I8c75ef09121c2d20e04380ead2b805c7b114acad
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Starting sde 3.0, driver needs to use uncompressed
bandwidth calculation for the ib bandwidth vote.
Add support to use this calculation and enable
it for sde 3.0.
Change-Id: I6a7ba7573a67a52bddb4881415217d7401c97cf3
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Mdp clock needs extra calculations when qseed3
is enabled. Update mdp clock calculations accordingly.
Change-Id: Id488793e9bb6aa7a2578af828f31d1d2b27d51e5
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Adjust the maximum sdm bandwidth limits for msmcobalt.
Change-Id: I269e805465200ef1aa76476110946ee89d432cbd
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Update bandwidth vote calculation for video mode
panels to account for the amortized prefill.
Change-Id: I2a62b0fbd15e678b21329184a5edc0502c33b413
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Starting with sde 3.0, prefill bandwidth can
be amortized depending on the configuration.
This change adds support for this feature.
Change-Id: I501e11325365ec900a2ef8ee5bcbcd66f5647f64
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Add support for DMA multirect pipes available in new MDP revision.
These pipes are able to fetch two different buffers and rectangles to
allow more layers to be fetched. Add support and proper validation
checks for limitations.
CRs-Fixed: 987777
Change-Id: I588ecd7829a45908241f6d9fa1e97147e79798f6
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Enable MPP4 by default at boot-up which enables HDMI 5V.
This is needed for continuous splash screen to make sure
5V is not turned off when booting into kernel.
Change-Id: Ibbce17bb85d82cca42c0bcf0f53fadecace103fb
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
MSM mdss 3xx hardware supports destination scaling for upscaling the
layer mixer output to the panel resolution. This change adds the new
interface to support the user space client using this feature.
CRs-Fixed: 988990
Change-Id: Ie267f0fd81cd8cf04a5c1f1c6a8c48d456a3035e
Signed-off-by: Benjamin Chan <bkchan@codeaurora.org>
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
Current resolution switch calculation is using the wrong
values for the fps calculation.
Correct the values, by using the correct pixel clock
value and adjusting if dsc is enabled as well as
use the default fps, for panels where default frame
rate is not 60.
Change-Id: I4be0a9d5d163b0630e8cfeb930e72c32f487ccb1
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Add support for dynamic fps up to three decimal values for
hdmi. The new fps is provided in multiple of 1000. eg. for
60 fps, 60000 is provided and for 59.94fps, 59940 is provided.
Change-Id: Ib16bf546721ba204f8a47733327e7be77b76b821
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add mdss_rotator node with smmu subnodes.
Change mdss_mdp to interrupt controller so rotator can
receive interrupt routed by mdp handler.
CRs-Fixed: 972831
Change-Id: I5e0f8f06897ff0d4b55aa1f9fc8114dd02451649
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
Change adds separate rotator to capabilities if the platform
supports, so that user space can update its configuration.
Change-Id: If3a1b0f41eaa912a30c20c4c188a896c7bc1efe4
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Perform revision initialization as soon as possible in order to have
all capabilities that depend on revision read from hardware
enumerated by the time we start parsing and doing other
initialization.
CRs-Fixed: 987777
Change-Id: Ide1fa99b876a3347a4e46c11261a9e7a32b8f47a
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
The MDP control path mutex takes care of synchronizing display
suspend path and ESD thread to avoid race conditions. The DSI
OFF path is also taken care of under the MDP control path mutex.
Hence, avoid the usage of DSI ctrl mutex in ESD thread.
Change-Id: I523130bac65f9c4b736e19eb5888c83b9542ed27
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Panels can support different dsc revisions based on the scr.
Add scr revision support for dsc based on updated spec.
Change-Id: Icbd93ed592a7d79dcd7f72b52d73572ced384759
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
V3 version of mdss dither block has been moved from dspp to
ppb. Based on mdss revision the driver should enable the dither block in
dspp/ppb. Change enables driver to handle dither block in ppb.
Change-Id: Iaa11755b46417db1e2a12cb2f2b6028cd7530c0b
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Signed-off-by: Ping Li <pingli@codeaurora.org>
Smmu context fault handler provides the fault iova
information but does not provide any information about
xin client. This patch registers the context fault
handler in MDSS software to get the vmid/xin client
information. It also dumps the registers for source
associated with respective vmid client
Change-Id: I2a833a4b5e81e36f4d7af23a3968c9755424b7a7
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Update the panel reset sequence and panel ON/OFF command delays
for truly 1080p command mode and video mode panels. This will
help to reduce the suspend/resume latencies related to display
for this panel.
Change-Id: I503ce32546483a6eac79c41b581486e7a3ae8735
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Truly 1080p panels need one frame update before updating the
backlight. Add this post init parameter to truly panel nodes
Change-Id: Icd495a5a98a068b5c47c9c25dfa3c0bda676c6f0
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Program MPM_CONFIG bit 0 to release reset to Adrastea before
executing cold boot.
CRs-Fixed: 986579
Change-Id: Ic9605be675c10ea2973e57ea5aae0e8ee2f893f2
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
Include audio external clock header file instead of platform
specific header file in audio-ext-clk driver to remove the
platform dependency as the same driver is used across multiple
platforms.
CRs-fixed: 1006637
Change-Id: Ib51007d544c240fd17c058dcb133f12e7bf2c5d7
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
SMD channel can get into OPENED state before even the G-Link channel
gets into OPENED/CONNECTED state. This can cause the SMD channel events
to get dropped.
Synchronize handling the SMD_OPEN_EVENT & subsequent events in an SMD
channel with the G-Link channel open operation.
CRs-Fixed: 997404
Change-Id: I4c44011b7fa3b59cbe70a125735e04a076c4d3ca
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
The current GRO implementation relies on NET_RX to complete
processing or the max possible TCP segment size for it to flush the
GRO coalesced packets. This leads to coalescing a large number of
packets which translates to very few ACKs. Since the number of
ACKs are very few and delayed during the slow start phase (stretch
ACK's), we see that the initial throughput ramp up is slow compared
to normal RFC TCP where we send an ACK per two packets. Note that
there is no difference between GRO and non GRO after the max window
size is reached.
Add a mechanism within rmnet_data to force the flush of packets
every 10 micro seconds (experimentally determined) by default. This
is controlled by the module parameter "gro_flush_time" and can be
configured to any value less than a second. To disable this feature,
set this entry to 0.
This reduces the coalesce of packets which translates to increased
number of ACK's compared to normal GRO but lesser ACK's compared
to NO GRO. There is no increase in power for a day to day use case.
Note that this optimization is specific to TCP GRO path only.
Some useful stats below for TCP DL at 400Mbps -
|TCP GRO Default | TCP GRO flush timer 10us
==================================================================
iperf 1st second tput | 300Mbps | 330Mbps
coalesce ratio | 15 | 4.5
CRs-Fixed: 961186
Change-Id: Ie8d76c493d61f3f4c256dbaa0378b22a361eed49
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
In order to guarantee stable operation some parts may require
elevated voltages when operating at LowSVS or SVS corners. Thus,
increase the VDD_APC0 and VDD_APC1 CPR ceiling voltages for the
LowSVS and SVS corners to match the Nominal ceiling voltage.
Change-Id: I4e50943923aabae104c8d2c8f512b28693132bbb
CRs-Fixed: 1008621
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Dynamic OT is applied before rotator operation to control QoS.
Since REGDMA cannot access QoS registers directly, rotator
driver needs to wait for rotator idle before changing any
OT settings. Once new OT is applied, REGDMA can resume
queueing until OT changes again.
CRs-Fixed: 989206
Change-Id: I2fd07a957b0d8414c855fafcff7a2613695efff0
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
This patch upgrades v4l2 rotator driver to be compatible with the
latest v4l2 framework.
CRs-Fixed: 972831
Change-Id: Iddbaaceaeba6cee5c7935077f4a92a0361fa8c75
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
Actual CPU's min and max frequencies can be limited by hardware
components while governor's not aware of. Provide an API for them to
notify for scheduler to be able to notice accurate currently
operating frequency boundaries which helps better task placement
decision.
CRs-fixed: 1006303
Change-Id: I608f5fa8b0baff8d9e998731dcddec59c9073d20
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
At present scheduler calculates task's demand with the task's execution
time weighted over CPU frequency. The CPU frequency is given by
governor's CPU frequency transition notification. Such notification
may not be available.
Provide an API for CPU clock driver to register callback functions so
in order for scheduler to access CPU's cycle counter to estimate CPU's
frequency without notification. At time point scheduler assumes the
cycle counter increases always even when cluster is idle which might
not be true. This will be fixed by subsequent change for more accurate
I/O wait time accounting.
CRs-fixed: 1006303
Change-Id: I93b187efd7bc225db80da0184683694f5ab99738
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
dm_crypt required to support full disk encryption.
Change-Id: I990fb3317b4c19ad9b1c8c114a5bbc3faf208ff8
Signed-off-by: Harshal Trivedi <htrivedi@codeaurora.org>
The OSM device needs access to the APCS common register space
to configure the LMh RCG which serves as clock source to OSM.
Add this register space to the OSM device.
Change-Id: I493e711463e2458abe735d440f98fbc80b11c208
CRs-Fixed: 1007896
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
The OSM clock is sourced from the LMh RCG. Model this RCG so
that it can be configured properly to provide the OSM a 200 MHz
clock source.
Change-Id: Ib799e8c082977ac226d6bd31ffad8ca63597c0fc
CRs-Fixed: 1007896
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
As part of SSR logic, APPS cleans Q6 Filtering and Routing
tables so they point to empty tables.
At IPA3 connection cache is stored at IPA H/W so packets
may get rule hit at the cache and bypass the rules scan.
Flushing the cache is needed to ensure handling integrity.
CRs-Fixed: 1007738
Change-Id: I80e16f8cd449f6183810304bd92cc5f302125237
Signed-off-by: Ghanim Fodi <gfodi@codeaurora.org>
RPM added new railway resource types to vote for SSC_MX and SSC_CX. Use
these new resource types when consumers vote for ldoa4 and ldoa27.
"rwsm" - railway resource type for SSC_MX
"rwsc" - railway resource type for SSC_CX
CRs-Fixed: 1006168
Change-Id: Ic5d079d615d5b87abb7e1db6e345f77f6066a6ae
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
To support a higher GPU frequency on MSM8937 Pro target the CX rail
expects TURBO_HIGH voltage level. So changing CX max voltage level to
INT_MAX for voting purpose for mss and lpass subsystem.
Change-Id: Ic8278191a7352d1e0a339251dacd028ef5a02e95
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
There are certain occasions when a subsystem though already in STM
mode, sometimes its acknowledgment of ready to shutdown gets delayed
and meanwhile being sent and awaited for response of sysmon event on
simultaneous crash of another subsystem.
This scenario results in deadlock, adding and setting private state
of subsystem with offlining state before graceful shutdown so that
during any delay in acknowledgment no sysmon event should be sent
to the subsystem which is already down.
CRs-Fixed: 991688
Change-Id: I9841ddc88a114fa94aa93571ee27c8c2f7bf6d39
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Commit da4e4f18afe0 ("drivers/perf: arm_pmu: implement CPU_PM notifier")
added code in the arm perf infrastructure that allows the kernel to
save/restore perf counters whenever the CPU enters a low-power
state. The kernel saves/restores the counters for each active event
through the armpmu_{stop/start} ARM pmu API, so that the low-power state
enter/exit cycle is emulated through pmu start/stop operations for each
event in use.
However, calling armpmu_start() for each active event on power up
executes code that requires RCU locking (perf_event_update_userpage())
to be functional, so, given that the core may call the CPU_PM notifiers
while running the idle thread in an quiescent RCU state this is not
allowed as detected through the following splat when kernel is run with
CONFIG_PROVE_LOCKING enabled:
[ 49.293286]
[ 49.294761] ===============================
[ 49.298895] [ INFO: suspicious RCU usage. ]
[ 49.303031] 4.6.0-rc3+ #421 Not tainted
[ 49.306821] -------------------------------
[ 49.310956] include/linux/rcupdate.h:872 rcu_read_lock() used
illegally while idle!
[ 49.318530]
[ 49.318530] other info that might help us debug this:
[ 49.318530]
[ 49.326451]
[ 49.326451] RCU used illegally from idle CPU!
[ 49.326451] rcu_scheduler_active = 1, debug_locks = 0
[ 49.337209] RCU used illegally from extended quiescent state!
[ 49.342892] 2 locks held by swapper/2/0:
[ 49.346768] #0: (cpu_pm_notifier_lock){......}, at:
[<ffffff8008163c28>] cpu_pm_exit+0x18/0x80
[ 49.355492] #1: (rcu_read_lock){......}, at: [<ffffff800816dc38>]
perf_event_update_userpage+0x0/0x260
This patch wraps the armpmu_start() call (that indirectly calls
perf_event_update_userpage()) on CPU_PM notifier power state exit (or
failed entry) within the RCU_NONIDLE() macro so that the RCU subsystem
is made aware the calling cpu is not idle from an RCU perspective for
the armpmu_start() call duration, therefore fixing the issue.
Fixes: da4e4f18afe0 ("drivers/perf: arm_pmu: implement CPU_PM notifier")
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reported-by: James Morse <james.morse@arm.com>
Suggested-by: Kevin Hilman <khilman@baylibre.com>
Cc: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Git-commit: cbcc72e037b8a3eb1fad3c1ae22021df21c97a51
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: Ia96c64f56d9cb480a2f62ca6fc717d15da77e487
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Commit c6b90653f1f7 ("drivers/perf: arm_pmu: make info messages more
verbose") breaks booting on systems where the PMU is probed without
devicetree (e.g by inspecting the MIDR of the current CPU). In this case,
pdev->dev.of_node is NULL and we shouldn't try to access its ->fullname
field when printing probe error messages.
This patch fixes the probing code to use of_node_full_name, which safely
handles NULL nodes and removes the "Error %i" part of the string, since
it's not terribly useful.
Reported-by: Guenter Roeck <private@roeck-us.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: 357b565d5d52b2dc2a51390eb8f887a9caa8597f
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: I446e06972d714f7a405ff8c264d7851958e69484
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
When a CPU is suspended (either through suspend-to-RAM or CPUidle),
its PMU registers content can be lost, which means that counters
registers values that were initialized on power down entry have to be
reprogrammed on power-up to make sure the counters set-up is preserved
(ie on power-up registers take the reset values on Cold or Warm reset,
which can be architecturally UNKNOWN).
To guarantee seamless profiling conditions across a core power down
this patch adds a CPU PM notifier to ARM pmus, that upon CPU PM
entry/exit from low-power states saves/restores the pmu registers
set-up (by using the ARM perf API), so that the power-down/up cycle does
not affect the perf behaviour (apart from a black-out period between
power-up/down CPU PM notifications that is unavoidable).
Cc: Will Deacon <will.deacon@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: da4e4f18afe0f3729d68f3785c5802f786d36e34
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: I2901cd11e3832ef671581ac6e4f0e3edce630e6d
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
On a big.LITTLE system e.g. with Cortex A57 and A53 in case not all cores
are online at PMU probe time we might get
hw perfevents: failed to probe PMU!
hw perfevents: failed to register PMU devices!
making it unclear which cores failed, here.
Add the device tree full name which failed and the error value resulting
in a more verbose and helpful message like
hw perfevents: /soc/pmu_a53: failed to probe PMU! Error -6
hw perfevents: /soc/pmu_a53: failed to register PMU devices! Error -6
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: c6b90653f1f7ea383734f8ce9e8df285a0c23f5b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: I6d250a614d26dbb218f1f2e4ee087db41e8202a7
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
ARMv7 counters other than the CPU cycle counter only work if the Secure
Debug Enable Register (SDER) SUNIDEN bit is set.
Since access to the SDER is only possible in secure state, it will
only be done if the device tree property "secure-reg-access" is set.
Without this:
Performance counter stats for 'sleep 1':
14606094 cycles # 0.000 GHz
0 instructions # 0.00 insns per cycle
After applying:
Performance counter stats for 'sleep 1':
5843809 cycles
2566484 instructions # 0.44 insns per cycle
1.020144000 seconds time elapsed
Some platforms (eg i.MX53) may also need additional platform specific
setup.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Signed-off-by: Pooya Keshavarzi <Pooya.Keshavarzi@de.bosch.com>
Signed-off-by: George G. Davis <george_davis@mentor.com>
[will: add warning if property is found on arm64]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: 8d1a0ae724ad74ef7946a45e3b2d3e01f39df02b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
CRs-Fixed: 1008368
Change-Id: Ic946deff2433ada458eb8040ddf40615a0a80959
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
Nothing outside of drivers/perf/arm_pmu.c should call armpmu_register
any more, so it no longer needs to be in include/linux/perf/arm_pmu.h.
Additionally, by folding it in to arm_pmu_device_probe we can allow
drivers to override struct pmu fields without getting blatted by the
armpmu code.
This patch folds armpmu_register into arm_pmu_device_probe. The logging
to the console is moved to after the PMU is successfully registered with
the core perf code.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Suggested-by: Will Deacon <will.deacon@arm.com>
Cc: Drew Richardson <drew.richardson@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Git-commit: b916b785af99088916a122cb37de1bda3fa7f70e
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
[jgebben@codeaurora.org: minor merge conflict in arm_pmu.h]
CRs-Fixed: 1008368
Change-Id: Ief4b49a866ec8b056b6552bbd1745be8f002a1da
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
This reverts commit 0e4ee435ac
("Perf: arm64: support hotplug and power collapse")
This change is being reverted so that it can be replaced
by equivalent functionality from upstream.
CRs-Fixed: 1008368
Change-Id: I464549b185625314a9f2844272bdce617ce988e4
Signed-off-by: Jeremy Gebben <jgebben@codeaurora.org>
